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Searched refs:getOpcodeDef (Results 1 – 11 of 11) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerCombiner.cpp64 auto *FAddMI = getOpcodeDef(TargetOpcode::G_FADD, Src1, MRI); in matchExtractVecEltPairwiseAdd()
76 getOpcodeDef(TargetOpcode::G_SHUFFLE_VECTOR, Src1Op2, MRI); in matchExtractVecEltPairwiseAdd()
79 Shuffle = getOpcodeDef(TargetOpcode::G_SHUFFLE_VECTOR, Src1Op1, MRI); in matchExtractVecEltPairwiseAdd()
H A DAArch64PostLegalizerLowering.cpp321 auto *InsMI = getOpcodeDef(TargetOpcode::G_INSERT_VECTOR_ELT, in matchDupFromInsertVectorElt()
326 if (!getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, InsMI->getOperand(1).getReg(), in matchDupFromInsertVectorElt()
346 auto *BuildVecMI = getOpcodeDef(TargetOpcode::G_BUILD_VECTOR, in matchDupFromBuildVector()
H A DAArch64InstructionSelector.cpp1567 MachineInstr *AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI); in tryOptCompareBranchFedByICmp()
1602 AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI); in tryOptCompareBranchFedByICmp()
2212 MachineInstr *Cmp = getOpcodeDef(TargetOpcode::G_ICMP, CmpReg, MRI); in earlySelect()
2215 Cmp = getOpcodeDef(TargetOpcode::G_ICMP, CmpReg, MRI); in earlySelect()
3086 auto *LoadMI = getOpcodeDef(TargetOpcode::G_LOAD, SrcReg, MRI); in select()
4929 getOpcodeDef(TargetOpcode::G_CONSTANT, I.getOperand(Idx).getReg(), MRI); in tryOptConstantBuildVec()
4933 else if ((OpMI = getOpcodeDef(TargetOpcode::G_FCONSTANT, in tryOptConstantBuildVec()
5512 getOpcodeDef(TargetOpcode::G_PTR_ADD, Root.getReg(), MRI); in selectAddrModeShiftedExtendXReg()
5573 getOpcodeDef(TargetOpcode::G_PTR_ADD, Root.getReg(), MRI); in selectAddrModeXRO()
5646 getOpcodeDef(TargetOpcode::G_PTR_ADD, Root.getReg(), MRI); in selectAddrModeWRO()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DUtils.h201 MachineInstr *getOpcodeDef(unsigned Opcode, Register Reg,
238 T *getOpcodeDef(Register Reg, const MachineRegisterInfo &MRI) { in getOpcodeDef() function
H A DLegalizationArtifactCombiner.h326 if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, in tryFoldImplicitDef()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp669 if (auto *LoadMI = getOpcodeDef<GSExtLoad>(LoadUser, MRI)) { in matchSextTruncSextLoad()
696 auto *LoadDef = getOpcodeDef<GLoad>(SrcReg, MRI); in matchSextInRegOfLoad()
822 MachineInstr *AddrDef = getOpcodeDef(TargetOpcode::G_PTR_ADD, Addr, MRI); in findPreIndexCandidate()
1225 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in optimizeMemset()
1380 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in optimizeMemcpy()
2024 auto *Unmerge = getOpcodeDef<GUnmerge>(MergedValues[0], MRI); in matchCombineMergeUnmerge()
2617 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchAnyExplicitUseIsUndef()
2624 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchAllExplicitUsesAreUndef()
2785 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchOperandIsUndef()
3476 auto *Load = getOpcodeDef<GZExtLoad>(MaybeLoad, MRI); in matchLoadAndBytePosition()
[all …]
H A DUtils.cpp418 MachineInstr *llvm::getOpcodeDef(unsigned Opcode, Register Reg, in getOpcodeDef() function in llvm
H A DLegalizerHelper.cpp4819 getOpcodeDef(TargetOpcode::G_CONSTANT, Amt, MRI)) { in narrowScalarShift()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp2664 if (MachineInstr *SrcFNeg = getOpcodeDef(AMDGPU::G_FNEG, ModSrc, MRI)) { in stripAnySourceMods()
2666 if (MachineInstr *SrcFAbs = getOpcodeDef(AMDGPU::G_FABS, ModSrc, MRI)) in stripAnySourceMods()
2668 } else if (MachineInstr *SrcFAbs = getOpcodeDef(AMDGPU::G_FABS, ModSrc, MRI)) in stripAnySourceMods()
H A DAMDGPUInstructionSelector.cpp2233 MachineInstr *Fabs = getOpcodeDef(TargetOpcode::G_FABS, Src, *MRI); in selectG_FNEG()
4069 = getOpcodeDef(TargetOpcode::G_PTR_ADD, Data.N0, *MRI)) { in parseMUBUFAddress()
H A DAMDGPURegisterBankInfo.cpp1381 MachineInstr *Add = getOpcodeDef(AMDGPU::G_ADD, CombinedOffset, *MRI); in setBufferOffsets()