Searched refs:getImplicitDefs (Results 1 – 16 of 16) sorted by relevance
581 const MCPhysReg *getImplicitDefs() const { return ImplicitDefs; } in getImplicitDefs() function
435 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT()514 for (const MCPhysReg *Reg = MCID.getImplicitDefs(); *Reg; ++Reg) { in DelayForLiveRegsBottomUp()
967 II.getImplicitDefs() != nullptr && !HasVRegVariadicDefs; in EmitMachineNode()1070 Register Reg = II.getImplicitDefs()[i - NumDefs]; in EmitMachineNode()1105 if (!UsedRegs.empty() || II.getImplicitDefs() || II.hasOptionalDef()) in EmitMachineNode()
1286 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT()1427 for (const MCPhysReg *Reg = MCID.getImplicitDefs(); *Reg; ++Reg) in DelayForLiveRegsBottomUp()2845 = TII->get(SU->getNode()->getMachineOpcode()).getImplicitDefs(); in canClobberReachingPhysRegUse()2881 const MCPhysReg *ImpDefs = TII->get(N->getMachineOpcode()).getImplicitDefs(); in canClobberPhysRegDefs()2888 TII->get(SUNode->getMachineOpcode()).getImplicitDefs(); in canClobberPhysRegDefs()
466 TII->get(N->getMachineOpcode()).getImplicitDefs()) { in AddSchedEdges()
394 Write.RegisterID = MCDesc.getImplicitDefs()[CurrentDef]; in populateWrites()
102 if (const MCPhysReg *ImpDef = MCID.getImplicitDefs()) in init()
628 if (!D.getImplicitDefs() && !D.getImplicitUses()) in isFixedReg()637 const MCPhysReg *ImpR = Op.isDef() ? D.getImplicitDefs() in isFixedReg()
106 for (const MCPhysReg *ImpDefs = MCID->getImplicitDefs(); *ImpDefs; in addImplicitDefUseOperands()
255 for (const MCPhysReg *Regs = MCID.getImplicitDefs(); *Regs; ++Regs) in HasImplicitCPSRDef()
459 const MCPhysReg Reg = Desc.getImplicitDefs()[I]; in clearsSuperRegisters()
1352 for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs) in verifyImplicitOperands()
6027 ArrayRef<MCPhysReg> ImpDefs(Desc.getImplicitDefs(), in parseMSInlineAsm()
7485 ArrayRef<MCPhysReg> ImpDefs(Desc.getImplicitDefs(), in parseMSInlineAsm()
2727 for (const MCPhysReg *ImpDefs = NewDesc.getImplicitDefs(); in optimizeCompareInstr()
3273 if (const MCPhysReg *ImpDef = MI.getDesc().getImplicitDefs()) { in modifiesModeRegister()