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Searched refs:VROR (Results 1 – 5 of 5) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp630 HalfV0 = DAG.getNode(HexagonISD::VROR, dl, VecTy, {N, S}); in buildHvxVectorReg()
631 HalfV1 = DAG.getNode(HexagonISD::VROR, dl, VecTy, {M, S}); in buildHvxVectorReg()
634 HalfV0 = DAG.getNode(HexagonISD::VROR, dl, VecTy, in buildHvxVectorReg()
725 Vec = DAG.getNode(HexagonISD::VROR, dl, ByteTy, Vec, S4); in createHvxPrefixPred()
1071 SingleV = DAG.getNode(HexagonISD::VROR, dl, SingleTy, SingleV, IdxV); in insertHvxSubvectorReg()
1085 SingleV = DAG.getNode(HexagonISD::VROR, dl, SingleTy, SingleV, in insertHvxSubvectorReg()
1094 SingleV = DAG.getNode(HexagonISD::VROR, dl, SingleTy, SingleV, RolV); in insertHvxSubvectorReg()
1341 Res = DAG.getNode(HexagonISD::VROR, dl, ByteTy, Res, S); in LowerHvxConcatVectors()
2273 case HexagonISD::VROR: { in PerformHvxDAGCombine()
2274 if (Ops[0].getOpcode() == HexagonISD::VROR) { in PerformHvxDAGCombine()
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H A DHexagonISelLowering.h65 VROR, enumerator
H A DHexagonISelDAGToDAG.cpp911 case HexagonISD::VROR: return SelectHvxRor(N); in Select()
H A DHexagonISelLowering.cpp1894 case HexagonISD::VROR: return "HexagonISD::VROR"; in getTargetNodeName()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrVec.td1369 // Section 8.14.8 - VROR (Vector Reduction Or)
1370 defm VROR : RVF1m<"vror", 0x98, V64, VM>;