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Searched refs:PLLE_SS_CNTL_INTERP_RESET (Results 1 – 4 of 4) sorted by relevance

/freebsd-13.1/sys/arm/nvidia/tegra124/
H A Dtegra124_car.h64 #define PLLE_SS_CNTL_INTERP_RESET (1 << 11) macro
69 PLLE_SS_CNTL_INTERP_RESET | \
H A Dtegra124_clk_pll.c619 reg &= ~PLLE_SS_CNTL_INTERP_RESET; in plle_enable()
/freebsd-13.1/sys/arm64/nvidia/tegra210/
H A Dtegra210_car.h68 #define PLLE_SS_CNTL_INTERP_RESET (1 << 11) macro
79 PLLE_SS_CNTL_INTERP_RESET | \
H A Dtegra210_clk_pll.c814 reg &= ~PLLE_SS_CNTL_INTERP_RESET; in plle_enable()