Home
last modified time | relevance | path

Searched refs:IsZeroExt (Results 1 – 4 of 4) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp77 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); in SelectIndexedLoad() local
83 if (IsZeroExt) in SelectIndexedLoad()
89 if (IsZeroExt) in SelectIndexedLoad()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp6325 bool IsZeroExt = Op0.getOpcode() == RISCVISD::VZEXT_VL; in PerformDAGCombine() local
6326 if ((!IsSignExt && !IsZeroExt) || Op0.getOpcode() != Op1.getOpcode()) in PerformDAGCombine()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp13455 auto IsZeroExt = [&](SDValue Op) { in PerformMVEVMULLCombine() local
13492 if (SDValue Op0 = IsZeroExt(N0)) { in PerformMVEVMULLCombine()
13493 if (SDValue Op1 = IsZeroExt(N1)) { in PerformMVEVMULLCombine()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp8505 bool IsZeroExt = LeftOp.getOpcode() == ISD::ZERO_EXTEND; in combineShiftToMULH() local
8507 if ((!(IsSignExt || IsZeroExt)) || LeftOp.getOpcode() != RightOp.getOpcode()) in combineShiftToMULH()