Home
last modified time | relevance | path

Searched refs:InstrMapping (Results 1 – 19 of 19) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagon.td160 def getPredOpcode : InstrMapping {
176 def getFalsePredOpcode : InstrMapping {
188 def getTruePredOpcode : InstrMapping {
200 def getPredNewOpcode : InstrMapping {
212 def getPredOldOpcode : InstrMapping {
224 def getNewValueOpcode : InstrMapping {
236 def getNonNVStore : InstrMapping {
262 def changeAddrMode_io_rr: InstrMapping {
270 def changeAddrMode_rr_io: InstrMapping {
310 def getRegForm : InstrMapping {
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCSEInfo.cpp137 assert(InstrMapping.count(UMI->MI) == 0 && in insertNode()
139 InstrMapping[UMI->MI] = MaybeNewNode; in insertNode()
186 auto *UMI = InstrMapping.lookup(MI); in handleRecordedInst()
191 InstrMapping.erase(MI); in handleRecordedInst()
207 if (auto *UMI = InstrMapping.lookup(MI)) { in handleRemoveInst()
209 InstrMapping.erase(MI); in handleRemoveInst()
252 InstrMapping.clear(); in releaseMemory()
277 for (auto &It : InstrMapping) { in verify()
293 if (!InstrMapping.count(UMI.MI)) in verify()
298 if (InstrMapping[UMI.MI] != &UMI) in verify()
[all …]
H A DRegBankSelect.cpp443 MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, in computeMapping() argument
448 if (!InstrMapping.isValid()) in computeMapping()
453 bool Saturated = Cost.addLocalCost(InstrMapping.getCost()); in computeMapping()
456 LLVM_DEBUG(dbgs() << "With: " << InstrMapping << '\n'); in computeMapping()
467 for (unsigned OpIdx = 0, EndOpIdx = InstrMapping.getNumOperands(); in computeMapping()
477 InstrMapping.getOperandMapping(OpIdx); in computeMapping()
582 MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, in applyMapping() argument
585 RegisterBankInfo::OperandsMapper OpdMapper(MI, InstrMapping, *MRI); in applyMapping()
597 InstrMapping.getOperandMapping(OpIdx); in applyMapping()
H A DRegisterBankInfo.cpp399 auto &InstrMapping = MapOfInstructionMappings[Hash]; in getInstructionMappingImpl() local
400 InstrMapping = std::make_unique<InstructionMapping>( in getInstructionMappingImpl()
402 return *InstrMapping; in getInstructionMappingImpl()
652 MachineInstr &MI, const InstructionMapping &InstrMapping, in OperandsMapper() argument
654 : MRI(MRI), MI(MI), InstrMapping(InstrMapping) { in OperandsMapper()
655 unsigned NumOpds = InstrMapping.getNumOperands(); in OperandsMapper()
657 assert(InstrMapping.verify(MI) && "Invalid mapping for MI"); in OperandsMapper()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DRegisterBankInfo.h296 const InstructionMapping &InstrMapping; variable
323 OperandsMapper(MachineInstr &MI, const InstructionMapping &InstrMapping,
332 const InstructionMapping &getInstrMapping() const { return InstrMapping; } in getInstrMapping()
758 const RegisterBankInfo::InstructionMapping &InstrMapping) {
759 InstrMapping.print(OS);
H A DRegBankSelect.h594 const RegisterBankInfo::InstructionMapping &InstrMapping,
615 const RegisterBankInfo::InstructionMapping &InstrMapping,
H A DCSEInfo.h82 DenseMap<const MachineInstr *, UniqueMachineInstr *> InstrMapping; variable
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.td2383 def getVOPe64 : InstrMapping {
2392 def getVOPe32 : InstrMapping {
2401 def getSDWAOp : InstrMapping {
2419 def getDPPOp32 : InstrMapping {
2428 def getCommuteOrig : InstrMapping {
2437 def getCommuteRev : InstrMapping {
2445 def getMCOpcodeGen : InstrMapping {
2466 def getSOPKOp : InstrMapping {
2474 def getAddr64Inst : InstrMapping {
2482 def getIfAddr64Inst : InstrMapping {
[all …]
H A DR600Instructions.td1796 def getLDSNoRetOp : InstrMapping {
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrInfo.td229 def getStackOpcode : InstrMapping {
242 def getRegisterOpcode : InstrMapping {
255 def getWasm64Opcode : InstrMapping {
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPC.td420 def getRecordFormOpcode : InstrMapping {
433 def getNonRecordFormOpcode : InstrMapping {
446 def getAltVSXFMAOpcode : InstrMapping {
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsDSPInstrFormats.td11 def Dsp2MicroMips : InstrMapping {
H A DMipsInstrFormats.td40 def Std2MicroMips : InstrMapping {
54 def Std2MicroMipsR6 : InstrMapping {
H A DMips32r6InstrFormats.td15 def MipsR62MicroMipsR6 : InstrMapping {
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/
H A DTarget.td1645 // InstrMapping - This class is used to create mapping tables to relate
1649 class InstrMapping {
1651 // define the relationship modeled by this InstrMapping record.
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.td261 def splsIdempotent : InstrMapping {
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrInfo.td970 def getPostIncOpcode : InstrMapping {
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrFormats.td121 def getDisp12Opcode : InstrMapping {
130 def getDisp20Opcode : InstrMapping {
140 def getMemOpcode : InstrMapping {
149 def getTargetMemOpcode : InstrMapping {
158 def getTwoOperandOpcode : InstrMapping {
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DSVEInstrFormats.td490 def getSVEPseudoMap : InstrMapping {
504 def getSVERevInstr : InstrMapping {
513 def getSVENonRevInstr : InstrMapping {