Searched refs:AddrNumOperands (Results 1 – 13 of 13) sorted by relevance
291 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction()297 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction()509 const MachineOperand &PushOp = Store->getOperand(X86::AddrNumOperands); in adjustCallSequence()564 for (unsigned i = NumOps - X86::AddrNumOperands; i != NumOps; ++i) in adjustCallSequence()
282 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? X86::AddrNumOperands in ExpandMI()348 for (unsigned i = 0; i != X86::AddrNumOperands; ++i) in ExpandMI()475 for (int i = 0; i < X86::AddrNumOperands; ++i) { in ExpandMI()499 Register Reg = MBBI->getOperand(X86::AddrNumOperands).getReg(); in ExpandMI()500 bool SrcIsKill = MBBI->getOperand(X86::AddrNumOperands).isKill(); in ExpandMI()507 for (int i = 0; i < X86::AddrNumOperands; ++i) { in ExpandMI()
506 assert(OutMI.getNumOperands() == 1 + X86::AddrNumOperands && in Lower()815 assert(OutMI.getNumOperands() == X86::AddrNumOperands && in Lower()2025 assert(MI->getNumOperands() >= (SrcIdx + 1 + X86::AddrNumOperands) && in addConstantComments()2103 assert(MI->getNumOperands() >= (SrcIdx + 1 + X86::AddrNumOperands) && in addConstantComments()2121 assert(MI->getNumOperands() >= (3 + X86::AddrNumOperands + 1) && in addConstantComments()2147 assert(MI->getNumOperands() >= (3 + X86::AddrNumOperands) && in addConstantComments()2162 assert(MI->getNumOperands() == (1 + X86::AddrNumOperands) && in addConstantComments()2222 assert(MI->getNumOperands() >= (1 + X86::AddrNumOperands) && in addConstantComments()2314 assert(MI->getNumOperands() >= (1 + X86::AddrNumOperands) && in addConstantComments()
534 MemOpEnd = MemOpStart + X86::AddrNumOperands; in usedAsAddr()569 OpIdx += (X86::AddrNumOperands - 1); in buildClosure()
430 MachineOperand &StoreSrcVReg = StoreInst->getOperand(X86::AddrNumOperands); in buildCopy()432 NewStore->getOperand(X86::AddrNumOperands).setIsKill(StoreSrcVReg.isKill()); in buildCopy()
126 return Op + X86::AddrNumOperands <= MI.getNumOperands() && in isMem()
924 if (MI.getOperand(X86::AddrNumOperands).getSubReg() == 0 && in isStoreToStackSlot()926 return MI.getOperand(X86::AddrNumOperands).getReg(); in isStoreToStackSlot()943 return MI.getOperand(X86::AddrNumOperands).getReg(); in isStoreToStackSlotPostFE()4693 Register SrcReg = MIB.getReg(X86::AddrNumOperands); in expandNOVLXStore()4703 MIB->getOperand(X86::AddrNumOperands).setReg(SrcReg); in expandNOVLXStore()5591 if (MOs.size() == X86::AddrNumOperands && in foldMemoryOperandImpl()6127 SmallVector<MachineOperand,X86::AddrNumOperands> MOs; in foldMemoryOperandImpl()6211 MOs.append(LoadMI.operands_begin() + NumOps - X86::AddrNumOperands, in foldMemoryOperandImpl()6336 SmallVector<MachineOperand, X86::AddrNumOperands> AddrOps; in unfoldMemoryOperand()6342 if (i >= Index && i < Index + X86::AddrNumOperands) in unfoldMemoryOperand()[all …]
976 for (int i = 0; i < X86::AddrNumOperands; ++i) in rewriteSetCC()
1156 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) && in handleOneArgFP()
33512 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitSetJmpShadowStackFix()33620 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjSetJmp()33778 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitLongJmpShadowStackFix()33904 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()33916 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()33930 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()34380 .addReg(MI.getOperand(X86::AddrNumOperands).getReg()); in EmitInstrWithCustomInserter()34490 for (unsigned Idx = 0; Idx < X86::AddrNumOperands; ++Idx) in EmitInstrWithCustomInserter()34492 MIB.add(MI.getOperand(X86::AddrNumOperands)); in EmitInstrWithCustomInserter()34497 .add(MI.getOperand(X86::AddrNumOperands)); in EmitInstrWithCustomInserter()[all …]
909 CurOp += X86::AddrNumOperands; in emitVEXOpcodePrefix()970 VEX_4V = ~getX86RegEncoding(MI, CurOp + X86::AddrNumOperands) & 0xf; in emitVEXOpcodePrefix()1262 CurOp += X86::AddrNumOperands; in emitREXPrefix()1271 CurOp += X86::AddrNumOperands; in emitREXPrefix()1521 unsigned SrcRegNum = CurOp + X86::AddrNumOperands; in encodeInstruction()1607 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()1619 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()1636 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()1642 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()1685 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()[all …]
41 AddrNumOperands = 5 enumerator
3710 if (!Inst.getOperand(X86::AddrNumOperands).isImm() || in processInstruction()3711 Inst.getOperand(X86::AddrNumOperands).getImm() != 1) in processInstruction()3749 for (int i = 0; i != X86::AddrNumOperands; ++i) in processInstruction()3848 X86::AddrNumOperands - 1).getReg(); in validateInstruction()