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Searched refs:getEncodingValue (Results 1 – 25 of 54) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp538 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
568 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues()
876 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
1083 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue()
1161 Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OffsetOpValue()
1190 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OpValue()
1197 Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getAddrMode3OpValue()
1227 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeISOpValue()
1430 Value |= CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getT2AddrModeSORegOpValue()
1551 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getRegisterListOpValue()
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/freebsd-12.1/contrib/llvm/tools/lldb/source/Plugins/Instruction/MIPS/
H A DEmulateInstructionMIPS.cpp1444 rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_LUI()
1819 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_3ops()
1820 rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_BXX_3ops()
1869 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_3ops_C()
1870 rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_BXX_3ops_C()
1948 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_Bcond_Link_C()
2017 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_Bcond_Link()
2067 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_2ops()
2121 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_2ops_C()
2396 rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_JALRS()
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/freebsd-12.1/contrib/llvm/tools/lldb/source/Plugins/Instruction/MIPS64/
H A DEmulateInstructionMIPS64.cpp1256 rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_LUI()
1353 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_3ops()
1354 rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_BXX_3ops()
1405 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_Bcond_Link()
1515 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_Bcond_Link_C()
1583 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_2ops()
1669 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_3ops_C()
1670 rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_BXX_3ops_C()
1749 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_2ops_C()
1866 rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_JALR()
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/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DR600ExpandSpecialInstrs.cpp140 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction()
167 if ((TRI.getEncodingValue(Src0) & 0xff) < 127 && in runOnMachineFunction()
168 (TRI.getEncodingValue(Src1) & 0xff) < 127) in runOnMachineFunction()
244 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction()
H A DR600RegisterInfo.cpp76 return this->getEncodingValue(reg) >> HW_CHAN_SHIFT; in getHWRegChan()
80 return GET_REG_INDEX(getEncodingValue(Reg)); in getHWRegIndex()
H A DSIRegisterInfo.h124 return getEncodingValue(Reg) & 0xff; in getHWRegIndex()
H A DSIInsertWaitcnts.cpp466 unsigned Reg = TRI->getEncodingValue(Op.getReg()); in getRegInterval()
613 setRegScore(TRI->getEncodingValue(DefMO.getReg()), EXP_CNT, in updateByEvent()
1358 RegisterEncoding.VGPR0 = TRI->getEncodingValue(AMDGPU::VGPR0); in runOnMachineFunction()
1361 RegisterEncoding.SGPR0 = TRI->getEncodingValue(AMDGPU::SGPR0); in runOnMachineFunction()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64ExternalSymbolizer.cpp101 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // reg in tryAddingSymbolicOperand()
130 MCRI.getEncodingValue(MI.getOperand(1).getReg()) << 5; // Rn in tryAddingSymbolicOperand()
131 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // Rd in tryAddingSymbolicOperand()
/freebsd-12.1/contrib/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCCodeEmitter.cpp91 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
164 Encoding = MRI.getEncodingValue(Op1.getReg()); in getMemoryOpValue()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DSIMCCodeEmitter.cpp340 RegEnc |= MRI.getEncodingValue(Reg); in getSDWASrcEncoding()
370 RegEnc |= MRI.getEncodingValue(Reg); in getSDWAVopcDstEncoding()
401 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
H A DR600MCCodeEmitter.cpp168 return MRI.getEncodingValue(RegNo) & HW_REG_MASK; in getHWReg()
177 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
/freebsd-12.1/contrib/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430MCCodeEmitter.cpp107 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
126 unsigned Reg = Ctx.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getMemOpValue()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCCodeEmitter.cpp221 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getTLSRegEncoding()
244 return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in get_crbitm_encoding()
275 return CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1338 if (RI->getEncodingValue(Ry.getReg()) != RI->getEncodingValue(src.getReg())) in processInstruction()
1381 unsigned int RegPairNum = RI->getEncodingValue(MO.getReg()); in processInstruction()
1396 unsigned int RegPairNum = RI->getEncodingValue(MO.getReg()); in processInstruction()
1412 unsigned int RegPairNum = RI->getEncodingValue(MO.getReg()); in processInstruction()
1429 unsigned int RegPairNum = RI->getEncodingValue(MO.getReg()); in processInstruction()
1744 unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg()); in processInstruction()
1768 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction()
1785 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction()
1802 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction()
1822 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction()
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/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp384 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
395 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
407 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
419 unsigned Reg = RI->getEncodingValue(Rs.getReg()); in HexagonProcessInstruction()
604 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsOptionRecord.cpp82 unsigned EncVal = MCRegInfo->getEncodingValue(CurrentSubReg); in SetPhysRegUsed()
H A DMipsMCCodeEmitter.cpp99 unsigned Reg0 = Ctx.getRegisterInfo()->getEncodingValue(RegOp0); in LowerCompactBranch()
100 unsigned Reg1 = Ctx.getRegisterInfo()->getEncodingValue(RegOp1); in LowerCompactBranch()
749 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
1056 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getRegisterListOpValue()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.h35 return getEncodingValue(i); in getSEHRegNum()
H A DAArch64FalkorHWPFFix.cpp661 unsigned Dest = LI.DestReg ? TRI->getEncodingValue(LI.DestReg) : 0; in getTag()
662 unsigned Base = TRI->getEncodingValue(LI.BaseReg); in getTag()
670 Off = (1 << 5) | TRI->getEncodingValue(LI.OffsetOpnd->getReg()); in getTag()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp602 .addImm(getEncodingValue(SrcReg) * 4) in lowerCRSpilling()
644 unsigned ShiftBits = getEncodingValue(DestReg)*4; in lowerCRRestore()
694 .addImm(getEncodingValue(SrcReg)) in lowerCRBitSpilling()
734 unsigned ShiftBits = getEncodingValue(DestReg); in lowerCRBitRestore()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp61 unsigned CV = MRI->getEncodingValue(Reg); in initLLVMToCVRegMapping()
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcMCCodeEmitter.cpp128 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
/freebsd-12.1/contrib/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRMCCodeEmitter.cpp254 if (MO.isReg()) return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMCCodeEmitter.cpp166 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp3777 EReg = MRI->getEncodingValue(Reg); in parseRegisterList()
3792 EReg = MRI->getEncodingValue(Reg); in parseRegisterList()
3817 if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg)) in parseRegisterList()
3823 EReg = MRI->getEncodingValue(Reg); in parseRegisterList()
3845 if (MRI->getEncodingValue(Reg) < MRI->getEncodingValue(OldReg)) { in parseRegisterList()
3851 if (MRI->getEncodingValue(Reg) == MRI->getEncodingValue(OldReg)) { in parseRegisterList()
3860 EReg = MRI->getEncodingValue(Reg); in parseRegisterList()
3863 EReg = MRI->getEncodingValue(++Reg); in parseRegisterList()
6043 unsigned RtEncoding = MRI->getEncodingValue(Op2.getReg()); in fixupGNULDRDAlias()
6270 unsigned Rt = MRI->getEncodingValue(Reg1); in ParseInstruction()
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