Searched refs:ctrl1 (Results 1 – 16 of 16) sorted by relevance
509 uint8_t status, ctrl1; in glxiic_stop_locked() local517 ctrl1 | GLXIIC_SMB_CTRL1_STOP_BIT); in glxiic_stop_locked()712 uint8_t ctrl1; in glxiic_state_master_addr_callback() local752 ctrl1 | GLXIIC_SMB_CTRL1_ACK_BIT); in glxiic_state_master_addr_callback()801 uint8_t ctrl1; in glxiic_state_master_rx_callback() local843 ctrl1 | GLXIIC_SMB_CTRL1_ACK_BIT); in glxiic_state_master_rx_callback()854 uint8_t ctrl1; in glxiic_state_master_stop_callback() local965 uint8_t ctrl1; in glxiic_transfer() local1037 uint8_t ctrl1; in glxiic_smb_enable() local1039 ctrl1 = 0; in glxiic_smb_enable()[all …]
50 #define ANSI_1_CTRL(ctrl1) "\033["##ctrl1 ANSI_ESC_END argument51 #define ANSI_2_CTRL(ctrl1, ctrl2) "\033["##ctrl1 ";"##ctrl2 ANSI_ESC_END argument
4494 uint64_t ctrl1; in write_txpkt_vm_wr() local4596 ctrl1 = 0; in write_txpkt_vm_wr()4630 cpl->ctrl1 = htobe64(ctrl1); in write_txpkt_vm_wr()4706 uint64_t ctrl1; in write_txpkt_wr() local4768 ctrl1 = 0; in write_txpkt_wr()4787 cpl->ctrl1 = htobe64(ctrl1); in write_txpkt_wr()4899 uint64_t ctrl1; in write_txpkts_wr() local4957 ctrl1 = 0; in write_txpkts_wr()4977 cpl->ctrl1 = htobe64(ctrl1); in write_txpkts_wr()5811 ctrl1 = 0; in write_ethofld_wr()[all …]
695 cpl->ctrl1 = txcsum ? 0 : in cxgbe_nm_tx()
778 uint32_t ctrl1, ctrl2, ctrl3; in nlm_nae_init_netior() local787 ctrl1 = 0xff; in nlm_nae_init_netior()792 ctrl1 = 0xfffff; in nlm_nae_init_netior()803 nlm_write_nae_reg(nae_base, NAE_NETIOR_MISC_CTRL1, ctrl1); in nlm_nae_init_netior()
63 hint.arswitch.0.led.ctrl1=0xc737c737
38 hint.arswitch.0.led.ctrl1=0xc737c737
79 hint.arswitch.0.led.ctrl1=0xca35ca35
89 hint.arswitch.0.led.ctrl1=0xc737c737
64 hint.arswitch.0.led.ctrl1=0xc737c737
81 hint.arswitch.0.led.ctrl1=0x00000000
69 hint.arswitch.0.led.ctrl1=0x00000000
418 pinctrl_uart1_ctrl1: uart1-ctrl1-grp { /* Additional DTR, DCD */
576 pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
143 uint32_t ctrl1; member
1249 __be64 ctrl1; member