Searched refs:RISCVTargetMachine (Results 1 – 7 of 7) sorted by relevance
28 RegisterTargetMachine<RISCVTargetMachine> X(getTheRISCV32Target()); in LLVMInitializeRISCVTarget()29 RegisterTargetMachine<RISCVTargetMachine> Y(getTheRISCV64Target()); in LLVMInitializeRISCVTarget()50 RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT, in RISCVTargetMachine() function in RISCVTargetMachine67 RISCVPassConfig(RISCVTargetMachine &TM, PassManagerBase &PM) in RISCVPassConfig()70 RISCVTargetMachine &getRISCVTargetMachine() const { in getRISCVTargetMachine()71 return getTM<RISCVTargetMachine>(); in getRISCVTargetMachine()82 TargetPassConfig *RISCVTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
22 class RISCVTargetMachine; variable36 FunctionPass *createRISCVISelDag(RISCVTargetMachine &TM);
24 class RISCVTargetMachine : public LLVMTargetMachine {29 RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
16 class RISCVTargetMachine; variable
34 explicit RISCVDAGToDAGISel(RISCVTargetMachine &TargetMachine) in RISCVDAGToDAGISel()280 FunctionPass *llvm::createRISCVISelDag(RISCVTargetMachine &TM) { in createRISCVISelDag()
364 const auto &TM = static_cast<const RISCVTargetMachine &>(MF->getTarget()); in insertIndirectBranch()445 const auto &TM = static_cast<const RISCVTargetMachine &>(MF.getTarget()); in getInstSizeInBytes()
1154 SRCS_MIN+= Target/RISCV/RISCVTargetMachine.cpp