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Searched refs:writel (Results 1 – 25 of 26) sorted by relevance

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/f-stack/dpdk/drivers/net/pfe/
H A Dpfe_hal.c155 writel(ecr, (base + EMAC_ECNTRL_REG)); in gemac_set_speed()
156 writel(rcr, (base + EMAC_RCNTRL_REG)); in gemac_set_speed()
194 writel(val, base + EMAC_RCNTRL_REG); in gemac_set_mode()
244 writel(hash->top, base + EMAC_GAUR); in gemac_set_hash()
275 writel(0, base + EMAC_PHY_ADDR_LOW); in gemac_clear_laddrN()
451 writel(val, base + EMAC_ECNTRL_REG); in gemac_set_wol()
559 writel(1, base + GPI_TOE_CHKSUM_EN); in gpi_set_config()
598 writel(0, HIF_TX_CTRL); in hif_tx_disable()
602 writel(hif_int, HIF_INT_ENABLE); in hif_tx_disable()
624 writel(0, HIF_RX_CTRL); in hif_rx_disable()
[all …]
H A Dpfe_hif.c71 writel(0, &desc->data); in pfe_hif_release_buffers()
72 writel(0, &desc->status); in pfe_hif_release_buffers()
73 writel(0, &desc->ctrl); in pfe_hif_release_buffers()
136 writel(DDR_PHYS_TO_PFE(hif->rx_buf_addr[i]), in pfe_hif_init_buffers()
138 writel(0, &desc->status); in pfe_hif_init_buffers()
146 writel((BD_CTRL_PKT_INT_EN | BD_CTRL_LIFM in pfe_hif_init_buffers()
175 writel(0, &desc->ctrl); in pfe_hif_init_buffers()
447 writel(DDR_PHYS_TO_PFE(free_buf), &desc->data); in pfe_hif_rx_process()
599 writel((BD_CTRL_LIFM | in hif_xmit_pkt()
605 writel((BD_CTRL_DESC_EN | in hif_xmit_pkt()
[all …]
H A Dpfe_ethdev.c160 writel(RESET_STATUS, HIF_INT_SRC); in pfe_recv_pkts_on_intr()
161 writel(readl(HIF_INT_ENABLE) | HIF_RXPKT_INT, HIF_INT_ENABLE); in pfe_recv_pkts_on_intr()
/f-stack/dpdk/drivers/net/cxgbe/
H A Dcxgbe_compat.h232 static inline void writel(unsigned int val, volatile void __iomem *addr) in writel() function
239 writel(val, addr); in writeq()
240 writel(val >> 32, (void *)((uintptr_t)addr + 4)); in writeq()
H A Dsge.c726 writel(val | V_QID(q->bar2_qid), in ring_tx_db()
1722 writel(val | V_INGRESSQID(q->bar2_qid), in cxgbe_poll()
/f-stack/dpdk/drivers/common/iavf/
H A Diavf_osdep.h87 writel(uint32_t value, volatile void *addr) in writel() function
110 #define wr32(a, reg, value) writel((value), (a)->hw_addr + (reg))
123 #define IAVF_PCI_REG_WRITE(reg, value) writel(value, reg)
/f-stack/freebsd/mips/broadcom/
H A Dbcm_machdep.h113 writel(BCM_SOC_ADDR((_addr), (_offset)), (_val))
121 writel(BCM_CORE_ADDR(_bp, _name, (_reg)), (_val))
H A Dbcm_pmu.c289 writel(BCM_SOC_ADDR(bp->pmu_addr, reg), val); in bcm_pmu_write4()
/f-stack/dpdk/drivers/net/hinic/base/
H A Dhinic_compat.h147 static inline void writel(u32 value, volatile void *addr) in writel() function
157 #define __raw_writel(value, reg) writel((value), (reg))
H A Dhinic_pmd_hwif.h89 writel(cpu_to_be32(val), hwif->cfg_regs_base + reg); in hinic_hwif_write_reg()
H A Dhinic_pmd_hwif.c291 writel(mask_bits, hwif->intr_regs_base + offset); in hinic_set_msix_state()
H A Dhinic_pmd_cmdq.c264 writel(db.db_info, CMDQ_DB_ADDR(cmdq->db_base, prod_idx)); in cmdq_set_db()
/f-stack/freebsd/contrib/device-tree/Bindings/
H A Dcommon-properties.txt17 unconditionally (e.g. readl/writel). Use this if you know the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
/f-stack/dpdk/drivers/net/pfe/base/
H A Dpfe.h98 #define writel(v, p) ({*(volatile unsigned int *)(p) = (v); }) macro
392 writel(HIF_CTRL_DMA_EN | HIF_CTRL_BDP_CH_START_WSTB, HIF_RX_CTRL); in hif_rx_dma_start()
400 writel(HIF_CTRL_DMA_EN | HIF_CTRL_BDP_CH_START_WSTB, HIF_TX_CTRL); in hif_tx_dma_start()
/f-stack/dpdk/drivers/raw/ifpga/base/
H A Difpga_compat.h27 #define writel(value, addr) opae_writel(value, addr) macro
/f-stack/dpdk/drivers/net/enic/
H A Denic_compat.h71 static inline void writel(unsigned int val, volatile void __iomem *addr) in writel() function
/f-stack/dpdk/drivers/net/ice/base/
H A Dice_osdep.h95 writel(uint32_t value, volatile void *addr) in writel() function
118 #define wr32(a, reg, value) writel((value), (a)->hw_addr + (reg))
167 #define ICE_PCI_REG_WRITE(reg, value) writel(value, reg)
/f-stack/freebsd/mips/atheros/
H A Dar71xx_pci_bus_space.c199 writel(h + o, htole32(v)); in pcimem_bs_w_4_s()
/f-stack/dpdk/drivers/net/enic/base/
H A Dvnic_dev.h31 writel(val & 0xffffffff, reg); in writeq()
32 writel((uint32_t)(val >> 32), (char *)reg + 0x4UL); in writeq()
/f-stack/freebsd/mips/include/
H A Dcpufunc.h385 #define writel(va, d) (*(volatile uint32_t *) (va) = (d)) macro
/f-stack/freebsd/mips/malta/
H A Dgt_pci_bus_space.c223 #define wr32(a, v) writel(a, htole32(v))
/f-stack/dpdk/kernel/linux/igb_uio/
H A Digb_uio.c106 writel(mask_bits, desc->mask_base + offset); in igbuio_msix_mask_irq()
/f-stack/freebsd/mips/mips/
H A Dbus_space_generic.c214 #define wr32(a, v) writel(a, v)
/f-stack/freebsd/i386/include/
H A Dcpufunc.h55 #define writel(va, d) (*(volatile uint32_t *) (va) = (d)) macro
/f-stack/freebsd/amd64/include/
H A Dcpufunc.h57 #define writel(va, d) (*(volatile uint32_t *) (va) = (d)) macro

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