| /f-stack/freebsd/contrib/device-tree/Bindings/sram/ |
| H A D | allwinner,sun4i-a10-system-control.yaml | 27 - const: allwinner,sun4i-a10-sram-controller 36 - const: allwinner,sun50i-a64-sram-controller 53 "^sram@[a-z0-9]+": 58 const: mmio-sram 61 "^sram-section?@[a-f0-9]+$": 68 - const: allwinner,sun4i-a10-sram-c1 69 - const: allwinner,sun4i-a10-sram-d 70 - const: allwinner,sun50i-a64-sram-c 128 sram_a: sram@0 { 129 compatible = "mmio-sram"; [all …]
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| H A D | sram.yaml | 4 $id: http://devicetree.org/schemas/sram/sram.yaml# 30 - mmio-sram 141 sram@5c000000 { 172 sram@2020000 { 197 sram@d9000000 { 211 sram@e63c0000 { 225 sram@10080000 { 243 sram@ff720000 { 244 compatible = "rockchip,rk3288-pmu-sram", "mmio-sram"; 256 sram@20000 { [all …]
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| H A D | qcom,ocmem.yaml | 4 $id: http://devicetree.org/schemas/sram/qcom,ocmem.yaml# 62 "-sram@[0-9a-f]+$": 95 gmu-sram@0 {
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| /f-stack/freebsd/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | cache_sram.txt | 10 - compatible : should be "fsl,p2020-cache-sram" 11 - fsl,cache-sram-ctlr-handle : points to the L2 controller 12 - reg : offset and length of the cache-sram. 16 cache-sram@fff00000 { 17 fsl,cache-sram-ctlr-handle = <&L2>; 19 compatible = "fsl,p2020-cache-sram";
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| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | lpc4350.dtsi | 24 sram0: sram@10000000 { 25 compatible = "mmio-sram"; 29 sram1: sram@10080000 { 30 compatible = "mmio-sram"; 34 sram2: sram@20000000 { 35 compatible = "mmio-sram";
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| H A D | lpc4357.dtsi | 24 sram0: sram@10000000 { 25 compatible = "mmio-sram"; 29 sram1: sram@10080000 { 30 compatible = "mmio-sram"; 34 sram2: sram@20000000 { 35 compatible = "mmio-sram";
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| H A D | suniv-f1c100s.dtsi | 41 sram-controller@1c00000 { 49 sram_d: sram@10000 { 50 compatible = "mmio-sram"; 56 otg_sram: sram-section@0 { 57 compatible = "allwinner,suniv-f1c100s-sram-d", 58 "allwinner,sun4i-a10-sram-d";
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| H A D | at91sam9xe.dtsi | 15 sram0: sram@2ff000 { 19 sram1: sram@300000 { 20 compatible = "mmio-sram";
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| H A D | at91sam9g20.dtsi | 18 sram0: sram@2ff000 { 22 sram1: sram@2fc000 { 23 compatible = "mmio-sram";
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| H A D | milbeaut-m10v.dtsi | 84 sram@0 { 85 compatible = "mmio-sram"; 90 smp-sram@f100 { 91 compatible = "socionext,milbeaut-smp-sram";
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| H A D | imx6qp.dtsi | 9 ocram2: sram@940000 { 10 compatible = "mmio-sram"; 15 ocram3: sram@960000 { 16 compatible = "mmio-sram";
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| H A D | sun5i.dtsi | 140 sram_a: sram@0 { 141 compatible = "mmio-sram"; 147 emac_sram: sram-section@8000 { 155 sram_d: sram@10000 { 156 compatible = "mmio-sram"; 162 otg_sram: sram-section@0 { 170 sram_c: sram@1d00000 { 171 compatible = "mmio-sram"; 177 ve_sram: sram-section@0 { 327 allwinner,sram = <&ve_sram 1>; [all …]
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| /f-stack/freebsd/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300_aic.c | 45 struct ath_aic_sram_info sram; member 441 aic_sram[i].sram.valid = 1; in ar9300_aic_cal_post_process() 442 aic_sram[i].sram.rot_dir_att_db = in ar9300_aic_cal_post_process() 445 aic_sram[i].sram.rot_quad_att_db = in ar9300_aic_cal_post_process() 459 SM(aic_sram[i].sram.valid, in ar9300_aic_cal_post_process() 471 aic_sram[i].sram.vga_quad_sign, in ar9300_aic_cal_post_process() 472 aic_sram[i].sram.vga_dir_sign, in ar9300_aic_cal_post_process() 473 aic_sram[i].sram.rot_dir_att_db, in ar9300_aic_cal_post_process() 474 aic_sram[i].sram.rot_quad_att_db, in ar9300_aic_cal_post_process() 475 aic_sram[i].sram.com_att_6db, in ar9300_aic_cal_post_process() [all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/arm/omap/ |
| H A D | mpu.txt | 14 - sram: Phandle to the ocmcram node 17 - pm-sram: Phandles to ocmcram nodes to be used for power management. 20 data region for code. See Documentation/devicetree/bindings/sram/sram.yaml 52 pm-sram = <&pm_sram_code
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| /f-stack/freebsd/contrib/device-tree/Bindings/clock/ |
| H A D | hi6220-clock.txt | 28 - hisilicon,hi6220-clk-sram: phandle to the syscon managing the SoC internal sram; 29 the driver need use the sram to pass parameters for frequency change. 44 hisilicon,hi6220-clk-sram = <&sram>;
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| /f-stack/freebsd/contrib/device-tree/Bindings/media/ |
| H A D | allegro.txt | 14 length of the memory mapped sram 15 - reg-names: must include "regs" and "sram" 26 reg-names = "regs", "sram"; 37 reg-names = "regs", "sram";
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| /f-stack/freebsd/contrib/device-tree/Bindings/net/ |
| H A D | allwinner,sun4i-a10-emac.yaml | 29 allwinner,sram: 39 - allwinner,sram 51 allwinner,sram = <&emac_sram 1>;
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| /f-stack/freebsd/contrib/device-tree/Bindings/crypto/ |
| H A D | mv_cesa.txt | 12 - reg-names: "regs". Can contain an "sram" entry, but this representation 20 - marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not 31 marvell,crypto-sram-size = <0x600>;
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| H A D | marvell-cesa.txt | 16 - reg-names: "regs". Can contain an "sram" entry, but this representation 29 - marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not 43 marvell,crypto-sram-size = <0x600>;
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| /f-stack/freebsd/contrib/device-tree/Bindings/mailbox/ |
| H A D | mailbox.txt | 41 sram: sram@50000000 { 42 compatible = "mmio-sram";
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| /f-stack/freebsd/contrib/device-tree/Bindings/fsi/ |
| H A D | fsi-master-ast-cf.txt | 19 - aspeed,sram = <phandle>; : Reference to the SRAM node. 34 aspeed,sram = <&sram>;
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| /f-stack/freebsd/contrib/device-tree/Bindings/memory-controllers/ti/ |
| H A D | emif.txt | 32 - sram : Phandles for generic sram driver nodes, 35 data region for code. See Documentation/devicetree/bindings/sram/sram.yaml 76 sram = <&pm_sram_code
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| /f-stack/freebsd/contrib/device-tree/src/arm64/allwinner/ |
| H A D | sun50i-h5.dtsi | 88 sram_c1: sram@18000 { 89 compatible = "mmio-sram"; 95 ve_sram: sram-section@0 { 96 compatible = "allwinner,sun50i-h5-sram-c1", 97 "allwinner,sun4i-a10-sram-c1"; 111 allwinner,sram = <&ve_sram 1>;
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| /f-stack/freebsd/contrib/device-tree/Bindings/remoteproc/ |
| H A D | ingenic,vpu.yaml | 27 - description: sram registers 34 - const: sram 70 reg-names = "aux", "tcsm0", "tcsm1", "sram";
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| /f-stack/freebsd/contrib/device-tree/Bindings/bus/ |
| H A D | allwinner,sun50i-a64-de2.yaml | 33 allwinner,sram: 59 - allwinner,sram 68 allwinner,sram = <&de2_sram 1>;
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