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Searched refs:reg (Results 1 – 25 of 6299) sorted by relevance

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/f-stack/freebsd/contrib/alpine-hal/
H A Dal_hal_udma_config.c98 uint32_t reg; in al_udma_m2s_axi_sm_set() local
139 uint32_t reg; in al_udma_m2s_axi_set() local
195 uint32_t reg; in al_udma_s2m_axi_sm_set() local
236 uint32_t reg; in al_udma_s2m_axi_set() local
347 uint32_t reg; in al_udma_m2s_pref_set() local
405 uint32_t reg; in al_udma_m2s_pref_get() local
516 uint32_t reg; in al_udma_s2m_pref_set() local
585 uint32_t reg; in al_udma_s2m_data_write_set() local
721 reg); in al_udma_m2s_rlimit_reset()
767 uint32_t reg; in al_udma_common_rlimit_act() local
[all …]
H A Dal_hal_reg_utils.h66 #define AL_REG_FIELD_GET(reg, mask, shift) (((reg) & (mask)) >> (shift)) argument
70 (reg) = \
71 (((reg) & (~(mask))) | \
76 ((reg) = \
77 (((reg) & (~(mask))) | \
108 ((reg) = (((reg) & (~(clear_mask)))))
112 ((reg) = (((reg) | (clear_mask))))
117 (reg) = (((reg) & (~(clear_mask))) | (set_mask))
140 temp = al_reg_read8(reg); in al_reg_write8_masked()
159 temp = al_reg_read16(reg); in al_reg_write16_masked()
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/f-stack/dpdk/lib/librte_bpf/
H A Dbpf_exec.c25 ((type)(reg)[(ins)->dst_reg] op (type)(reg)[(ins)->src_reg]) ? \
34 ((reg)[(ins)->dst_reg] = (type)(-(reg)[(ins)->dst_reg]))
37 ((reg)[(ins)->dst_reg] = (type)(reg)[(ins)->src_reg])
40 ((reg)[(ins)->dst_reg] = \
41 (type)(reg)[(ins)->dst_reg] op (type)(reg)[(ins)->src_reg])
75 reg[ins->src_reg]))
102 v = reg + ins->dst_reg; in bpf_alu_be()
121 v = reg + ins->dst_reg; in bpf_alu_le()
463 reg[EBPF_REG_1], reg[EBPF_REG_2], in bpf_exec()
464 reg[EBPF_REG_3], reg[EBPF_REG_4], in bpf_exec()
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/f-stack/dpdk/drivers/net/ixgbe/base/
H A Dixgbe_dcb_82599.c95 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82599() local
113 reg = 0; in ixgbe_dcb_config_rx_arbiter_82599()
206 u32 reg; in ixgbe_dcb_config_tx_data_arbiter_82599() local
224 reg = 0; in ixgbe_dcb_config_tx_data_arbiter_82599()
354 u32 reg = 0; in ixgbe_dcb_config_tc_stats_82599() local
480 u32 reg; in ixgbe_dcb_config_82599() local
495 reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | in ixgbe_dcb_config_82599()
501 reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | in ixgbe_dcb_config_82599()
510 reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | in ixgbe_dcb_config_82599()
517 reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | in ixgbe_dcb_config_82599()
[all …]
H A Dixgbe_dcb_82598.c85 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82598() local
95 reg &= ~IXGBE_RMCS_ARBDIS; in ixgbe_dcb_config_rx_arbiter_82598()
97 reg |= IXGBE_RMCS_RRM; in ixgbe_dcb_config_rx_arbiter_82598()
99 reg |= IXGBE_RMCS_DFP; in ixgbe_dcb_config_rx_arbiter_82598()
111 reg |= IXGBE_RT2CR_LSP; in ixgbe_dcb_config_rx_arbiter_82598()
144 u32 reg, max_credits; in ixgbe_dcb_config_tx_desc_arbiter_82598() local
151 reg |= IXGBE_DPMCS_TSOEF; in ixgbe_dcb_config_tx_desc_arbiter_82598()
191 u32 reg; in ixgbe_dcb_config_tx_data_arbiter_82598() local
204 reg = refill[i]; in ixgbe_dcb_config_tx_data_arbiter_82598()
234 u32 fcrtl, reg; in ixgbe_dcb_config_pfc_82598() local
[all …]
/f-stack/freebsd/arm/freescale/imx/
H A Dimx6_ccm.c93 uint32_t reg; in ccm_init_gates() local
97 WR4(sc, CCM_CCGR0, reg); in ccm_init_gates()
102 WR4(sc, CCM_CCGR1, reg); in ccm_init_gates()
109 WR4(sc, CCM_CCGR2, reg); in ccm_init_gates()
150 uint32_t reg; in ccm_attach() local
181 WR4(sc, CCM_CGPR, reg); in ccm_attach()
183 reg = (reg & ~CCM_CLPCR_LPM_MASK) | CCM_CLPCR_LPM_RUN; in ccm_attach()
217 uint32_t reg; in imx_ccm_ssi_configure() local
399 uint32_t reg; in imx_ccm_pll_video_enable() local
447 uint32_t reg; in imx_ccm_ipu_enable() local
[all …]
/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dtegra210_xusbpadctl.c548 uint32_t reg; in uphy_pex_enable() local
772 uint32_t reg; in uphy_sata_enable() local
1005 uint32_t reg; in usb3_port_init() local
1075 uint32_t reg; in pcie_enable() local
1092 uint32_t reg; in pcie_disable() local
1107 uint32_t reg; in sata_enable() local
1124 uint32_t reg; in sata_disable() local
1138 uint32_t reg; in hsic_enable() local
1223 uint32_t reg; in hsic_disable() local
1589 reg = RD4(sc, lane->reg); in config_lane()
[all …]
H A Dtegra210_clk_pll.c601 uint32_t reg; in pll_enable() local
615 uint32_t reg; in pll_disable() local
656 return (reg == 0 ? 1: reg); in reg_to_pdiv()
711 uint32_t reg; in is_locked() local
752 uint32_t reg; in plle_enable() local
788 reg = set_divisors(sc, reg, pll_m, pll_n, pll_cml); in plle_enable()
893 uint32_t reg; in pll_set_std() local
1182 reg = set_masked(reg, n, mnp_bits->n_shift, in pllx_set_freq()
1222 reg = 0; in pllx_init()
1228 reg = 0; in pllx_init()
[all …]
/f-stack/freebsd/contrib/octeon-sdk/
H A Dcvmx-fau.h159 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg)); in __cvmx_fau_store_address()
184 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg)); in __cvmx_fau_atomic_address()
361 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg)); in __cvmx_fau_iobdma_data()
515 cvmx_write64_int64(__cvmx_fau_store_address(0, reg), value); in cvmx_fau_atomic_add64()
527 cvmx_write64_int32(__cvmx_fau_store_address(0, reg), value); in cvmx_fau_atomic_add32()
539 cvmx_write64_int16(__cvmx_fau_store_address(0, reg), value); in cvmx_fau_atomic_add16()
550 cvmx_write64_int8(__cvmx_fau_store_address(0, reg), value); in cvmx_fau_atomic_add8()
562 cvmx_write64_int64(__cvmx_fau_store_address(1, reg), value); in cvmx_fau_atomic_write64()
574 cvmx_write64_int32(__cvmx_fau_store_address(1, reg), value); in cvmx_fau_atomic_write32()
586 cvmx_write64_int16(__cvmx_fau_store_address(1, reg), value); in cvmx_fau_atomic_write16()
[all …]
/f-stack/freebsd/arm/arm/
H A Dmachdep_kdb.c48 u_int reg; in DB_SHOW_COMMAND() local
50 reg = cp15_midr_get(); in DB_SHOW_COMMAND()
52 reg = cp15_ctr_get(); in DB_SHOW_COMMAND()
55 reg = cp15_sctlr_get(); in DB_SHOW_COMMAND()
57 reg = cp15_actlr_get(); in DB_SHOW_COMMAND()
60 reg = cp15_id_pfr0_get(); in DB_SHOW_COMMAND()
62 reg = cp15_id_pfr1_get(); in DB_SHOW_COMMAND()
64 reg = cp15_id_dfr0_get(); in DB_SHOW_COMMAND()
76 reg = cp15_ttbr_get(); in DB_SHOW_COMMAND()
82 u_int reg; in DB_SHOW_COMMAND() local
[all …]
/f-stack/freebsd/arm/nvidia/tegra124/
H A Dtegra124_clk_pll.c416 uint32_t reg; in pll_enable() local
429 uint32_t reg; in pll_disable() local
518 uint32_t reg; in is_locked() local
559 uint32_t reg; in plle_enable() local
595 reg = set_divisors(sc, reg, pll_m, pll_n, pll_p); in plle_enable()
695 uint32_t reg; in pll_set_std() local
726 reg = set_masked(reg, pdiv_to_reg(sc, p), mnp_bits->p_shift, in pll_set_std()
877 uint32_t reg; in pllx_set_freq() local
991 uint32_t reg; in tegra124_pll_init() local
1035 (reg >> 30) & 1, (reg >> 29) & 1, (reg >> 28) & 1, in tegra124_pll_recalc()
[all …]
H A Dtegra124_xusbpadctl.c369 uint32_t reg; in usb3_port_init() local
413 uint32_t reg; in pcie_powerup() local
453 uint32_t reg; in pcie_powerdown() local
471 uint32_t reg; in sata_powerup() local
516 uint32_t reg; in sata_powerdown() local
550 uint32_t reg; in usb2_powerup() local
618 uint32_t reg; in usb2_powerdown() local
645 uint32_t reg; in phy_powerup() local
668 uint32_t reg; in phy_powerdown() local
852 reg = RD4(sc, lane->reg); in config_lane()
[all …]
/f-stack/freebsd/mips/malta/
H A Dmalta_mp.c141 uint32_t reg; in set_thread_context() local
144 reg &= ~(0xff); in set_thread_context()
145 reg |= cpuid; in set_thread_context()
154 uint32_t reg; in platform_ipi_send() local
160 reg |= (C_SW1); in platform_ipi_send()
161 mttc0(13, 0, reg); in platform_ipi_send()
167 uint32_t reg; in platform_ipi_clear() local
170 reg &= ~(C_SW1); in platform_ipi_clear()
232 uint32_t reg; in platform_start_ap() local
251 mttc0(2, 1, reg); in platform_start_ap()
[all …]
/f-stack/freebsd/arm/altera/socfpga/
H A Dsocfpga_a10_manager.c151 int reg; in fpga_open() local
190 reg |= CTRL_00_NCONFIG; in fpga_open()
195 reg &= ~CTRL_01_S2F_NCE; in fpga_open()
205 reg &= ~S2F_CONDONE_OE; in fpga_open()
206 reg &= ~S2F_NSTATUS_OE; in fpga_open()
207 reg |= CTRL_00_NCONFIG; in fpga_open()
233 if (reg & F2S_PR_ERROR) { in fpga_open()
238 if (reg & F2S_PR_READY) { in fpga_open()
257 int reg; in fpga_close() local
270 if (reg & F2S_PR_DONE) { in fpga_close()
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/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dibm-power9-dual.dtsi6 reg = <0 0>;
23 reg = <0>;
27 reg = <1>;
31 reg = <2>;
35 reg = <3>;
39 reg = <4>;
43 reg = <5>;
47 reg = <6>;
51 reg = <7>;
208 reg = <1>;
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H A Daspeed-bmc-facebook-cmm.dts342 reg = <0>;
447 reg = <1>;
552 reg = <2>;
657 reg = <3>;
762 reg = <4>;
867 reg = <5>;
972 reg = <6>;
1077 reg = <7>;
1196 reg = <0>;
1202 reg = <1>;
[all …]
H A Daspeed-bmc-ibm-rainier.dts102 reg = <0>;
108 reg = <1>;
114 reg = <2>;
120 reg = <3>;
198 reg = <0 0>;
310 reg = <1 0>;
532 reg = <1>;
536 reg = <2>;
540 reg = <3>;
721 reg = <0>;
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H A Daspeed-bmc-opp-swift.dts348 reg = <0>;
360 reg = <1>;
372 reg = <2>;
384 reg = <3>;
396 reg = <4>;
417 reg = <0>;
422 reg = <1>;
427 reg = <2>;
432 reg = <3>;
437 reg = <4>;
[all …]
H A Daspeed-bmc-opp-tacoma.dts195 reg = <0 0>;
212 reg = <0>;
216 reg = <1>;
220 reg = <2>;
224 reg = <3>;
228 reg = <4>;
232 reg = <5>;
397 reg = <1>;
401 reg = <2>;
474 reg = <0>;
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/f-stack/dpdk/drivers/net/igc/base/
H A Digc_osdep.h81 #define IGC_PCI_REG(reg) rte_read32(reg) argument
83 #define IGC_PCI_REG16(reg) rte_read16(reg) argument
85 #define IGC_PCI_REG_WRITE(reg, value) \ argument
94 #define IGC_PCI_REG_ADDR(hw, reg) \ argument
100 #define IGC_PCI_REG_FLASH_ADDR(hw, reg) \ argument
115 #define IGC_READ_REG(hw, reg) \ argument
118 #define IGC_READ_REG_LE_VALUE(hw, reg) \ argument
121 #define IGC_WRITE_REG(hw, reg, value) \ argument
145 IGC_WRITE_REG(hw, reg, value)
151 #define IGC_READ_FLASH_REG(hw, reg) \ argument
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/f-stack/dpdk/drivers/net/e1000/base/
H A De1000_osdep.h69 #define E1000_PCI_REG(reg) rte_read32(reg) argument
71 #define E1000_PCI_REG16(reg) rte_read16(reg) argument
73 #define E1000_PCI_REG_WRITE(reg, value) \ argument
74 rte_write32((rte_cpu_to_le_32(value)), reg)
82 #define E1000_PCI_REG_ADDR(hw, reg) \ argument
88 #define E1000_PCI_REG_FLASH_ADDR(hw, reg) \ argument
115 #define E1000_READ_REG(hw, reg) \ argument
118 #define E1000_WRITE_REG(hw, reg, value) \ argument
142 E1000_WRITE_REG(hw, reg, value)
148 #define E1000_READ_FLASH_REG(hw, reg) \ argument
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/f-stack/freebsd/mips/ingenic/
H A Djz4780_mp.c95 unsigned reg; in platform_init_ap() local
103 reg = mips_rd_xburst_reim(); in platform_init_ap()
105 mips_wr_xburst_reim(reg); in platform_init_ap()
111 set_intr_mask(reg); in platform_init_ap()
133 uint32_t reg; in jz4780_core_powerup() local
136 reg &= ~LPCR_PD_SCPU; in jz4780_core_powerup()
150 uint32_t reg, addr; in platform_start_ap() local
161 reg = mips_rd_xburst_reim(); in platform_start_ap()
162 reg &= ~JZ_REIM_ENTRY_MASK; in platform_start_ap()
166 reg |= JZ_REIM_MIRQ0M; in platform_start_ap()
[all …]
/f-stack/freebsd/mips/cavium/
H A Docteon_ds1337.c96 uint8_t reg[8]; in cvmx_rtc_ds1337_read() local
101 memset(&reg, 0, sizeof(reg)); in cvmx_rtc_ds1337_read()
119 if ((reg[2] & 0x40) && (reg[2] & 0x20)) /* AM/PM format and is PM time */ in cvmx_rtc_ds1337_read()
132 ct.year = ((reg[5] & 0x80) ? 2000 : 1900) + bcd2bin(reg[6]); in cvmx_rtc_ds1337_read()
155 uint8_t reg[8]; in cvmx_rtc_ds1337_write() local
169 reg[0] = bin2bcd(ct.sec); in cvmx_rtc_ds1337_write()
170 reg[1] = bin2bcd(ct.min); in cvmx_rtc_ds1337_write()
172 reg[3] = bin2bcd(ct.dow + 1); in cvmx_rtc_ds1337_write()
173 reg[4] = bin2bcd(ct.day); in cvmx_rtc_ds1337_write()
174 reg[5] = bin2bcd(ct.mon); in cvmx_rtc_ds1337_write()
[all …]
/f-stack/freebsd/arm64/coresight/
H A Dcoresight_etm4x.c75 uint32_t reg; in etm_prepare() local
89 reg |= TRCCONFIGR_COND_ALL; in etm_prepare()
115 reg = TRCVICTLR_SSSTATUS; in etm_prepare()
118 reg |= (1 << EVENT_SEL_S); in etm_prepare()
123 reg |= TRCVICTLR_EXLEVEL_NS_M; in etm_prepare()
125 reg |= TRCVICTLR_EXLEVEL_S_M; in etm_prepare()
134 reg = 0; in etm_prepare()
136 reg |= TRCACATR_EXLEVEL_S_M; in etm_prepare()
176 uint32_t reg; in etm_init() local
199 uint32_t reg; in etm_enable() local
[all …]
/f-stack/freebsd/contrib/device-tree/src/arm64/marvell/
H A Darmada-3720-turris-mox.dts127 reg = <0x6f>;
193 reg = <0>;
232 reg = <1>;
247 reg = <0>;
275 reg = <1>;
292 reg = <0x1>;
296 reg = <0x2>;
300 reg = <0x3>;
304 reg = <0x4>;
308 reg = <0x5>;
[all …]

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