| /f-stack/freebsd/x86/isa/ |
| H A D | isa_dma.c | 218 outb(DMA1_SMSK, chan); in isa_dmacascade() 221 outb(DMA2_SMSK, chan & 3); in isa_dmacascade() 308 outb(DMA1_FFC, 0); in isa_dmastart() 312 outb(waport, phys); in isa_dmastart() 313 outb(waport, phys>>8); in isa_dmastart() 317 outb(waport + 1, --nbytes); in isa_dmastart() 321 outb(DMA1_SMSK, chan); in isa_dmastart() 341 outb(DMA2_FFC, 0); in isa_dmastart() 345 outb(waport, phys>>1); in isa_dmastart() 346 outb(waport, phys>>9); in isa_dmastart() [all …]
|
| H A D | clock.c | 199 outb(TIMER_CNTR2, freq & 0xff); in timer_spkr_setfreq() 200 outb(TIMER_CNTR2, freq >> 8); in timer_spkr_setfreq() 345 outb(TIMER_MODE, new_mode); in set_i8254_freq() 346 outb(TIMER_CNTR0, 0); in set_i8254_freq() 347 outb(TIMER_CNTR0, 0); in set_i8254_freq() 351 outb(TIMER_MODE, new_mode); in set_i8254_freq() 352 outb(TIMER_CNTR0, new_count & 0xff); in set_i8254_freq() 353 outb(TIMER_CNTR0, new_count >> 8); in set_i8254_freq() 359 outb(TIMER_MODE, new_mode); in set_i8254_freq() 365 outb(TIMER_MODE, new_mode); in set_i8254_freq() [all …]
|
| H A D | atpic.c | 184 outb(atpics[MASTER].at_ioaddr, OCW2_EOI); in _atpic_eoi_master() 199 outb(atpics[SLAVE].at_ioaddr, OCW2_EOI); in _atpic_eoi_slave() 201 outb(atpics[MASTER].at_ioaddr, OCW2_EOI); in _atpic_eoi_slave() 419 outb(imr_addr, pic->at_intbase); in i8259_init() 427 outb(imr_addr, ICU_SLAVEID); in i8259_init() 429 outb(imr_addr, IRQ_MASK(ICU_SLAVEID)); in i8259_init() 433 outb(imr_addr, SLAVE_MODE); in i8259_init() 435 outb(imr_addr, MASTER_MODE); in i8259_init() 438 outb(imr_addr, pic->at_imen); in i8259_init() 441 outb(pic->at_ioaddr, OCW3_SEL | OCW3_RR); in i8259_init() [all …]
|
| H A D | elcr.c | 125 outb(ELCR_PORT + 1, elcr_status >> 8); in elcr_write_trigger() 127 outb(ELCR_PORT, elcr_status & 0xff); in elcr_write_trigger() 135 outb(ELCR_PORT, elcr_status & 0xff); in elcr_resume() 136 outb(ELCR_PORT + 1, elcr_status >> 8); in elcr_resume()
|
| H A D | atrtc.c | 101 outb(IO_RTC, reg); in rtcin_locked() 114 outb(IO_RTC, reg); in rtcout_locked() 118 outb(IO_RTC + 1, val); in rtcout_locked()
|
| /f-stack/freebsd/i386/acpica/ |
| H A D | acpi_wakecode.S | 74 outb %al, $TIMER_MODE 79 outb %al, $IO_PPI 83 outb %al, $TIMER_CNTR2 85 outb %al, $TIMER_CNTR2
|
| /f-stack/freebsd/amd64/acpica/ |
| H A D | acpi_wakecode.S | 79 outb %al, $TIMER_MODE 84 outb %al, $IO_PPI 88 outb %al, $TIMER_CNTR2 90 outb %al, $TIMER_CNTR2
|
| /f-stack/freebsd/x86/x86/ |
| H A D | intr_machdep.c | 509 outb(IO_ICU1, ICW1_RESET | ICW1_IC4); 510 outb(IO_ICU1 + ICU_IMR_OFFSET, IDT_IO_INTS); 512 outb(IO_ICU1 + ICU_IMR_OFFSET, MASTER_MODE); 513 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff); 514 outb(IO_ICU1, OCW3_SEL | OCW3_RR); 516 outb(IO_ICU2, ICW1_RESET | ICW1_IC4); 517 outb(IO_ICU2 + ICU_IMR_OFFSET, IDT_IO_INTS + 8); 518 outb(IO_ICU2 + ICU_IMR_OFFSET, ICU_SLAVEID); 519 outb(IO_ICU2 + ICU_IMR_OFFSET, SLAVE_MODE); 520 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff); [all …]
|
| H A D | cpu_machdep.c | 365 outb(IO_KBD + 4, 0xFE); in cpu_reset_real() 379 outb(0xcf9, 0x2); in cpu_reset_real() 380 outb(0xcf9, 0x6); in cpu_reset_real() 393 outb(0x92, b & 0xfe); in cpu_reset_real() 394 outb(0x92, b | 0x1); in cpu_reset_real()
|
| /f-stack/freebsd/i386/include/ |
| H A D | ppireg.h | 46 #define ppi_spkr_on() outb(IO_PPI, inb(IO_PPI) | PIT_SPKR) 47 #define ppi_spkr_off() outb(IO_PPI, inb(IO_PPI) & ~PIT_SPKR)
|
| H A D | iodev.h | 39 #define iodev_write_1 outb
|
| H A D | cpufunc.h | 305 outb(u_int port, u_char data) in outb() function 711 outb(0x22, reg); in read_cyrix_reg() 718 outb(0x22, reg); in write_cyrix_reg() 719 outb(0x23, data); in write_cyrix_reg() 792 void outb(u_int port, u_char data);
|
| /f-stack/freebsd/amd64/include/ |
| H A D | ppireg.h | 46 #define ppi_spkr_on() outb(IO_PPI, inb(IO_PPI) | PIT_SPKR) 47 #define ppi_spkr_off() outb(IO_PPI, inb(IO_PPI) & ~PIT_SPKR)
|
| H A D | iodev.h | 39 #define iodev_write_1 outb
|
| /f-stack/freebsd/i386/i386/ |
| H A D | mp_machdep.c | 111 #define CHECK_READ(A) (outb(CMOS_REG, (A)), inb(CMOS_DATA)) 112 #define CHECK_WRITE(A,D) (outb(CMOS_REG, (A)), outb(CMOS_DATA, (D))) 331 outb(CMOS_REG, BIOS_RESET); in start_all_aps() 347 outb(CMOS_REG, BIOS_RESET); in start_all_aps() 348 outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */ in start_all_aps() 377 outb(CMOS_REG, BIOS_RESET); in start_all_aps() 378 outb(CMOS_DATA, mpbiosreason); in start_all_aps()
|
| H A D | mpboot.s | 55 outb %al,$CMOS_REG ; \ 57 outb %al,$CMOS_DATA
|
| H A D | geode.c | 263 outb(0x0443, 1); in advantech_watchdog() 266 outb(0x0443, 0); in advantech_watchdog()
|
| H A D | prof_machdep.c | 240 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); in cputime()
|
| /f-stack/freebsd/x86/acpica/ |
| H A D | acpi_wakeup.c | 169 outb(CMOS_REG, BIOS_RESET); in acpi_wakeup_cpus() 175 outb(CMOS_REG, BIOS_RESET); in acpi_wakeup_cpus() 176 outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */ in acpi_wakeup_cpus() 203 outb(CMOS_REG, BIOS_RESET); in acpi_wakeup_cpus() 204 outb(CMOS_DATA, mpbiosreason); in acpi_wakeup_cpus()
|
| /f-stack/freebsd/i386/pci/ |
| H A D | pci_cfgreg.c | 228 outb(CONF2_ENABLE_PORT, 0xf0 | (func << 1)); in pci_cfgenable() 229 outb(CONF2_FORWARD_PORT, bus); in pci_cfgenable() 252 outb(CONF2_ENABLE_PORT, 0); in pci_cfgdisable() 293 outb(port, data); in pcireg_cfgwrite() 411 outb(CONF2_ENABLE_PORT, CONF2_ENABLE_CHK); in pcireg_cfgopen() 413 outb(CONF2_ENABLE_PORT, oldval2); in pcireg_cfgopen()
|
| /f-stack/dpdk/lib/librte_ipsec/ |
| H A D | ipsec_sqn.h | 131 sqn = __atomic_add_fetch(&sa->sqn.outb, n, __ATOMIC_RELAXED); in esn_outb_update_sqn() 133 sqn = sa->sqn.outb + n; in esn_outb_update_sqn() 134 sa->sqn.outb = sqn; in esn_outb_update_sqn()
|
| H A D | sa.h | 122 uint64_t outb; member
|
| /f-stack/freebsd/x86/include/ |
| H A D | bus.h | 487 outb(bsh + offset, value); in bus_space_write_1() 756 outb(addr, value); in bus_space_set_multi_1() 820 outb(addr, value); in bus_space_set_region_1() 893 outb(addr2, inb(addr1)); in bus_space_copy_region_1() 898 outb(addr2, inb(addr1)); in bus_space_copy_region_1() 1019 #undef outb 1023 #define outb(a, b) compiler_error macro
|
| /f-stack/freebsd/amd64/amd64/ |
| H A D | mp_machdep.c | 454 outb(CMOS_REG, BIOS_RESET); in native_start_all_aps() 460 outb(CMOS_REG, BIOS_RESET); in native_start_all_aps() 461 outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */ in native_start_all_aps() 512 outb(CMOS_REG, BIOS_RESET); in native_start_all_aps() 513 outb(CMOS_DATA, mpbiosreason); in native_start_all_aps()
|
| H A D | prof_machdep.c | 228 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); in cputime()
|