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Searched refs:nvm_data (Results 1 – 9 of 9) sorted by relevance

/f-stack/dpdk/drivers/net/e1000/base/
H A De1000_nvm.c752 u16 nvm_data; in e1000_read_pba_string_generic() local
787 if (nvm_data != NVM_PBA_PTR_GUARD) { in e1000_read_pba_string_generic()
800 pba_num[3] = nvm_data & 0xF; in e1000_read_pba_string_generic()
867 u16 nvm_data; in e1000_read_pba_length_generic() local
926 u16 nvm_data; in e1000_read_pba_num_generic() local
938 *pba_num = (u32)(nvm_data << 16); in e1000_read_pba_num_generic()
945 *pba_num |= nvm_data; in e1000_read_pba_num_generic()
1179 u16 i, nvm_data; in e1000_validate_nvm_checksum_generic() local
1189 checksum += nvm_data; in e1000_validate_nvm_checksum_generic()
1212 u16 i, nvm_data; in e1000_update_nvm_checksum_generic() local
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H A De1000_82540.c472 u16 nvm_data; in e1000_adjust_serdes_amplitude_82540() local
480 if (nvm_data != NVM_RESERVED_WORD) { in e1000_adjust_serdes_amplitude_82540()
482 nvm_data &= NVM_SERDES_AMPLITUDE_MASK; in e1000_adjust_serdes_amplitude_82540()
484 nvm_data); in e1000_adjust_serdes_amplitude_82540()
561 u16 nvm_data; in e1000_set_phy_mode_82540() local
568 ret_val = hw->nvm.ops.read(hw, NVM_PHY_CLASS_WORD, 1, &nvm_data); in e1000_set_phy_mode_82540()
574 if ((nvm_data != NVM_RESERVED_WORD) && (nvm_data & NVM_PHY_CLASS_A)) { in e1000_set_phy_mode_82540()
664 u16 offset, nvm_data, i; in e1000_read_mac_addr_82540() local
670 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in e1000_read_mac_addr_82540()
675 hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF); in e1000_read_mac_addr_82540()
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H A De1000_82542.c541 u16 offset, nvm_data, i; in e1000_read_mac_addr_82542() local
547 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in e1000_read_mac_addr_82542()
552 hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF); in e1000_read_mac_addr_82542()
553 hw->mac.perm_addr[i+1] = (u8)(nvm_data >> 8); in e1000_read_mac_addr_82542()
H A De1000_mac.c376 u16 offset, nvm_alt_mac_addr_offset, nvm_data; in e1000_check_alt_mac_addr_generic() local
381 ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &nvm_data); in e1000_check_alt_mac_addr_generic()
416 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in e1000_check_alt_mac_addr_generic()
422 alt_mac_addr[i] = (u8)(nvm_data & 0xFF); in e1000_check_alt_mac_addr_generic()
423 alt_mac_addr[i + 1] = (u8)(nvm_data >> 8); in e1000_check_alt_mac_addr_generic()
922 u16 nvm_data; in e1000_set_default_fc_generic() local
940 1, &nvm_data); in e1000_set_default_fc_generic()
944 1, &nvm_data); in e1000_set_default_fc_generic()
953 if (!(nvm_data & NVM_WORD0F_PAUSE_MASK)) in e1000_set_default_fc_generic()
955 else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == in e1000_set_default_fc_generic()
H A De1000_82575.c2243 u16 nvm_data = 0; in e1000_reset_mdicnfg_82580() local
2254 &nvm_data); in e1000_reset_mdicnfg_82580()
2261 if (nvm_data & NVM_WORD24_EXT_MDIO) in e1000_reset_mdicnfg_82580()
2400 u16 i, nvm_data; in e1000_validate_nvm_checksum_with_offset() local
2410 checksum += nvm_data; in e1000_validate_nvm_checksum_with_offset()
2437 u16 i, nvm_data; in e1000_update_nvm_checksum_with_offset() local
2447 checksum += nvm_data; in e1000_update_nvm_checksum_with_offset()
2471 u16 j, nvm_data; in e1000_validate_nvm_checksum_82580() local
2511 u16 j, nvm_data; in e1000_update_nvm_checksum_82580() local
2524 nvm_data = nvm_data | NVM_COMPATIBILITY_BIT_MASK; in e1000_update_nvm_checksum_82580()
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H A De1000_i210.c611 u16 i, nvm_data; in e1000_update_nvm_checksum_i210() local
620 ret_val = e1000_read_nvm_eerd(hw, 0, 1, &nvm_data); in e1000_update_nvm_checksum_i210()
634 ret_val = e1000_read_nvm_eerd(hw, i, 1, &nvm_data); in e1000_update_nvm_checksum_i210()
640 checksum += nvm_data; in e1000_update_nvm_checksum_i210()
/f-stack/dpdk/drivers/net/igc/base/
H A Digc_nvm.c750 u16 nvm_data; in igc_read_pba_string_generic() local
778 if (nvm_data != NVM_PBA_PTR_GUARD) { in igc_read_pba_string_generic()
791 pba_num[3] = nvm_data & 0xF; in igc_read_pba_string_generic()
858 u16 nvm_data; in igc_read_pba_length_generic() local
917 u16 nvm_data; in igc_read_pba_num_generic() local
929 *pba_num = (u32)(nvm_data << 16); in igc_read_pba_num_generic()
936 *pba_num |= nvm_data; in igc_read_pba_num_generic()
1170 u16 i, nvm_data; in igc_validate_nvm_checksum_generic() local
1180 checksum += nvm_data; in igc_validate_nvm_checksum_generic()
1203 u16 i, nvm_data; in igc_update_nvm_checksum_generic() local
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H A Digc_mac.c374 u16 offset, nvm_alt_mac_addr_offset, nvm_data; in igc_check_alt_mac_addr_generic() local
379 ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &nvm_data); in igc_check_alt_mac_addr_generic()
414 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in igc_check_alt_mac_addr_generic()
420 alt_mac_addr[i] = (u8)(nvm_data & 0xFF); in igc_check_alt_mac_addr_generic()
421 alt_mac_addr[i + 1] = (u8)(nvm_data >> 8); in igc_check_alt_mac_addr_generic()
920 u16 nvm_data; in igc_set_default_fc_generic() local
938 1, &nvm_data); in igc_set_default_fc_generic()
942 1, &nvm_data); in igc_set_default_fc_generic()
950 if (!(nvm_data & NVM_WORD0F_PAUSE_MASK)) in igc_set_default_fc_generic()
952 else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == in igc_set_default_fc_generic()
H A Digc_i225.c735 u16 i, nvm_data; in igc_update_nvm_checksum_i225() local
743 ret_val = igc_read_nvm_eerd(hw, 0, 1, &nvm_data); in igc_update_nvm_checksum_i225()
756 ret_val = igc_read_nvm_eerd(hw, i, 1, &nvm_data); in igc_update_nvm_checksum_i225()
763 checksum += nvm_data; in igc_update_nvm_checksum_i225()