| /f-stack/freebsd/contrib/ena-com/ |
| H A D | ena_com.h | 134 u32 msix_vector; member
182 u32 msix_vector; member
375 u32 msix_vector; member
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| H A D | ena_com.c | 1453 create_cmd.msix_vector = io_cq->msix_vector; in ena_com_create_io_cq()
1950 io_cq->msix_vector = ctx->msix_vector; in ena_com_create_io_queue()
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| H A D | ena_admin_defs.h | 357 uint32_t msix_vector; member
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| /f-stack/dpdk/drivers/net/ena/base/ |
| H A D | ena_com.h | 106 u32 msix_vector; member
154 u32 msix_vector; member
347 u32 msix_vector; member
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| H A D | ena_com.c | 1401 create_cmd.msix_vector = io_cq->msix_vector; in ena_com_create_io_cq()
1888 io_cq->msix_vector = ctx->msix_vector; in ena_com_create_io_queue()
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| /f-stack/dpdk/drivers/net/txgbe/ |
| H A D | txgbe_ethdev.h | 282 uint8_t queue, uint8_t msix_vector);
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| H A D | txgbe_ethdev.c | 3374 uint8_t queue, uint8_t msix_vector) in txgbe_set_ivar_map() argument
3380 msix_vector |= TXGBE_IVARMISC_VLD; in txgbe_set_ivar_map()
3384 tmp |= (msix_vector << idx); in txgbe_set_ivar_map()
3392 tmp |= (msix_vector << idx); in txgbe_set_ivar_map()
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| /f-stack/dpdk/drivers/net/e1000/ |
| H A D | igb_ethdev.c | 233 uint8_t queue, uint8_t msix_vector);
234 static void eth_igb_write_ivar(struct e1000_hw *hw, uint8_t msix_vector,
563 igbvf_set_ivar_map(struct e1000_hw *hw, uint8_t msix_vector) in igbvf_set_ivar_map() argument
568 tmp |= (msix_vector & E1000_VTIVAR_MISC_INTR_MASK); in igbvf_set_ivar_map()
5169 eth_igb_write_ivar(struct e1000_hw *hw, uint8_t msix_vector, in eth_igb_write_ivar() argument
5178 val |= (msix_vector | E1000_IVAR_VALID) << offset; in eth_igb_write_ivar()
5185 uint8_t queue, uint8_t msix_vector) in eth_igb_assign_msix_vector() argument
5194 E1000_WRITE_REG(hw, E1000_MSIXBM(msix_vector), tmp); in eth_igb_assign_msix_vector()
5197 eth_igb_write_ivar(hw, msix_vector, queue & 0x7, in eth_igb_assign_msix_vector()
5206 eth_igb_write_ivar(hw, msix_vector, in eth_igb_assign_msix_vector()
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| /f-stack/dpdk/drivers/net/ixgbe/ |
| H A D | ixgbe_ethdev.c | 273 uint8_t queue, uint8_t msix_vector);
294 uint8_t queue, uint8_t msix_vector);
6011 uint8_t queue, uint8_t msix_vector) in ixgbevf_set_ivar_map() argument
6017 msix_vector |= IXGBE_IVAR_ALLOC_VAL; in ixgbevf_set_ivar_map()
6020 tmp |= msix_vector; in ixgbevf_set_ivar_map()
6024 msix_vector |= IXGBE_IVAR_ALLOC_VAL; in ixgbevf_set_ivar_map()
6028 tmp |= (msix_vector << idx); in ixgbevf_set_ivar_map()
6046 uint8_t queue, uint8_t msix_vector) in ixgbe_set_ivar_map() argument
6050 msix_vector |= IXGBE_IVAR_ALLOC_VAL; in ixgbe_set_ivar_map()
6068 tmp |= (msix_vector << idx); in ixgbe_set_ivar_map()
[all …]
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| /f-stack/freebsd/contrib/ena-com/ena_defs/ |
| H A D | ena_admin_defs.h | 331 uint32_t msix_vector; member
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| /f-stack/dpdk/drivers/net/ena/base/ena_defs/ |
| H A D | ena_admin_defs.h | 303 uint32_t msix_vector; member
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| /f-stack/dpdk/drivers/net/igc/ |
| H A D | igc_ethdev.c | 689 bool tx, uint8_t msix_vector) in igc_write_ivar() argument
717 val |= (uint32_t)(msix_vector | IGC_IVAR_VALID) << offset; in igc_write_ivar()
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| /f-stack/dpdk/drivers/net/ena/ |
| H A D | ena_ethdev.c | 1158 ctx.msix_vector = -1; /* interrupts not used */ in ena_create_io_queue()
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