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Searched refs:etr (Results 1 – 17 of 17) sorted by relevance

/f-stack/freebsd/arm64/coresight/
H A Dcoresight_tmc.c171 bus_write_4(sc->res, TMC_DBALO, event->etr.low); in tmc_configure_etr()
172 bus_write_4(sc->res, TMC_DBAHI, event->etr.high); in tmc_configure_etr()
175 bus_write_4(sc->res, TMC_RRP, event->etr.low); in tmc_configure_etr()
176 bus_write_4(sc->res, TMC_RWP, event->etr.low); in tmc_configure_etr()
244 if (event->etr.flags & ETR_FLAG_ALLOCATE) { in tmc_enable()
245 event->etr.flags &= ~ETR_FLAG_ALLOCATE; in tmc_enable()
273 if (event->etr.flags & ETR_FLAG_RELEASE) { in tmc_disable()
274 event->etr.flags &= ~ETR_FLAG_RELEASE; in tmc_disable()
303 event->etr.offset = 0; in tmc_read()
304 event->etr.cycle++; in tmc_read()
[all …]
H A Dcoresight.h141 struct etr_state etr; member
/f-stack/freebsd/contrib/device-tree/Bindings/regulator/
H A Dmax8973-regulator.txt28 -maxim,enable-etr: boolean, enable Enhanced Transient Response.
29 -maxim,enable-high-etr-sensitivity: boolean, Enhanced transient response
31 property is available then etr will be enable default.
/f-stack/freebsd/contrib/device-tree/src/arm64/hisilicon/
H A Dhi3660-coresight.dtsi424 etr@ec033000 {
H A Dhi6220-coresight.dtsi99 etr@f6404000 {
/f-stack/freebsd/contrib/device-tree/src/arm64/qcom/
H A Dmsm8998-mtp.dtsi81 &etr {
H A Dapq8016-sbc.dtsi528 etr@826000 { status = "okay"; };
H A Dmsm8998.dtsi1353 etr: etr@6048000 { label
H A Dmsm8916.dtsi1406 etr@826000 {
H A Dmsm8996.dtsi1500 etr@3028000 {
H A Dsc7180.dtsi2137 etr@6048000 {
H A Dsdm845.dtsi2993 etr@6048000 {
/f-stack/freebsd/contrib/device-tree/Bindings/arm/
H A Dcoresight.txt184 etr@20070000 {
/f-stack/freebsd/contrib/device-tree/src/arm64/arm/
H A Djuno-base.dtsi199 etr@20070000 {
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dimx7s.dtsi266 etr@30086000 {
H A Dqcom-msm8974.dtsi1049 etr@fc322000 {
/f-stack/freebsd/contrib/device-tree/src/arm64/nvidia/
H A Dtegra210-smaug.dts1356 maxim,enable-etr;