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Searched refs:cpu_clk (Results 1 – 20 of 20) sorted by relevance

/f-stack/freebsd/contrib/device-tree/Bindings/arm/marvell/
H A Dkirkwood.txt12 cpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave",
14 between the "cpu_clk" and the "ddrclk".
26 clock-names = "cpu_clk", "ddrclk", "powersave";
H A Dap80x-system-controller.txt171 cpu_clk: clock-cpu@278 {
/f-stack/freebsd/contrib/device-tree/src/arm64/marvell/
H A Darmada-ap807-quad.dtsi24 clocks = <&cpu_clk 0>;
39 clocks = <&cpu_clk 0>;
54 clocks = <&cpu_clk 1>;
69 clocks = <&cpu_clk 1>;
H A Darmada-ap806-quad.dtsi24 clocks = <&cpu_clk 0>;
39 clocks = <&cpu_clk 0>;
54 clocks = <&cpu_clk 1>;
69 clocks = <&cpu_clk 1>;
H A Darmada-ap806-dual.dtsi24 clocks = <&cpu_clk 0>;
39 clocks = <&cpu_clk 0>;
H A Darmada-ap807.dtsi24 cpu_clk: clock-cpu { label
H A Darmada-ap806.dtsi24 cpu_clk: clock-cpu@278 { label
/f-stack/freebsd/contrib/device-tree/src/arc/
H A Dabilis_tb10x.dtsi31 clocks = <&cpu_clk>;
37 clocks = <&cpu_clk>;
53 cpu_clk: clkdiv_cpu { label
57 clock-output-names = "cpu_clk";
H A Dabilis_tb100.dtsi20 cpu_clk: clkdiv_cpu { label
H A Dabilis_tb101.dtsi20 cpu_clk: clkdiv_cpu { label
/f-stack/freebsd/contrib/device-tree/src/mips/mscc/
H A Docelot.dtsi16 clocks = <&cpu_clk>;
32 cpu_clk: cpu-clock { label
41 clocks = <&cpu_clk>;
/f-stack/freebsd/contrib/device-tree/Bindings/clock/
H A Dsnps,hsdk-pll-clock.txt23 cpu_clk: cpu-clk@0 {
H A Dtango4-clock.txt3 The Tango4 clock generator outputs cpu_clk and sys_clk (the latter is used
/f-stack/freebsd/contrib/device-tree/Bindings/timer/
H A Dcdns,ttc.yaml46 clocks = <&cpu_clk 3>;
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dvexpress-v2p-ca5s.dts112 clocks = <&cpu_clk>;
147 cpu_clk: oscclk0 { label
H A Dkirkwood.dtsi22 clock-names = "cpu_clk", "ddrclk", "powersave";
H A Dste-u300.dts102 cpu_clk@208M {
/f-stack/freebsd/arm/allwinner/clkng/
H A Dccu_a10.c260 MUX_CLK(cpu_clk,
559 { .type = AW_CLK_MUX, .clk.mux = &cpu_clk},
H A Dccu_a13.c257 static struct aw_clk_prediv_mux_def cpu_clk = { variable
517 { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &cpu_clk},
H A Dccu_a31.c455 MUX_CLK(cpu_clk,
924 { .type = AW_CLK_MUX, .clk.mux = &cpu_clk},