Searched refs:clocksource (Results 1 – 25 of 33) sorted by relevance
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| /f-stack/freebsd/contrib/device-tree/src/arc/ |
| H A D | skeleton_hs.dtsi | 33 /* 64-bit Local RTC: preferred clocksource for UP */ 39 /* TIMER1 for free running clocksource: Fallback if rtc not found */
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| H A D | skeleton.dtsi | 38 /* TIMER1 for free running clocksource */
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| H A D | abilis_tb10x.dtsi | 34 /* TIMER1 for free running clocksource */
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| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | omap3-devkit8000.dts | 18 /* Unusable as clocksource because of unreliable oscillator */ 32 /* Preferred always-on timer for clocksource */
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| H A D | omap3-beagle.dts | 307 /* Unusable as clocksource because of unreliable oscillator */ 321 /* Preferred always-on timer for clocksource */
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| H A D | am3517.dtsi | 179 /* Preferred always-on timer for clocksource */
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| /f-stack/freebsd/contrib/device-tree/Bindings/cpufreq/ |
| H A D | nvidia,tegra124-cpufreq.txt | 12 - pll_x: Fast PLL clocksource. 14 - dfll: Fast DFLL clocksource that also automatically scales CPU voltage.
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| /f-stack/freebsd/contrib/device-tree/Bindings/timer/ |
| H A D | snps,archs-rtc.txt | 2 - clocksource provider for UP SoC
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| H A D | snps,archs-gfrc.txt | 2 - clocksource provider for SMP SoC
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| H A D | arm,armv7m-systick.txt | 4 implements the clocksource feature.
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| H A D | jcore,pit.txt | 7 - reg: Memory region(s) for timer/clocksource registers. For SMP,
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| H A D | snps,arc-timer.txt | 6 TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS)
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| H A D | img,pistachio-gptimer.txt | 1 * Pistachio general-purpose timer based clocksource
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| H A D | ingenic,sysost.yaml | 13 The SYSOST in an Ingenic SoC provides one 64bit timer for clocksource
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| H A D | ti,davinci-timer.txt | 28 clocksource: timer@20000 {
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| /f-stack/freebsd/contrib/device-tree/src/mips/ingenic/ |
| H A D | cu1000-neo.dts | 47 /* 1500 kHz for the system timer and clocksource */ 51 /* Use channel #0 for the system timer channel #2 for the clocksource */
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| H A D | cu1830-neo.dts | 47 /* 1500 kHz for the system timer and clocksource */ 51 /* Use channel #0 for the system timer channel #2 for the clocksource */
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| H A D | gcw0.dts | 483 * 750 kHz for the system timer and clocksource, 12 MHz for the OST, 491 /* PWM1 is in use, so use channel #2 for the clocksource */
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| H A D | rs90.dts | 294 * 750 kHz for the system timer and clocksource, and use RTC as the
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| H A D | qi_lb60.dts | 361 /* 750 kHz for the system timer and clocksource */
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| H A D | ci20.dts | 492 /* 3 MHz for the system timer and clocksource */
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| /f-stack/freebsd/contrib/device-tree/Bindings/pwm/ |
| H A D | pwm-samsung.yaml | 19 Be aware that the clocksource driver supports only uniprocessor systems. 64 use PWM clocksource.
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| /f-stack/freebsd/contrib/device-tree/Bindings/soc/xilinx/ |
| H A D | xlnx,vcu.txt | 19 - clocks: phandle for aclk and pll_ref clocksource
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| /f-stack/freebsd/contrib/device-tree/Bindings/clock/ |
| H A D | nvidia,tegra124-dfll.txt | 1 NVIDIA Tegra124 DFLL FCPU clocksource 6 The DFLL IP block on Tegra is a root clocksource designed for clocking
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| /f-stack/freebsd/contrib/device-tree/Bindings/arm/ |
| H A D | gemini.txt | 42 See: clocksource/cortina,gemini-timer.txt
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