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Searched refs:clock_cell (Results 1 – 4 of 4) sorted by relevance

/f-stack/freebsd/arm/ti/clk/
H A Dti_mux_clock.c68 struct clock_cell_info clock_cell; member
157 read_clock_cells(sc->sc_dev, &sc->clock_cell); in ti_mux_attach()
159 create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef); in ti_mux_attach()
163 sc->mux_def.width = fls(sc->clock_cell.num_real_clocks-1); in ti_mux_attach()
165 sc->mux_def.width = fls(sc->clock_cell.num_real_clocks); in ti_mux_attach()
168 sc->clock_cell.num_real_clocks, sc->mux_def.width); in ti_mux_attach()
170 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef); in ti_mux_attach()
205 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef); in ti_mux_new_pass()
H A Dti_gate_clock.c69 struct clock_cell_info clock_cell; member
179 read_clock_cells(sc->sc_dev, &sc->clock_cell); in ti_gate_attach()
181 create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->gate_def.clkdef); in ti_gate_attach()
184 sc->gate_def.mask = (1 << fls(sc->clock_cell.num_real_clocks)) - 1; in ti_gate_attach()
186 sc->clock_cell.num_real_clocks, sc->gate_def.mask); in ti_gate_attach()
188 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->gate_def.clkdef); in ti_gate_attach()
228 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->gate_def.clkdef); in ti_gate_new_pass()
H A Dti_divider_clock.c66 struct clock_cell_info clock_cell; member
181 read_clock_cells(sc->sc_dev, &sc->clock_cell); in ti_divider_attach()
183 create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef); in ti_divider_attach()
185 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef); in ti_divider_attach()
226 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef); in ti_divider_new_pass()
H A Dti_dpll_clock.c69 struct clock_cell_info clock_cell; member
290 read_clock_cells(sc->dev, &sc->clock_cell); in ti_dpll_attach()
292 create_clkdef(sc->dev, &sc->clock_cell, &sc->dpll_def.clkdef); in ti_dpll_attach()
294 err = find_parent_clock_names(sc->dev, &sc->clock_cell, in ti_dpll_attach()
336 err = find_parent_clock_names(sc->dev, &sc->clock_cell, in ti_dpll_new_pass()