Searched refs:cfg1 (Results 1 – 4 of 4) sorted by relevance
| /f-stack/freebsd/mips/mips/ |
| H A D | cpu.c | 101 u_int32_t cfg1; in mips_get_identity() local
129 cfg1 = mips_rd_config1(); in mips_get_identity()
134 if (cfg1 & MIPS_CONFIG1_M) { in mips_get_identity()
141 if (cfg1 & MIPS_CONFIG1_FP) in mips_get_identity()
190 tmp = (cfg1 & MIPS_CONFIG1_IL_MASK) >> MIPS_CONFIG1_IL_SHIFT; in mips_get_identity()
204 tmp = (cfg1 & MIPS_CONFIG1_DL_MASK) >> MIPS_CONFIG1_DL_SHIFT; in mips_get_identity()
256 if (!(cfg1 & MIPS_CONFIG_CM)) { in mips_get_identity()
299 uint32_t cfg0, cfg1, cfg2, cfg3; in cpu_identify() local
429 cfg1 = mips_rd_config1(); in cpu_identify()
430 printf(" Config1=0x%b\n", cfg1, in cpu_identify()
[all …]
|
| /f-stack/freebsd/mips/atheros/ar531x/ |
| H A D | ar5312_chip.c | 121 uint32_t cfg0, cfg1; in ar5312_chip_device_start() local
126 cfg1 = ATH_READ_REG(AR5312_SDRAMCTL_BASE + AR5312_SDRAMCTL_MEM_CFG1); in ar5312_chip_device_start()
128 bank0 = __SHIFTOUT(cfg1, AR5312_MEM_CFG1_BANK0); in ar5312_chip_device_start()
129 bank1 = __SHIFTOUT(cfg1, AR5312_MEM_CFG1_BANK1); in ar5312_chip_device_start()
137 printf("SDRMCTL %x %x %x %x\n", cfg0, cfg1, size0, size1); in ar5312_chip_device_start()
|
| /f-stack/freebsd/arm64/freescale/imx/clk/ |
| H A D | imx_clk_frac_pll.c | 121 uint32_t cfg0, cfg1; in imx_clk_frac_pll_recalc() local
128 READ4(clk, sc->offset + CFG1, &cfg1); in imx_clk_frac_pll_recalc()
133 divff = (cfg1 & CFG1_FRAC_DIV_MASK) >> CFG1_FRAC_DIV_SHIFT; in imx_clk_frac_pll_recalc()
134 divfi = (cfg1 & CFG1_INT_DIV_MASK) >> CFG1_INT_DIV_SHIFT; in imx_clk_frac_pll_recalc()
|
| /f-stack/dpdk/drivers/net/qede/base/ |
| H A D | nvm_cfg.h | 2613 struct nvm_cfg1 cfg1; member
|