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Searched refs:c64x (Results 1 – 10 of 10) sorted by relevance

/f-stack/freebsd/contrib/device-tree/src/c6x/
H A Dtms320c6472.dtsi14 model = "ti,c64x+";
19 model = "ti,c64x+";
24 model = "ti,c64x+";
29 model = "ti,c64x+";
34 model = "ti,c64x+";
39 model = "ti,c64x+";
51 compatible = "ti,c64x+core-pic";
65 compatible = "ti,c64x+cache";
70 compatible = "ti,c64x+timer64";
76 compatible = "ti,c64x+timer64";
[all …]
H A Dtms320c6474.dtsi14 model = "ti,c64x+";
19 model = "ti,c64x+";
24 model = "ti,c64x+";
38 compatible = "ti,c64x+core-pic";
50 compatible = "ti,c64x+cache";
55 compatible = "ti,c64x+timer64";
61 compatible = "ti,c64x+timer64";
67 compatible = "ti,c64x+timer64";
73 compatible = "ti,c64x+dscr";
85 ti,c64x+pll-bypass-delay = <120>;
[all …]
H A Dtms320c6678.dtsi61 compatible = "ti,c64x+core-pic";
75 compatible = "ti,c64x+cache";
80 compatible = "ti,c64x+timer64";
86 compatible = "ti,c64x+timer64";
92 compatible = "ti,c64x+timer64";
98 compatible = "ti,c64x+timer64";
104 compatible = "ti,c64x+timer64";
110 compatible = "ti,c64x+timer64";
116 compatible = "ti,c64x+timer64";
122 compatible = "ti,c64x+timer64";
[all …]
H A Dtms320c6457.dtsi13 model = "ti,c64x+";
28 compatible = "ti,c64x+core-pic";
32 compatible = "ti,c64x+megamod-pic";
40 compatible = "ti,c64x+cache";
45 compatible = "ti,c64x+dscr";
57 compatible = "ti,c64x+timer64";
62 compatible = "ti,c6457-pll", "ti,c64x+pll";
64 ti,c64x+pll-bypass-delay = <300>;
65 ti,c64x+pll-reset-delay = <24000>;
66 ti,c64x+pll-lock-delay = <50000>;
H A Dtms320c6455.dtsi13 model = "ti,c64x+";
28 compatible = "ti,c64x+core-pic";
35 compatible = "ti,c64x+megamod-pic";
43 compatible = "ti,c64x+cache";
48 compatible = "ti,c64x+emifa", "simple-bus";
66 compatible = "ti,c64x+timer64";
72 compatible = "ti,c6455-pll", "ti,c64x+pll";
74 ti,c64x+pll-bypass-delay = <1440>;
75 ti,c64x+pll-reset-delay = <15360>;
76 ti,c64x+pll-lock-delay = <24000>;
[all …]
/f-stack/freebsd/contrib/device-tree/Bindings/c6x/
H A Dclocks.txt10 - compatible: "ti,c64x+pll"
24 - ti,c64x+pll-bypass-delay: CPU cycles to delay when entering bypass mode
26 - ti,c64x+pll-reset-delay: CPU cycles to delay after PLL reset
28 - ti,c64x+pll-lock-delay: CPU cycles to delay after PLL frequency change
33 compatible = "ti,c6472-pll", "ti,c64x+pll";
37 ti,c64x+pll-bypass-delay = <200>;
38 ti,c64x+pll-reset-delay = <12000>;
39 ti,c64x+pll-lock-delay = <80000>;
H A Demifa.txt9 - compatible: must be "ti,c64x+emifa", "simple-bus"
32 compatible = "ti,c64x+emifa", "simple-bus";
H A Ddscr.txt24 - compatible: must be "ti,c64x+dscr"
104 compatible = "ti,c64x+dscr";
/f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/
H A Dti,c64x+megamod-pic.txt13 - compatible: Should be "ti,c64x+core-pic";
26 compatible = "ti,c64x+core-pic";
45 - compatible: "ti,c64x+megamod-pic"
55 - ti,c64x+megamod-pic-mux: Array of 12 cells correspnding to the 12 core
68 interrupts mapped directly to the core with "ti,c64x+megamod-pic-mux" will
75 compatible = "ti,c64x+megamod-pic";
89 compatible = "ti,c64x+megamod-pic";
95 ti,c64x+megamod-pic-mux = < 0 0 0 0
/f-stack/freebsd/contrib/device-tree/Bindings/timer/
H A Dti,c64x+timer64.txt8 - compatible: must be "ti,c64x+timer64"
20 compatible = "ti,c64x+timer64";