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/f-stack/freebsd/contrib/device-tree/Bindings/fpga/
H A Daltera-hps2fpga-bridge.txt4 - regs : base address and size for AXI bridge module
6 "altr,socfpga-lwhps2fpga-bridge",
7 "altr,socfpga-hps2fpga-bridge", or
8 "altr,socfpga-fpga2hps-bridge"
15 fpga_bridge0: fpga-bridge@ff400000 {
20 bridge-enable = <0>;
23 fpga_bridge1: fpga-bridge@ff500000 {
24 compatible = "altr,socfpga-hps2fpga-bridge";
28 bridge-enable = <1>;
31 fpga_bridge2: fpga-bridge@ff600000 {
[all …]
H A Dfpga-bridge.txt4 - bridge-enable : 0 if driver should disable bridge at startup
5 1 if driver should enable bridge at startup
6 Default is to leave bridge in current state.
9 fpga_bridge3: fpga-bridge@ffc25080 {
10 compatible = "altr,socfpga-fpga2sdram-bridge";
12 bridge-enable = <0>;
H A Daltera-freeze-bridge.txt5 changes from passing through the bridge. The controller can also
7 bridge normally.
10 - compatible : Should contain "altr,freeze-bridge-controller"
11 - regs : base address and size for freeze bridge module
13 See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
17 compatible = "altr,freeze-bridge-controller";
19 bridge-enable = <0>;
H A Daltera-fpga2sdram-bridge.txt4 - compatible : Should contain "altr,socfpga-fpga2sdram-bridge"
6 See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
9 fpga_bridge3: fpga-bridge@ffc25080 {
10 compatible = "altr,socfpga-fpga2sdram-bridge";
12 bridge-enable = <0>;
H A Dxilinx-pr-decoupler.txt6 changes from passing through the bridge. The controller can also
8 bridge normally.
22 Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
25 fpga-bridge@100000450 {
31 bridge-enable = <0>;
H A Dfpga-region.txt184 contain the parent bridge.
210 bridge's region (0xff200000) and the hps bridge's region (0xc0000000) for use by
223 fpga_bridge0: fpga-bridge@ff400000 {
224 compatible = "altr,socfpga-lwhps2fpga-bridge";
239 fpga_bridge1: fpga-bridge@ff500000 {
240 compatible = "altr,socfpga-hps2fpga-bridge";
417 fpga-bridge@4400 {
418 compatible = "altr,freeze-bridge-controller";
429 fpga-bridge@4420 {
430 compatible = "altr,freeze-bridge-controller";
[all …]
/f-stack/freebsd/contrib/device-tree/Bindings/display/bridge/
H A Dsimple-bridge.yaml4 $id: http://devicetree.org/schemas/display/bridge/simple-bridge.yaml#
46 description: The bridge input
50 description: The bridge output
60 description: GPIO controlling bridge enable
64 description: Power supply for the bridge
74 bridge {
H A Dti,sn65dsi86.yaml4 $id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi86.yaml#
7 title: SN65DSI86 DSI to eDP bridge chip
13 The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP.
29 description: GPIO specifier for GPIO1 pin on bridge (active low).
34 Set if the HPD line on the bridge isn't hooked up to anything or is
132 If you have 1 logical lane the bridge supports routing
144 If you have 2 logical lanes the bridge supports
158 If you have 4 logical lanes the bridge supports
205 bridge@2d {
253 bridge@2d {
H A Dcdns,dsi.txt1 Cadence DSI bridge
4 The Cadence DSI bridge is a DPI to DSI bridge supporting up to 4 DSI lanes.
9 - interrupts: interrupt line connected to the DSI bridge.
10 - clocks: DSI bridge clocks.
H A Dps8622.txt1 ps8622-bridge bindings
5 - reg: first i2c address of the bridge
18 lvds-bridge@48 {
H A Dptn3460.txt1 ptn3460 bridge bindings
5 - reg: i2c address of the bridge
26 lvds-bridge@20 {
H A Dtoshiba,tc358764.txt1 TC358764 MIPI-DSI to LVDS panel bridge
13 0: DSI Input, not required, if the bridge is DSI controlled
20 bridge@0 {
H A Dtoshiba,tc358768.yaml4 $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358768.yaml#
7 title: Toschiba TC358768/TC358778 Parallel RGB to MIPI DSI bridge
13 The TC358768/TC358778 is bridge device which converts RGB to DSI.
125 dsi_bridge: dsi-bridge@e {
H A Dti,sn65dsi86.txt1 SN65DSI86 DSI to eDP bridge chip
4 This is the binding for Texas Instruments SN65DSI86 bridge.
34 - suspend-gpios: specification for GPIO1 pin on bridge (active low)
46 edp-bridge@2d {
/f-stack/freebsd/contrib/device-tree/Bindings/ata/
H A Dcortina,gemini-sata-bridge.txt3 The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
9 "cortina,gemini-sata-bridge"
37 - cortina,gemini-enable-sata-bridge: enables the PATA to SATA bridge
44 compatible = "cortina,gemini-sata-bridge";
54 cortina,gemini-enable-sata-bridge;
/f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/
H A Dmarvell,orion-intc.txt29 - compatible: shall be "marvell,orion-bridge-intc"
30 - reg: base address of bridge interrupt registers starting with CAUSE register
31 - interrupts: bridge interrupt of the main interrupt controller
36 - marvell,#interrupts: number of interrupts provided by bridge interrupt
41 compatible = "marvell,orion-bridge-intc";
46 /* Dove bridge provides 5 interrupts */
/f-stack/freebsd/contrib/device-tree/Bindings/mmc/
H A Dsocionext,uniphier-sd.yaml33 bridge: exist only for version 2.91
39 - const: bridge
45 - const: bridge
64 const: bridge
70 const: bridge
90 reset-names = "host", "bridge";
/f-stack/freebsd/contrib/device-tree/Bindings/sound/
H A Dst,sta350.txt23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
71 If present, power bridge correction for THD reduction near maximum
93 - st,bridge-immediate-off:
94 If present, the bridge will be switched off immediately after the
95 power-down-gpio goes low. Otherwise, the bridge will wait for 13
108 If present, the bridge power-down time will be divided by the provided
121 // (full-bridge) power,
126 st,max-power-correction; // enables power bridge
H A Dst,sta32x.txt27 0: 2-channel (full-bridge) power, 2-channel data-out
28 1: 2 (half-bridge). 1 (full-bridge) on-board power
67 If present, power bridge correction for THD reduction near maximum
91 // (full-bridge) power,
96 st,max-power-correction; // enables power bridge
/f-stack/freebsd/contrib/device-tree/Bindings/pci/
H A Dpci.txt11 Additionally to the properties specified in the above standards a host bridge
15 If present this property assigns a fixed PCI domain number to a host bridge,
20 number for each host bridge in the system must be unique.
32 root port to downstream device and host bridge drivers can do programming
40 tree, as children of the host bridge node. Even though those devices are
47 Identifies the PCI-PCI bridge. As defined in the IEEE Std 1275-1994
52 The bus number is defined by firmware, through the standard bridge
55 register of the bridge directly above this port. Otherwise, the bus
59 If firmware leaves the ARI Forwarding Enable bit set in the bridge
H A Dralink,rt3883-pci.txt29 interrupt controller and the PCI host bridge.
48 b) PCI host bridge:
71 The PCI host bridge node might have additional sub-nodes representing
80 If a given sub-node represents a PCI bridge it must have following
121 host-bridge {
148 pci-bridge@1 {
182 host-bridge {
183 pci-bridge@1 {
H A Dfsl,pci.txt3 Typically any Freescale PCI-X bridge hardware strapped into Agent mode
8 The property defined below will allow a PCI-X bridge to be used for bus
17 /* PCI-X bridge known to be PrPMC Monarch */
/f-stack/freebsd/contrib/device-tree/Bindings/clock/
H A Darmada3700-periph-clock.txt6 There are two different blocks associated to north bridge and south
7 bridge.
12 The following is a list of provided IDs for Armada 3700 North bridge clocks:
33 The following is a list of provided IDs for Armada 3700 South bridge clocks:
54 north bridge block, or
55 "marvell,armada-3700-periph-clock-sb" for the south bridge block
/f-stack/freebsd/contrib/device-tree/Bindings/soc/mediatek/
H A Dpwrap.txt15 bridge. In the binding description below the properties needed for bridging
33 "pwrap-bridge": bridge base (IP Pairing)
37 "pwrap-bridge" (IP Pairing)
57 reg-names = "pwrap", "pwrap-bridge";
61 reset-names = "pwrap", "pwrap-bridge";
/f-stack/freebsd/contrib/device-tree/Bindings/pinctrl/
H A Dmarvell,armada-37xx-pinctrl.txt4 south bridge and the other for the north bridge.
23 for the south bridge
25 for the north bridge
30 Available groups and functions for the North bridge:
104 Available groups and functions for the South bridge:

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