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Searched refs:UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE (Results 1 – 2 of 2) sorted by relevance

/f-stack/freebsd/arm/nvidia/tegra124/
H A Dtegra124_car.h273 #define UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE (1 << 5) macro
/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dtegra210_car.h381 #define UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE (1 << 5) macro