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Searched refs:SS (Results 1 – 22 of 22) sorted by relevance

/f-stack/freebsd/contrib/libsodium/src/libsodium/crypto_pwhash/argon2/
H A Dargon2-encoding.c243 #define SS(str) \ in encode_string() macro
258 SS(tmp); \ in encode_string()
277 SS("$argon2id$v="); break; in encode_string()
279 SS("$argon2i$v="); break; in encode_string()
288 SS("$m="); in encode_string()
290 SS(",t="); in encode_string()
292 SS(",p="); in encode_string()
295 SS("$"); in encode_string()
298 SS("$"); in encode_string()
302 #undef SS in encode_string()
/f-stack/freebsd/contrib/device-tree/Bindings/phy/
H A Dbrcm,stingray-usb-phy.txt5 - "brcm,sr-usb-combo-phy" is combo PHY has two PHYs, one SS and one HS.
10 the PHY number of two PHYs. 0 for HS PHY and 1 for SS PHY.
H A Dqcom-usb-ipq4019-phy.yaml7 title: Qualcom IPQ40xx Dakota HS/SS USB PHY
H A Dbrcm,sr-pcie-phy.txt5 - reg: base address and length of the PCIe SS register space
H A Dqcom,ipq806x-usb-phy-ss.yaml7 title: Qualcomm ipq806x usb DWC3 SS PHY CONTROLLER
H A Dsocionext,uniphier-usb3ss-phy.yaml7 title: Socionext UniPhier USB3 Super-Speed (SS) PHY
/f-stack/app/redis-5.0.5/deps/lua/src/
H A Dprint.c158 #define SS(x) (x==1)?"":"s" macro
159 #define S(x) x,SS(x)
175 f->numparams,f->is_vararg?"+":"",SS(f->numparams), in PrintHeader()
/f-stack/freebsd/contrib/device-tree/Bindings/connector/
H A Dusb-connector.yaml135 description: Super Speed (SS), present in SS capable connectors.
173 # to companion PMIC (max77865), SS lines to USB3 PHY and SBU to DisplayPort.
174 # DisplayPort video lines are routed to the connector via SS mux in USB3 PHY.
/f-stack/freebsd/contrib/device-tree/Bindings/media/
H A Drenesas,drif.txt9 | Master |-----SS-------->|SYNC DRIFn (slave) |
92 | Master |-----SS-------->|SYNC DRIFn (slave) |
140 | Master |-----SS-------->|SYNC DRIFn (slave) |
/f-stack/freebsd/contrib/device-tree/Bindings/usb/
H A Ddwc3-xilinx.txt7 "bus_clk" Master/Core clock, have to be >= 125 MHz for SS
H A Dqcom,dwc3.yaml45 for SS operation and >= 60MHz for HS operation.
68 - description: Must be >= 60 MHz in HS mode, >= 125 MHz in SS mode.
H A Drockchip,dwc3.txt10 "bus_clk" Master/Core clock, have to be >= 62.5 MHz for SS
H A Ddwc3.txt34 the second element is expected to be a handle to the USB3/SS PHY
49 - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
/f-stack/dpdk/lib/librte_eal/x86/
H A Drte_cpuflags.c86 FEAT_DEF(SS, 0x00000001, 0, RTE_REG_EDX, 27)
/f-stack/dpdk/drivers/net/axgbe/
H A Daxgbe_dev.c216 if (AXGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) != ss) in axgbe_set_speed()
217 AXGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, ss); in axgbe_set_speed()
/f-stack/freebsd/contrib/device-tree/Bindings/bus/
H A Dqcom,ebi2.txt21 memory is referred to as "Chip Peripheral SS FPB0" and is 168MB big.
/f-stack/freebsd/sys/
H A Dpmc.h246 __PMC_MODE(SS, 0) \
/f-stack/freebsd/contrib/device-tree/Bindings/net/
H A Dkeystone-netcp.txt52 - ranges: address range of NetCP (includes, Ethernet SS, PA and SA)
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dimx6qdl-aristainetos2.dtsi492 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0 /* spi bus #2 SS driver enable */
H A Dtegra124-apalis.dtsi1787 /* USBO1, USBO1 (SS), USBH2, USBH4 and USBH4 (SS) */
H A Dtegra124-apalis-v1.2.dtsi1794 /* USBO1, USBO1 (SS), USBH2, USBH4 and USBH4 (SS) */
/f-stack/freebsd/contrib/edk2/Include/Library/
H A DBaseLib.h5436 UINT16 SS; member
5597 UINT16 SS; member