Searched refs:QCA955X_PLL_CPU_CONFIG_REG (Results 1 – 2 of 2) sorted by relevance
72 #define QCA955X_PLL_CPU_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x00) macro
87 pll = ATH_READ_REG(QCA955X_PLL_CPU_CONFIG_REG); in qca955x_chip_detect_sys_frequency()