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Searched refs:PLL_BASE_ENABLE (Results 1 – 2 of 2) sorted by relevance

/f-stack/freebsd/arm/nvidia/tegra124/
H A Dtegra124_clk_pll.c70 #define PLL_BASE_ENABLE (1 << 30) macro
421 reg |= PLL_BASE_ENABLE; in pll_enable()
434 reg &= ~PLL_BASE_ENABLE; in pll_disable()
732 reg |= PLL_BASE_ENABLE; in pll_set_std()
744 reg &= ~PLL_BASE_ENABLE; in pll_set_std()
906 reg &= ~PLL_BASE_ENABLE; in pllx_set_freq()
926 reg |= PLL_BASE_ENABLE; in pllx_set_freq()
933 reg &= ~PLL_BASE_ENABLE; in pllx_set_freq()
997 if (reg & PLL_BASE_ENABLE) { in tegra124_pll_init()
/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dtegra210_clk_pll.c81 #define PLL_BASE_ENABLE (1 << 30) macro
607 reg |= PLL_BASE_ENABLE; in pll_enable()
620 reg &= ~PLL_BASE_ENABLE; in pll_disable()
930 reg |= PLL_BASE_ENABLE; in pll_set_std()
942 reg &= ~PLL_BASE_ENABLE; in pll_set_std()
1308 if (reg & PLL_BASE_ENABLE) { in tegra210_pll_init()