| /f-stack/freebsd/contrib/device-tree/Bindings/nvmem/ |
| H A D | vf610-ocotp.txt | 1 On-Chip OTP Memory for Freescale Vybrid
8 reg : Address and length of OTP controller and fuse map registers
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| H A D | lpc1850-otp.txt | 1 * NXP LPC18xx OTP memory
3 Internal OTP (One Time Programmable) memory for NXP LPC18xx/43xx devices.
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| H A D | brcm,ocotp.txt | 1 Broadcom OTP memory controller
8 - reg: Base address of the OTP controller.
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| H A D | imx-ocotp.yaml | 7 title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
13 This binding represents the on-chip eFuse OTP controller found on
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| H A D | mxs-ocotp.yaml | 7 title: On-Chip OTP Memory for Freescale i.MX23/i.MX28
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| H A D | rockchip-otp.txt | 1 Rockchip internal OTP (One Time Programmable) memory device tree bindings
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| H A D | st,stm32-romem.yaml | 11 flash, OTP, read-only HW regs... This contains various information such as:
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| /f-stack/freebsd/contrib/device-tree/Bindings/regulator/ |
| H A D | palmas-pmic.txt | 3 The tps659038 for the AM57x class have OTP spins that
5 is not a need to add the OTP spins to the palmas driver. The
35 For ti,palmas-pmic - smps12, smps123, smps3 depending on OTP,
50 ti,smps-range - OTP has the wrong range set for the hardware so override
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| /f-stack/freebsd/contrib/device-tree/Bindings/net/ |
| H A D | microchip,lan78xx.txt | 3 The LAN78XX devices are usually configured by programming their OTP or with
5 The Device Tree properties, if present, override the OTP and EEPROM.
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| /f-stack/freebsd/contrib/device-tree/Bindings/mfd/ |
| H A D | rohm,bd71837-pmic.yaml | 40 # down and OTP is reload. At the SNVS state all other logic and external
43 # reset is done via SNVS state the PMIC OTP data is not reload. This causes
46 # outputs will be returned to HW control by OTP loading. Thus the reset
63 # bootloader or OTP) is not touched.
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| H A D | rohm,bd71847-pmic.yaml | 43 # power outputs go down and OTP is reload. At the SNVS state all other logic
46 # state. When a reset is done via SNVS state the PMIC OTP data is not reload.
49 # power outputs will be returned to HW control by OTP loading. Thus the reset
66 # bootloader or OTP) is not touched.
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| H A D | palmas.txt | 31 hardware, if not set will use muxing in OTP.
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| H A D | da9062.txt | 35 modified to match the chip's OTP settings).
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| H A D | da9063.txt | 18 modified to match the chip's OTP settings).
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| H A D | rohm,bd71828-pmic.yaml | 66 Usage of BD71828 GPIO pins can be changed via OTP. This property can be
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| /f-stack/freebsd/contrib/device-tree/Bindings/net/wireless/ |
| H A D | mediatek,mt76.txt | 28 - mediatek,eeprom-merge-otp: Merge EEPROM data with OTP data. Can be used on
30 data should be pulled from the OTP ROM
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| /f-stack/freebsd/contrib/device-tree/Bindings/arm/samsung/ |
| H A D | exynos-chipid.yaml | 24 is missing in the CHIPID registers or in the OTP memory.
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| /f-stack/freebsd/contrib/device-tree/Bindings/input/ |
| H A D | ti,palmas-pwrbutton.txt | 18 NOTE: This depends on OTP support and POWERHOLD signal configuration
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| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | berlin2cd-valve-steamlink.dts | 42 * less depending on leakage value in OTP), and buck2 likely used for
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| H A D | imx6q-gk802.dts | 66 /* SDMC DM2016 1024 bit EEPROM + 128 bit OTP */
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| /f-stack/freebsd/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | eeprom.diff | 186 + * OTP path works.
267 + ath_hal_printf(ah, "%s: trying OTP, try_address=0x%x\n",
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| H A D | osprey_reg_map.h | 2498 volatile u_int32_t OTP; /* 0xc8 - 0xcc */ member
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| /f-stack/freebsd/contrib/device-tree/src/arm64/nvidia/ |
| H A D | tegra210-smaug.dts | 1384 * set by OTP) and down properly.
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