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Searched refs:MS (Results 1 – 25 of 27) sorted by relevance

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/f-stack/dpdk/drivers/net/txgbe/base/
H A Dtxgbe_regs.h155 #define TXGBE_RST_SW MS(0, 0x1)
157 #define TXGBE_RST_FW MS(3, 0x1)
165 #define TXGBE_STAT_MNGINIT MS(0, 0x1)
166 #define TXGBE_STAT_MNGVETO MS(8, 0x1)
167 #define TXGBE_STAT_ECCLAN0 MS(16, 0x1)
168 #define TXGBE_STAT_ECCLAN1 MS(17, 0x1)
169 #define TXGBE_STAT_ECCMNG MS(18, 0x1)
170 #define TXGBE_STAT_ECCPCIE MS(19, 0x1)
171 #define TXGBE_STAT_ECCPCIW MS(20, 0x1)
198 #define TXGBE_SPIDAT_OPDONE MS(0, 0x1)
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/f-stack/dpdk/drivers/net/txgbe/
H A Dtxgbe_rxtx.h74 #define TXGBE_RXD_SPH MS(31, 0x1)
90 #define TXGBE_RXD_STAT_DD MS(0, 0x1) /* Descriptor Done */
91 #define TXGBE_RXD_STAT_EOP MS(1, 0x1) /* End of Packet */
96 #define TXGBE_RXD_PKT_CLS_MASK MS(2, 0x7) /* Packet Class */
108 #define TXGBE_RXD_STAT_VEXT MS(11, 0x1) /* Multi-VLAN */
122 #define TXGBE_RXD_ERR_RXE MS(29, 0x1) /* Any MAC Error */
124 #define TXGBE_RXD_ERR_IPCS MS(31, 0x1) /* IP xsum error */
133 #define TXGBE_RXD_FCERR_MASK MS(20, 0x7) /* FCERR */
176 #define TXGBE_TXD_FCOEF_EOF_MASK MS(10, 0x3) /* FC EOF index */
181 #define TXGBE_TXD_FCOEF_SOF MS(12, 0x1) /* FC SOF index */
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/f-stack/freebsd/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_recv_ds.c52 if (MS(rxsp->ds_info, AR_desc_id) != 0x168c) { in ar9300_proc_rx_desc_fast()
77 rxs->rs_rssi = MS(rxsp->status5, AR_rx_rssi_combined); in ar9300_proc_rx_desc_fast()
78 rxs->rs_rssi_ctl[0] = MS(rxsp->status1, AR_rx_rssi_ant00); in ar9300_proc_rx_desc_fast()
79 rxs->rs_rssi_ctl[1] = MS(rxsp->status1, AR_rx_rssi_ant01); in ar9300_proc_rx_desc_fast()
80 rxs->rs_rssi_ctl[2] = MS(rxsp->status1, AR_rx_rssi_ant02); in ar9300_proc_rx_desc_fast()
81 rxs->rs_rssi_ext[0] = MS(rxsp->status5, AR_rx_rssi_ant10); in ar9300_proc_rx_desc_fast()
82 rxs->rs_rssi_ext[1] = MS(rxsp->status5, AR_rx_rssi_ant11); in ar9300_proc_rx_desc_fast()
85 rxs->rs_keyix = MS(rxsp->status11, AR_key_idx); in ar9300_proc_rx_desc_fast()
90 rxs->rs_rate = MS(rxsp->status1, AR_rx_rate); in ar9300_proc_rx_desc_fast()
103 rxs->rs_ness = MS(rxsp->status4, AR_rx_ness); in ar9300_proc_rx_desc_fast()
[all …]
H A Dar9300_xmit_ds.c292 (MS(dsinfo, AR_tx_rx_desc) != 1)) in ar9300_proc_tx_desc()
303 ts->ts_queue_id = MS(dsinfo, AR_tx_qcu_num); in ar9300_proc_tx_desc()
304 ts->ts_desc_id = MS(ads->status1, AR_tx_desc_id); in ar9300_proc_tx_desc()
305 ts->ts_seqnum = MS(ads->status8, AR_seq_num); in ar9300_proc_tx_desc()
364 ts->ts_tid = MS(ads->status8, AR_tx_tid); in ar9300_proc_tx_desc()
411 MS(ads->ds_ctl15, AR_packet_dur0)); in ar9300_calc_tx_airtime()
417 MS(ads->ds_ctl15, AR_packet_dur1)) + in ar9300_calc_tx_airtime()
419 MS(ads->ds_ctl15, AR_packet_dur0)); in ar9300_calc_tx_airtime()
425 MS(ads->ds_ctl16, AR_packet_dur2)) + in ar9300_calc_tx_airtime()
427 MS(ads->ds_ctl15, AR_packet_dur1)) + in ar9300_calc_tx_airtime()
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H A Dar9300_aic.c304 cal_sram[i].valid = MS(value, AR_PHY_AIC_SRAM_VALID); in ar9300_aic_cal_post_process()
305 cal_sram[i].rot_quad_att_db = MS(value, in ar9300_aic_cal_post_process()
614 MS(aic_stat, AR_PHY_AIC_CAL_DONE), in ar9300_aic_calibration()
615 MS(aic_stat, AR_PHY_AIC_CAL_ACTIVE), in ar9300_aic_calibration()
616 MS(aic_stat, AR_PHY_AIC_MEAS_COUNT)); in ar9300_aic_calibration()
619 MS(aic_stat, AR_PHY_AIC_CAL_ANT_ISO_EST), in ar9300_aic_calibration()
620 MS(aic_stat, AR_PHY_AIC_CAL_HOP_COUNT), in ar9300_aic_calibration()
621 MS(aic_stat, AR_PHY_AIC_CAL_VALID_COUNT)); in ar9300_aic_calibration()
630 MS(aic_stat, AR_PHY_AIC_MEAS_MAG_MIN), in ar9300_aic_calibration()
631 MS(aic_stat, AR_PHY_AIC_CAL_AIC_SM), in ar9300_aic_calibration()
[all …]
H A Dar9300_radar.c331 temp = MS(val, AR_PHY_RADAR_0_FIRPWR);
334 pe->pe_rrssi = MS(val, AR_PHY_RADAR_0_RRSSI);
335 pe->pe_height = MS(val, AR_PHY_RADAR_0_HEIGHT);
336 pe->pe_prssi = MS(val, AR_PHY_RADAR_0_PRSSI);
337 pe->pe_inband = MS(val, AR_PHY_RADAR_0_INBAND);
338 pe->pe_enabled = !! MS(val, AR_PHY_RADAR_0_ENA);
342 pe->pe_relpwr = MS(val, AR_PHY_RADAR_1_RELPWR_THRESH);
345 pe->pe_relstep = MS(val, AR_PHY_RADAR_1_RELSTEP_THRESH);
348 pe->pe_maxlen = MS(val, AR_PHY_RADAR_1_MAXLEN);
H A Dar9300_misc.c438 mac_rev = MS(v, AR_SREV_REVISION2); in ar9300_detect_card_present()
440 mac_version = MS(v, AR_SREV_VERSION); in ar9300_detect_card_present()
1442 MS(reg, AR_PHY_DESIRED_SZ_TOT_DES), in ar9300_dma_reg_dump()
1445 MS(reg, AR_PHY_DESIRED_SZ_ADC), in ar9300_dma_reg_dump()
1446 MS(reg, AR_PHY_DESIRED_SZ_ADC)); in ar9300_dma_reg_dump()
1449 MS(reg, AR_PHY_FIND_SIG_FIRSTEP), in ar9300_dma_reg_dump()
1450 MS(reg, AR_PHY_FIND_SIG_FIRSTEP)); in ar9300_dma_reg_dump()
1453 MS(reg, AR_PHY_AGC_COARSE_HIGH), in ar9300_dma_reg_dump()
1454 MS(reg, AR_PHY_AGC_COARSE_HIGH)); in ar9300_dma_reg_dump()
1456 MS(reg, AR_PHY_AGC_COARSE_LOW), in ar9300_dma_reg_dump()
[all …]
H A Dar9300_spectral.c431 ss->ss_fft_period = MS(val, AR_PHY_SPECTRAL_SCAN_FFT_PERIOD); in ar9300_get_spectral_params()
432 ss->ss_period = MS(val, AR_PHY_SPECTRAL_SCAN_PERIOD); in ar9300_get_spectral_params()
433 ss->ss_count = MS(val, AR_PHY_SPECTRAL_SCAN_COUNT); in ar9300_get_spectral_params()
479 return MS(val, AR_PHY_SPECTRAL_SCAN_ACTIVE); in ar9300_is_spectral_active()
488 return MS(val, AR_PHY_SPECTRAL_SCAN_ENABLE); in ar9300_is_spectral_enabled()
597 nf = MS(OS_REG_READ(ah, AR_PHY_CCA_0), AR_PHY_MINCCA_PWR); in ar9300_get_ctl_chan_nf()
617 nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR); in ar9300_get_ext_chan_nf()
H A Dar9300_ani.c313 ani_state->ini_def.m1_thresh = MS(val, AR_PHY_SFCORR_M1_THRESH); in ar9300_ani_init_defaults()
314 ani_state->ini_def.m2_thresh = MS(val, AR_PHY_SFCORR_M2_THRESH); in ar9300_ani_init_defaults()
315 ani_state->ini_def.m2_count_thr = MS(val, AR_PHY_SFCORR_M2COUNT_THR); in ar9300_ani_init_defaults()
319 MS(val, AR_PHY_SFCORR_LOW_M1_THRESH_LOW); in ar9300_ani_init_defaults()
321 MS(val, AR_PHY_SFCORR_LOW_M2_THRESH_LOW); in ar9300_ani_init_defaults()
323 MS(val, AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW); in ar9300_ani_init_defaults()
326 ani_state->ini_def.m1_thresh_ext = MS(val, AR_PHY_SFCORR_EXT_M1_THRESH); in ar9300_ani_init_defaults()
327 ani_state->ini_def.m2_thresh_ext = MS(val, AR_PHY_SFCORR_EXT_M2_THRESH); in ar9300_ani_init_defaults()
329 MS(val, AR_PHY_SFCORR_EXT_M1_THRESH_LOW); in ar9300_ani_init_defaults()
331 MS(val, AR_PHY_SFCORR_EXT_M2_THRESH_LOW); in ar9300_ani_init_defaults()
H A Dar9300_mci.c80 thresh = MS(ah->ah_config.ath_hal_mci_config, in ar9300_mci_osla_setup()
1027 uint8_t ant = MS(ah->ah_config.ath_hal_mci_config, in ar9300_mci_reset()
1101 (MS(pmax_tx_pwr[2], in ar9300_mci_reset()
1131 regval = MS(ah->ah_config.ath_hal_mci_config, in ar9300_mci_reset()
1435 value = MS(OS_REG_READ(ah, AR_MCI_GPM_1), AR_MCI_GPM_WRITE_PTR); in ar9300_mci_state()
1455 gpm_ptr = MS(OS_REG_READ(ah, AR_MCI_GPM_1), AR_MCI_GPM_WRITE_PTR); in ar9300_mci_state()
1530 value = MS(OS_REG_READ(ah, AR_MCI_RX_STATUS), in ar9300_mci_state()
1578 value = MS(OS_REG_READ(ah, AR_MCI_RX_STATUS), in ar9300_mci_state()
1583 value = MS(ahp->ah_mci_cont_status, in ar9300_mci_state()
1588 value = MS(ahp->ah_mci_cont_status, in ar9300_mci_state()
[all …]
H A Dar9300_attach.c145 p_counters->uc_receiver_errors = MS(val, RCVD_ERR_MASK); in ar9300_read_pcie_error_monitor()
146 p_counters->uc_bad_tlp_errors = MS(val, BAD_TLP_ERR_MASK); in ar9300_read_pcie_error_monitor()
147 p_counters->uc_bad_dllp_errors = MS(val, BAD_DLLP_ERR_MASK); in ar9300_read_pcie_error_monitor()
151 p_counters->uc_replay_timeout_errors = MS(val, RPLY_TO_ERR_MASK); in ar9300_read_pcie_error_monitor()
152 p_counters->uc_replay_number_rollover_errors= MS(val, RPLY_NUM_RO_ERR_MASK); in ar9300_read_pcie_error_monitor()
601 AH_PRIVATE(ah)->ah_macRev = MS(val, AR_SREV_REVISION2); in ar9300_read_revisions()
618 AH_PRIVATE(ah)->ah_macRev = MS(val, AR_SREV_REVISION2); in ar9300_read_revisions()
2803 p_cap->halTotalQueues = MS(cap_field, AR_EEPROM_EEPCAP_MAXQCU); in ar9300_fill_capability_info()
2810 1 << MS(cap_field, AR_EEPROM_EEPCAP_KC_ENTRIES); in ar9300_fill_capability_info()
2885 ahp->ah_gpio_select = MS(ahpriv->ah_rfsilent, EEP_RFSILENT_GPIO_SEL); in ar9300_fill_capability_info()
[all …]
H A Dar9300_interrupts.c299 MS(s5, AR_ISR_S5_GENTIMER_TRIG); in ar9300_get_pending_interrupts()
301 MS(s5, AR_ISR_S5_GENTIMER_THRESH); in ar9300_get_pending_interrupts()
H A Dar9300_freebsd.c96 u_int clks = MS(OS_REG_READ(ah, AR_TIME_OUT), AR_TIME_OUT_CTS); in ar9300_freebsd_get_cts_timeout()
780 keyType = MS(ads->ds_ctl17, AR_encr_type); in ar9300_freebsd_fill_tx_desc()
H A Dar9300_xmit.c58 cur_level = MS(txcfg, AR_FTRIG); in ar9300_update_tx_trig_level()
376 if (MS(qmisc, AR_Q_MISC_FSP) != AR_Q_MISC_FSP_ASAP) { in ar9300_reset_tx_queue()
H A Dar9300_gpio.c405 return (MS(gpio_in, AR_GPIO_IN_VAL) & AR_GPIO_BIT(gpio)) != 0; in ar9300_gpio_get()
H A Dar9300_reset.c352 nf = MS(OS_REG_READ(ah, AR_PHY_CCA_0), AR9280_PHY_MINCCA_PWR); in ar9300_get_min_cca_pwr()
5359 == HAL_OK) && (((MS((AH9300(ah)->ah_bb_panic_last_status), in ar9300_reset()
5368 ahp->ah_radar1 = MS(OS_REG_READ(ah, AR_PHY_RADAR_1), in ar9300_reset()
5370 ahp->ah_dc_offset = MS(OS_REG_READ(ah, AR_PHY_TIMING2), in ar9300_reset()
5372 ahp->ah_disable_cck = MS(OS_REG_READ(ah, AR_PHY_MODE), in ar9300_reset()
H A Dar9300_eeprom.c238 *data = MS(OS_REG_READ(ah, in ar9300_eeprom_read_word()
2813 max_pwr = MS(mci_concur_tx_max_pwr[2][1], in ar9300_eeprom_set_power_per_rate_table()
2863 max_pwr = MS(mci_concur_tx_max_pwr[3][1], in ar9300_eeprom_set_power_per_rate_table()
/f-stack/freebsd/contrib/octeon-sdk/
H A Dcvmx-spi.c231 uint64_t MS = cvmx_clock_get_rate(CVMX_CLOCK_CORE) / 1000; in cvmx_spi_reset_cb() local
245 cvmx_wait (10 * MS); in cvmx_spi_reset_cb()
287 cvmx_wait (100 * MS); in cvmx_spi_reset_cb()
294 cvmx_wait (100 * MS); in cvmx_spi_reset_cb()
446 timeout_time = cvmx_get_cycle() + 1000ull * MS * timeout; in cvmx_spi_clock_detect_cb()
470 timeout_time = cvmx_get_cycle() + 1000ull * MS * timeout; in cvmx_spi_clock_detect_cb()
529 cvmx_wait (1000 * MS); in cvmx_spi_training_cb()
538 cvmx_wait (1000 * MS); in cvmx_spi_training_cb()
542 timeout_time = cvmx_get_cycle() + 1000ull * MS * 10; in cvmx_spi_training_cb()
579 uint64_t MS = cvmx_clock_get_rate(CVMX_CLOCK_CORE) / 1000; in cvmx_spi_calendar_sync_cb() local
[all …]
/f-stack/dpdk/drivers/net/kni/
H A Drte_eth_kni.c111 #define MS 1000 in kni_handle_request() macro
115 usleep(500 * MS); in kni_handle_request()
/f-stack/dpdk/drivers/raw/ifpga/
H A Difpga_rawdev.c498 #define MS 1000 in ifpga_rawdev_gsd_handle() macro
517 rte_delay_us(100 * MS); in ifpga_rawdev_gsd_handle()
/f-stack/dpdk/drivers/net/ipn3ke/
H A Dipn3ke_representor.c2579 #define MS 1000 in ipn3ke_rpst_scan_handle_request() macro
2591 rte_delay_us(1 * MS); in ipn3ke_rpst_scan_handle_request()
2593 rte_delay_us(50 * MS); in ipn3ke_rpst_scan_handle_request()
/f-stack/dpdk/config/
H A Dmeson.build17 # MS linker requires special treatment.
/f-stack/freebsd/contrib/zlib/doc/
H A Drfc1952.txt368 may cause problems for MS-DOS and other systems that use
399 0 - FAT filesystem (MS-DOS, OS/2, NT/Win32)
/f-stack/freebsd/mips/mips/
H A Dfp.S1976 move ta2, t2 # save unrounded fraction (MS)
2084 move t2, ta2 # get unrounded fraction (MS)
/f-stack/freebsd/contrib/zlib/
H A DChangeLog782 - Add project for MS Visual C++ 6.0 in projects/visualc6 [Cadieux, Truta]
1465 - avoid the ERROR symbol which is used by MS Windows

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