Searched refs:MDIO_WC_REG_RX66_SCW3_MASK (Results 1 – 2 of 2) sorted by relevance
5815 #define MDIO_WC_REG_RX66_SCW3_MASK 0x83c9 macro
687 #define MDIO_WC_REG_RX66_SCW3_MASK 0x83c9 macro5031 MDIO_WC_REG_RX66_SCW3_MASK, 0xF0F0); in elink_warpcore_set_20G_DXGXS()