Searched refs:MDIO_WC_REG_COMBO_IEEE0_MIICTRL (Results 1 – 2 of 2) sorted by relevance
706 #define MDIO_WC_REG_COMBO_IEEE0_MIICTRL 0xffe0 macro5068 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, in elink_warpcore_set_sgmii_speed()5073 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); in elink_warpcore_set_sgmii_speed()5094 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, val16); in elink_warpcore_set_sgmii_speed()5099 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); in elink_warpcore_set_sgmii_speed()5173 {MDIO_WC_DEVAD, MDIO_WC_REG_COMBO_IEEE0_MIICTRL, 0x0140} in elink_warpcore_clear_regs()5478 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, 0xBFFF); in elink_warpcore_link_reset()5555 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, in elink_set_warpcore_loopback()
5834 #define MDIO_WC_REG_COMBO_IEEE0_MIICTRL 0xffe0 macro