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Searched refs:JZ_LP1CDR (Results 1 – 2 of 2) sorted by relevance

/f-stack/freebsd/mips/ingenic/
H A Djz4780_clock.c245 MUX(JZ_LP1CDR, 30, 2, 0xe),
246 DIV(JZ_LP1CDR, 0, 0, 8, 28, 27, 26),
H A Djz4780_regs.h216 #define JZ_LP1CDR 0x00000064 /* LCD1 pix clock divider register */ macro