Searched refs:IMX6QDL_CLK_PLL5_VIDEO_DIV (Results 1 – 5 of 5) sorted by relevance
65 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,66 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
388 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,389 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
218 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
222 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,223 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
205 #define IMX6QDL_CLK_PLL5_VIDEO_DIV 195 macro