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Searched refs:Delay (Results 1 – 25 of 52) sorted by relevance

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/f-stack/freebsd/contrib/device-tree/Bindings/mmc/
H A Dsdhci-sprd.txt33 - sprd,phy-delay-legacy: Delay value for legacy timing.
34 - sprd,phy-delay-sd-highspeed: Delay value for SD high-speed timing.
35 - sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing.
36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.
37 - sprd,phy-delay-mmc-highspeed: Delay value for MMC high-speed timing.
38 - sprd,phy-delay-mmc-ddr52: Delay value for MMC DDR52 timing.
39 - sprd,phy-delay-mmc-hs200: Delay value for MMC HS200 timing.
40 - sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing.
41 - sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing.
H A Dmmc-pwrseq-simple.txt19 - post-power-on-delay-ms : Delay in ms after powering the card and
21 - power-off-delay-us : Delay in us after asserting the reset-gpios (if any)
H A Dmmc-pwrseq-simple.yaml40 Delay in ms after powering the card and de-asserting the
46 Delay in us after asserting the reset-gpios (if any)
H A Dfsl-imx-esdhc.txt31 This is used to set the clock delay for DLL(Delay Line) on override mode
34 chapter, DLL (Delay Line) section in RM for details.
H A Dfsl-imx-esdhc.yaml57 This is used to set the clock delay for DLL(Delay Line) on override mode
60 chapter, DLL (Delay Line) section in RM for details.
/f-stack/freebsd/contrib/device-tree/Bindings/mtd/
H A Dcadence-quadspi.txt27 - cdns,read-delay : Delay for read capture logic, in clock cycles
28 - cdns,tshsl-ns : Delay in nanoseconds for the length that the master
31 - cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
33 - cdns,tchsh-ns : Delay in nanoseconds between last bit of current
36 - cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
H A Dlpc32xx-slc.txt11 - nxp,wdr-clks: Delay before Ready signal is tested on write (W_RDY)
12 - nxp,rdr-clks: Delay before Ready signal is tested on read (R_RDY)
/f-stack/freebsd/contrib/device-tree/Bindings/memory-controllers/
H A Darm,pl172.txt67 - mpmc,write-enable-delay: Delay from chip select assertion to write
70 - mpmc,output-enable-delay: Delay from chip select assertion to output
73 - mpmc,write-access-delay: Delay from chip select assertion to write
76 - mpmc,read-access-delay: Delay from chip select assertion to read
79 - mpmc,page-mode-read-delay: Delay for asynchronous page mode sequential
82 - mpmc,turn-round-delay: Delay between access to memory banks in nano
/f-stack/freebsd/contrib/device-tree/Bindings/sound/
H A Ddmic.txt11 - wakeup-delay-ms: Delay (in ms) after enabling the DMIC
12 - modeswitch-delay-ms: Delay (in ms) to complete DMIC mode switch
/f-stack/freebsd/contrib/device-tree/Bindings/power/reset/
H A Dgpio-restart.txt40 - active-delay: Delay (default 100) to wait after driving gpio active [ms]
41 - inactive-delay: Delay (default 100) to wait after driving gpio inactive [ms]
42 - wait-delay: Delay (default 3000) to wait after completing restart
H A Dgpio-poweroff.txt30 - active-delay-ms: Delay (default 100) to wait after driving gpio active
31 - inactive-delay-ms: Delay (default 100) to wait after driving gpio inactive
/f-stack/freebsd/contrib/device-tree/Bindings/net/
H A Dadi,adin.yaml21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
H A Dmdio.yaml44 Delay after reset deassert in microseconds. It applies to all MDIO
92 Delay after the reset was asserted in microseconds. If this
97 Delay after the reset was deasserted in microseconds. If
H A Dethernet-phy.yaml152 Delay after the reset was asserted in microseconds. If this
157 Delay after the reset was deasserted in microseconds. If
167 RGMII Receive PHY Clock Delay defined in pico seconds. This is used for
173 RGMII Transmit PHY Clock Delay defined in pico seconds. This is used for
H A Dcavium-pip.txt40 - rx-delay: Delay value for RGMII receive clock. Optional. Disabled if 0.
43 - tx-delay: Delay value for RGMII transmit clock. Optional. Disabled if 0.
H A Dti,dp83869.yaml68 description: Delay is in pico seconds
74 description: Delay is in pico seconds
H A Drockchip-dwmac.txt43 - tx_delay: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
44 - rx_delay: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
H A Dapm-xgene-enet.txt42 - tx-delay: Delay value for RGMII bridge TX clock.
46 - rx-delay: Delay value for RGMII bridge RX clock.
H A Dti,dp83867.yaml69 RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h
76 RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
/f-stack/freebsd/contrib/device-tree/Bindings/serial/
H A Drs485.yaml22 - description: Delay between rts signal and beginning of data sent in
26 - description: Delay between end of data sent and rts signal in milliseconds.
/f-stack/freebsd/contrib/device-tree/Bindings/leds/backlight/
H A Dpwm-backlight.txt13 - post-pwm-on-delay-ms: Delay in ms between setting an initial (non-zero) PWM
15 - pwm-off-delay-ms: Delay in ms between disabling the backlight using GPIO
H A Dpwm-backlight.yaml34 Delay in ms between setting an initial (non-zero) PWM and enabling the
39 Delay in ms between disabling the backlight using GPIO and setting PWM
/f-stack/freebsd/contrib/device-tree/Bindings/spi/
H A Dspi-controller.yaml126 Delay, in microseconds, after a read transfer.
137 Delay, in microseconds, after a write transfer.
/f-stack/freebsd/contrib/device-tree/Bindings/mfd/
H A Dtwl4030-audio.txt14 - ti,digimic_delay: Delay need after enabling the digimic to reduce artifacts
/f-stack/freebsd/contrib/device-tree/Bindings/display/tilcdc/
H A Dpanel.txt10 - fdd: FIFO DMA Request Delay

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