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/f-stack/freebsd/contrib/device-tree/Bindings/
H A Dsubmitting-patches.rst4 Submitting devicetree (DT) binding patches
22 2) DT binding files are written in DT schema format using json-schema
23 vocabulary and YAML file format. The DT binding files must pass validation
30 3) DT binding files should be dual licensed. The preferred license tag is
37 and Cc: the DT maintainers. Use scripts/get_maintainer.pl to identify
38 all of the DT maintainers.
44 previously documented in the corresponding DT binding text file
49 ("checkpatch: add DT compatible string documentation checks"). ]
/f-stack/freebsd/contrib/device-tree/Bindings/sifive/
H A Dsifive-blocks-ip-versioning.txt1 DT compatible string versioning for SiFive open-source IP blocks
3 This document describes the version specification for DT "compatible"
9 IP block-specific DT compatible strings are contained within the HDL,
28 DT data authors, when writing data for a particular SoC, should
/f-stack/freebsd/contrib/device-tree/Bindings/net/nfc/
H A Dst95hf.txt4 ST95HF node should be defined in DT as SPI slave device of SPI
6 The properties defined below are required to be the part of DT
26 phandle to ST95HF transceiver's regulator supply node in DT.
/f-stack/freebsd/contrib/device-tree/Bindings/timer/
H A Dsifive,clint.yaml19 The clock frequency of CLINT is specified via "timebase-frequency" DT
20 property of "/cpus" DT node. The "timebase-frequency" DT property is
/f-stack/freebsd/contrib/device-tree/Bindings/pci/
H A Dti-pci.txt36 - ti,syscon-unaligned-access: phandle to the syscon DT node. The 1st argument
54 - ti,syscon-unaligned-access: phandle to the syscon DT node. The 1st argument
63 NOTE: Two DT nodes may be added for each PCI controller; one for host
65 work in host mode, EP mode DT node should be disabled and in order to PCI to
66 work in EP mode, host mode DT node should be disabled. Host mode and EP
H A Dsamsung,exynos5440-pcie.txt23 SoC-specific DT Entry (with using PHY framework):
50 Board-specific DT Entry:
H A Dpci-keystone.txt9 for the details of DesignWare DT bindings. Additional properties are
69 DesignWare DT Properties not applicable for Keystone PCI
100 ("phys" and "phy-names" DT bindings are specified in
H A Dxilinx-pcie.txt1 * Xilinx AXI PCIe Root Port Bridge DT description
34 created a interrupt controller node to support 'interrupt-map' DT
/f-stack/freebsd/contrib/device-tree/Bindings/media/
H A Ds5p-mfc.txt40 SoC specific DT entry:
51 Reserved memory specific DT entry for given board (see reserved memory binding
72 Board specific DT entry:
/f-stack/freebsd/contrib/device-tree/Bindings/pwm/
H A Dnvidia,tegra20-pwm.txt28 DT node as detailed in the pinctrl DT binding document
52 Following will be DT binding to achieve this:
/f-stack/freebsd/contrib/device-tree/Bindings/usb/
H A Dgeneric.txt7 "low-speed". In case this isn't passed via DT, USB
13 passed via DT, USB DRD controllers should default to
18 In case this isn't passed via DT, USB controllers should
/f-stack/freebsd/contrib/device-tree/Bindings/cpufreq/
H A Dcpufreq-dt.txt3 It is a generic DT based cpufreq driver for frequency management. It supports
15 details. OPPs *must* be supplied either via DT, i.e. this property, or
H A Dcpufreq-st.txt7 the DT and operate in the usual way.
9 For more information about the expected DT format [See: ../opp/opp.txt].
/f-stack/freebsd/contrib/device-tree/Bindings/thermal/
H A Dmax77620_thermal.txt15 For more details, please refer generic thermal DT binding document
18 Please refer <devicetree/bindings/mfd/max77620.txt> for mfd DT binding
/f-stack/freebsd/contrib/device-tree/Bindings/media/xilinx/
H A Dxlnx,video.txt9 and IP core specific documentation, xlnx,v-*.txt, in this directory. The DT
22 - ports: Video port, using the DT bindings defined in ../video-interfaces.txt.
/f-stack/freebsd/contrib/device-tree/Bindings/clock/sifive/
H A Dfu540-prci.txt26 /* under /, in PCB-specific DT data */
40 /* under /soc, in SoC-specific DT data */
/f-stack/freebsd/contrib/device-tree/Bindings/sound/
H A Dcs4271.txt1 Cirrus Logic CS4271 DT bindings
30 in the MODE2 register. This workaround can be enabled with this DT
H A Dqcom,msm8916-wcd-analog.txt30 - vdd-cdc-io-supply: phandle to VDD_CDC_IO regulator DT node.
31 - vdd-cdc-tx-rx-cx-supply: phandle to VDD_CDC_TX/RX/CX regulator DT node.
32 - vdd-micbias-supply: phandle of VDD_MICBIAS supply's regulator DT node.
H A Dimg,pistachio-internal-dac.txt1 Pistachio internal DAC DT bindings
H A Dpcm179x.txt1 Texas Instruments pcm179x DT bindings
H A Dpcm1789.txt1 Texas Instruments pcm1789 DT bindings
/f-stack/freebsd/contrib/device-tree/Bindings/reset/
H A Dreset.txt15 specifier - a list of DT cells that represents the reset signal within the
23 the DT node of each affected HW block, since if activated, an unrelated block
24 may be reset. Instead, reset signals should be represented in the DT node
/f-stack/freebsd/contrib/device-tree/Bindings/display/exynos/
H A Dexynos7-decon.txt42 SoC specific DT entry:
59 Board specific DT entry:
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dstm32mp157a-avenger96.dts10 /* This DT is here only for backward compatibility */
/f-stack/freebsd/contrib/device-tree/Bindings/dma/
H A Drenesas,shdma.txt6 SHDMA DT nodes to be placed under a DMA multiplexer node. All such compatible
8 descriptors. Therefore respective DMA DT bindings can also all be placed in the

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