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/f-stack/freebsd/contrib/device-tree/Bindings/spi/
H A Dspi-nxp-fspi.txt17 This encodes to which bus and CS the flash is connected:
18 - <0>: Bus A, CS 0
19 - <1>: Bus A, CS 1
20 - <2>: Bus B, CS 0
21 - <3>: Bus B, CS 1
H A Dspi-mux.yaml23 | +--+++-+ | CS-X +------+\ +--+--+ +--+--+ +--+--+ +--+--+
24 | | SPI +-|-------+ Mux |\\ CS-0 | | | |
25 | +------+ | +--+---+\\\-------/ CS-1 | | |
26 | | | \\\----------------/ CS-2 | |
27 | +------+ | | \\-------------------------/ CS-3 |
H A Dspi-fsl-qspi.txt18 This encodes to which bus and CS the flash is connected:
19 <0>: Bus A, CS 0
20 <1>: Bus A, CS 1
21 <2>: Bus B, CS 0
22 <3>: Bus B, CS 1
H A Dspi-davinci.txt40 For example to have 3 internal CS and 2 GPIO CS, user could define
42 where first three are internal CS and last two are GPIO CS.
H A Dspi-samsung.txt53 - no-cs-readback: the CS line is disconnected, therefore the device should not
54 operate based on CS signalling.
H A Dspi-fsl-lpspi.yaml39 spi common code does not support use of CS signals discontinuously.
/f-stack/freebsd/contrib/device-tree/Bindings/memory-controllers/
H A Dpl353-smc.txt31 ranges = <0x0 0x0 0xe1000000 0x1000000 //Nand CS Region
32 0x1 0x0 0xe2000000 0x2000000 //SRAM/NOR CS Region
33 0x2 0x0 0xe4000000 0x2000000>; //SRAM/NOR CS Region
H A Domap-gpmc.txt20 - #size-cells: Must be set to 1 to allow CS address passing
31 of the per-CS register GPMC_CONFIG7 (as set up by the
95 - gpmc,cs-extra-delay: CS signal is delayed by half GPMC clock
97 accesses to a different CS
99 accesses to the same CS
H A Datmel,ebi.txt25 The first cell encodes the CS.
26 The second cell encode the offset into the CS memory
31 - ranges: Encodes CS to memory region association.
H A Dst,stm32-fmc2-ebi.yaml210 ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
211 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
212 <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
213 <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
H A Dti-aemif.txt34 - CS-specific partition/range. If continuous, must be
38 - control partition which is common for all CS
152 * Partition0: CS-specific memory range which is
/f-stack/freebsd/contrib/device-tree/Bindings/bus/
H A Dimx-weim.txt21 - #size-cells: Must be set to 1 to allow CS address passing
31 Purpose Register controller that contains WEIM CS GPR
34 values depending on the CS space configuration.
54 child node. We get the CS indexes from the address
H A Dqcom,ebi2.txt79 the data bus. They are inserted when reading one CS and switching to another
80 CS or read followed by write on the same CS. Valid values 0 thru 15. Minimum
84 WE is asserted until CS is asserted. With a hold of 1 (value = 0), the CS
103 read transfer. For a single read transfer this will be the time from CS
/f-stack/freebsd/contrib/device-tree/Bindings/net/
H A Dmaxim,ds26522.txt5 - reg: SPI CS.
/f-stack/freebsd/contrib/device-tree/Bindings/display/exynos/
H A Dsamsung-fimd.txt49 - wr-setup: clock cycles for the active period of CS signal is enabled until
52 - wr-active: clock cycles for the active period of CS is enabled.
54 - wr-hold: clock cycles for the active period of CS is disabled until write
/f-stack/freebsd/contrib/ngatm/netnatm/sig/
H A Dunimkmsg.h50 #define MK_IE_CALLSTATE(IE,CS) \ argument
56 (IE).state = CS; \
/f-stack/freebsd/contrib/device-tree/Bindings/mtd/
H A Datmel-nand.txt33 - reg: describes the CS lines assigned to the NAND device. If the NAND device
34 exposes multiple CS lines (multi-dies chips), your reg property will
36 1st entry: the CS line this NAND chip is connected to
43 - cs-gpios: the GPIO(s) used to control the CS line.
H A Dgpmc-onenand.txt13 - reg: The CS line the peripheral is connected to
H A Dti,am654-hbmc.txt9 - ranges : Address translation from offset within CS to allocated MMIO
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dpxa300-raumfeld-common.dtsi334 MFP_PIN_PXA300(34) MFP_AF0 /* CS#0 */
335 MFP_PIN_PXA300(125) MFP_AF0 /* CS#1 */
336 MFP_PIN_PXA300(96) MFP_AF0 /* CS#2 */
H A Dimx6qdl-rex.dtsi187 /* CS */
197 /* CS */
/f-stack/freebsd/contrib/device-tree/Bindings/iio/resolver/
H A Dad2s90.txt18 delay is expected between the application of a logic LO to CS and the
/f-stack/freebsd/contrib/device-tree/Bindings/input/touchscreen/
H A Dbu21013.txt6 - reset-gpios : GPIO pin enabling (selecting) chip (CS)
/f-stack/freebsd/contrib/device-tree/Bindings/misc/
H A Difm-csi.txt24 reg = <3 0 0x00100000>; /* CS 3, 1 MiB range */
/f-stack/freebsd/contrib/device-tree/Bindings/gpio/
H A Dspear_spics.txt1 === ST Microelectronics SPEAr SPI CS Driver ===

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