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Searched refs:CLK_MASK_DIV (Results 1 – 3 of 3) sorted by relevance

/f-stack/freebsd/mips/ingenic/
H A Djz4780_clock.c166 GENCLK(JZ4780_CLK_CPU, "cpu", CLK_MASK_DIV,
173 GENCLK(JZ4780_CLK_L2CACHE, "l2cache", CLK_MASK_DIV,
180 GENCLK(JZ4780_CLK_AHB0, "ahb0", CLK_MASK_MUX | CLK_MASK_DIV,
194 GENCLK(JZ4780_CLK_AHB2, "ahb2", CLK_MASK_DIV,
201 GENCLK(JZ4780_CLK_PCLK, "pclk", CLK_MASK_DIV,
208 GENCLK(JZ4780_CLK_DDR, "ddr", CLK_MASK_MUX | CLK_MASK_DIV,
222 GENCLK(JZ4780_CLK_I2SPLL, "i2s_pll", CLK_MASK_MUX | CLK_MASK_DIV,
257 GENCLK(JZ4780_CLK_MSC0, "msc0", CLK_MASK_DIV | CLK_MASK_GATE,
264 GENCLK(JZ4780_CLK_MSC1, "msc1", CLK_MASK_DIV | CLK_MASK_GATE,
271 GENCLK(JZ4780_CLK_MSC2, "msc2", CLK_MASK_DIV | CLK_MASK_GATE,
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H A Djz4780_clk.h78 #define CLK_MASK_DIV 0x02 macro
H A Djz4780_clk_gen.c136 if (sc->clk_descr->clk_type & CLK_MASK_DIV) { in jz4780_clk_gen_recalc_freq()