Searched refs:CHSCCDR_IPU_PRE_CLK_PLL5 (Results 1 – 2 of 2) sorted by relevance
72 #define CHSCCDR_IPU_PRE_CLK_PLL5 2 macro
462 reg |= (CHSCCDR_IPU_PRE_CLK_PLL5 << CHSCCDR_IPU1_DI0_PRE_CLK_SEL_SHIFT); in imx_ccm_ipu_enable()