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/f-stack/freebsd/contrib/libsodium/src/libsodium/crypto_pwhash/argon2/
H A Dblamka-round-avx2.h33 ml = _mm256_mul_epu32(C1, D1); \
35 C1 = _mm256_add_epi64(C1, _mm256_add_epi64(D1, ml)); \
37 B1 = _mm256_xor_si256(B1, C1); \
61 ml = _mm256_mul_epu32(C1, D1); \
63 C1 = _mm256_add_epi64(C1, _mm256_add_epi64(D1, ml)); \
75 C1 = _mm256_permute4x64_epi64(C1, _MM_SHUFFLE(1, 0, 3, 2)); \
87 C0 = C1; \
88 C1 = tmp1; \
103 C1 = _mm256_permute4x64_epi64(C1, _MM_SHUFFLE(1, 0, 3, 2)); \
115 C0 = C1; \
[all …]
H A Dblamka-round-avx512f.h17 #define G1_AVX512F(A0, B0, C0, D0, A1, B1, C1, D1) \ argument
29 C1 = muladd(C1, D1); \
32 B1 = _mm512_xor_si512(B1, C1); \
50 C1 = muladd(C1, D1); \
53 B1 = _mm512_xor_si512(B1, C1); \
65 C1 = _mm512_permutex_epi64(C1, _MM_SHUFFLE(1, 0, 3, 2)); \
77 C1 = _mm512_permutex_epi64(C1, _MM_SHUFFLE(1, 0, 3, 2)); \
124 SWAP_HALVES(C1, D1); \
129 SWAP_HALVES(C1, D1); \
136 SWAP_QUARTERS(C0, C1); \
[all …]
H A Dblamka-round-ssse3.h31 #define G1(A0, B0, C0, D0, A1, B1, C1, D1) \ argument
43 C1 = fBlaMka(C1, D1); \
46 B1 = _mm_xor_si128(B1, C1); \
52 #define G2(A0, B0, C0, D0, A1, B1, C1, D1) \ argument
64 C1 = fBlaMka(C1, D1); \
67 B1 = _mm_xor_si128(B1, C1); \
73 #define DIAGONALIZE(A0, B0, C0, D0, A1, B1, C1, D1) \ argument
81 C0 = C1; \
82 C1 = t0; \
90 #define UNDIAGONALIZE(A0, B0, C0, D0, A1, B1, C1, D1) \ argument
[all …]
/f-stack/freebsd/contrib/libsodium/src/libsodium/crypto_stream/chacha20/dolbeau/
H A Du8.h67 #define VEC8_ROUND_SEQ(A1, B1, C1, D1, A2, B2, C2, D2, A3, B3, C3, D3, A4, B4, \ argument
69 VEC8_LINE1(A1, B1, C1, D1); \
73 VEC8_LINE2(A1, B1, C1, D1); \
77 VEC8_LINE3(A1, B1, C1, D1); \
81 VEC8_LINE4(A1, B1, C1, D1); \
86 #define VEC8_ROUND_HALF(A1, B1, C1, D1, A2, B2, C2, D2, A3, B3, C3, D3, A4, \ argument
88 VEC8_LINE1(A1, B1, C1, D1); \
90 VEC8_LINE2(A1, B1, C1, D1); \
92 VEC8_LINE3(A1, B1, C1, D1); \
94 VEC8_LINE4(A1, B1, C1, D1); \
[all …]
/f-stack/freebsd/mips/conf/
H A DDIR-825C13 # Specific board setup for the D-Link DIR-825C1 router.
5 # The DIR-825C1 has the following hardware:
22 hints "DIR-825C1.hints"
H A DDIR-825C1.hints35 # DIR-825C1 GMAC configuration
/f-stack/freebsd/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/
H A Dpoly1305_sse2.c210 xmmi C1, C2; in poly1305_blocks() local
505 T1 = _mm_add_epi64(T1, C1); in poly1305_blocks()
511 T2 = _mm_add_epi64(T2, C1); in poly1305_blocks()
643 C1 = _mm_srli_epi64(T0, 26); in poly1305_blocks()
647 T1 = _mm_add_epi64(T1, C1); in poly1305_blocks()
649 C1 = _mm_srli_epi64(T1, 26); in poly1305_blocks()
653 T2 = _mm_add_epi64(T2, C1); in poly1305_blocks()
655 C1 = _mm_srli_epi64(T2, 26); in poly1305_blocks()
659 T3 = _mm_add_epi64(T3, C1); in poly1305_blocks()
661 C1 = _mm_srli_epi64(T3, 26); in poly1305_blocks()
[all …]
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dqcom-ipq4019-ap.dk04.1-c1.dts7 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1-C1";
H A Dqcom-ipq4019-ap.dk07.1-c1.dts7 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C1";
H A Dqcom-ipq4019-ap.dk01.1-c1.dts20 model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
H A Dmeson8b-odroidc1.dts12 model = "Hardkernel ODROID-C1";
291 * WARNING: The USB Hub on the Odroid-C1/C1+ needs a reset signal
H A Dste-href-family-pinctrl.dtsi161 * SKE keys on position 1 and "other C1" combi giving
H A Dste-hrefv60plus.dtsi212 * the "other alt C1" setting enables these pins)
/f-stack/app/nginx-1.16.1/conf/
H A Dkoi-win37 C1 E0 ; # small a
72 E2 C1 ; # capital B
H A Dkoi-utf43 C1 D0B0 ; # small a
H A Dwin-utf60 C1 D091 ; # capital B
/f-stack/freebsd/contrib/device-tree/Bindings/leds/
H A Dleds-powernv.txt21 U78C9.001.RST0027-P1-C1 {
/f-stack/freebsd/contrib/device-tree/Bindings/power/
H A Damlogic,meson-sec-pwrc.yaml15 Secure Power Domains used in Meson A1/C1 SoCs, and should be the child node
/f-stack/freebsd/contrib/device-tree/src/arm64/qcom/
H A Dipq6018-cp01-c1.dts13 model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1";
/f-stack/freebsd/contrib/device-tree/Bindings/pci/
H A Dnvidia,tegra194-pcie.txt13 TEGRA194_POWER_DOMAIN_PCIEX1A: C1
50 1: C1
112 2. If C0/C1/C2/C3/C4/C5 operate at their respective max link widths and
/f-stack/app/nginx-1.16.1/contrib/unicode2nginx/
H A Dwin-utf67 C1 D091 ; #CYRILLIC CAPITAL LETTER BE
H A Dkoi-utf68 C1 D0B0 ; # CYRILLIC SMALL LETTER A
/f-stack/freebsd/contrib/device-tree/src/arm64/rockchip/
H A Drk3326-odroid-go2.dts480 /* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
/f-stack/app/redis-5.0.5/deps/jemalloc/build-aux/
H A Dconfig.guess777 C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*)
/f-stack/dpdk/doc/guides/sample_app_ug/
H A Dl3_forward_power_man.rst357 …A 100 μs sleep interval allows the core to enter the C1 state while keeping a fast response time i…