Home
last modified time | relevance | path

Searched refs:Base (Results 1 – 25 of 135) sorted by relevance

123456

/f-stack/freebsd/contrib/device-tree/Bindings/clock/
H A Dlpc1850-cgu.txt46 1 BASE_USB0_CLK Base clock for USB0
49 3 BASE_USB1_CLK Base clock for USB1
52 5 BASE_SPIFI_CLK Base clock for SPIFI
53 6 BASE_SPI_CLK Base clock for SPI
58 11 BASE_LCD_CLK Base clock for LCD
59 12 BASE_ADCHS_CLK Base clock for ADCHS
60 13 BASE_SDIO_CLK Base clock for SD/MMC
61 14 BASE_SSP0_CLK Base clock for SSP0
62 15 BASE_SSP1_CLK Base clock for SSP1
63 16 BASE_UART0_CLK Base clock for UART0
[all …]
H A Darmada3700-tbg-clock.txt1 * Time Base Generator Clock bindings for Marvell Armada 37xx SoCs
3 Marvell Armada 37xx SoCs provde Time Base Generator clocks which are
H A Drenesas,h8300-div-clock.txt11 - reg: Base address and length of the divide rate selector
H A Defm32-clock.txt5 - reg: Base address and length of the register set
H A Dti,am654-ehrpwm-tbclk.yaml7 title: TI EHRPWM Time Base Clock
/f-stack/freebsd/contrib/dev/acpica/components/utilities/
H A Dutstrtoul64.c235 UINT32 Base = 10; /* Default is decimal */ in AcpiUtStrtoul64() local
260 Base = 16; in AcpiUtStrtoul64()
269 Base = 8; in AcpiUtStrtoul64()
289 switch (Base) in AcpiUtStrtoul64()
459 UINT32 Base = 10; /* Default is decimal */ in AcpiUtExplicitStrtoul64() local
476 Base = 16; in AcpiUtExplicitStrtoul64()
489 switch (Base) in AcpiUtExplicitStrtoul64()
H A Dutstrsuppt.c164 UINT32 Base,
170 UINT32 Base,
534 UINT32 Base, in AcpiUtInsertDigit() argument
543 Status = AcpiUtStrtoulMultiply64 (*AccumulatedValue, Base, &Product); in AcpiUtInsertDigit()
577 UINT32 Base, in AcpiUtStrtoulMultiply64() argument
587 if (!Multiplicand || !Base) in AcpiUtStrtoulMultiply64()
600 AcpiUtShortDivide (ACPI_UINT64_MAX, Base, &Quotient, NULL); in AcpiUtStrtoulMultiply64()
606 Product = Multiplicand * Base; in AcpiUtStrtoulMultiply64()
/f-stack/freebsd/contrib/dev/acpica/components/executer/
H A Dexconvrt.c166 UINT16 Base,
425 UINT16 Base, in AcpiExConvertToAscii() argument
442 switch (Base) in AcpiExConvertToAscii()
557 UINT16 Base = 16; in AcpiExConvertToString() local
584 Base = 10; in AcpiExConvertToString()
610 ObjDesc->Integer.Value, Base, NewBuf, AcpiGbl_IntegerByteWidth); in AcpiExConvertToString()
631 Base = 10; in AcpiExConvertToString()
709 if (Base == 16) in AcpiExConvertToString()
718 (UINT64) ObjDesc->Buffer.Pointer[i], Base, NewBuf, 1); in AcpiExConvertToString()
H A Dexutils.c181 UINT32 Base);
426 UINT32 Base) in AcpiExDigitsNeeded() argument
449 (void) AcpiUtShortDivide (CurrentValue, Base, &CurrentValue, NULL); in AcpiExDigitsNeeded()
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dspear300.dtsi35 0x80000000 0x0010 /* NAND Base DATA */
36 0x80020000 0x0010 /* NAND Base ADDR */
37 0x80010000 0x0010>; /* NAND Base CMD */
H A Dkirkwood-openrd-base.dts3 * Marvell OpenRD Base Board Description
16 model = "OpenRD Base";
H A Dspear310.dtsi30 0x40000000 0x0010 /* NAND Base DATA */
31 0x40020000 0x0010 /* NAND Base ADDR */
32 0x40010000 0x0010>; /* NAND Base CMD */
H A Darmada-388-clearfog-base.dts3 * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828)
12 model = "SolidRun Clearfog Base A1";
H A Dspear320.dtsi37 0x50000000 0x0010 /* NAND Base DATA */
38 0x50020000 0x0010 /* NAND Base ADDR */
39 0x50010000 0x0010>; /* NAND Base CMD */
H A Dspear600.dtsi77 0xd2000000 0x0010 /* NAND Base DATA */
78 0xd2020000 0x0010 /* NAND Base ADDR */
79 0xd2010000 0x0010>; /* NAND Base CMD */
H A Dowl-s500-guitar-bb-rev-b.dts12 model = "LeMaker Guitar Base Board rev. B";
/f-stack/freebsd/contrib/device-tree/Bindings/watchdog/
H A Dsbsa-gwdt.txt1 * SBSA (Server Base System Architecture) Generic Watchdog
6 Base System Architecture (SBSA)
/f-stack/freebsd/contrib/device-tree/Bindings/mtd/
H A Dfsmc-nand.txt47 0xd2000000 0x0010 /* NAND Base DATA */
48 0xd2020000 0x0010 /* NAND Base ADDR */
49 0xd2010000 0x0010>; /* NAND Base CMD */
/f-stack/freebsd/contrib/device-tree/Bindings/iommu/
H A Dqcom,iommu.txt29 - ranges : Base address and size of the iommu context banks.
39 - reg : Base address and size of context bank within the iommu
44 - reg : Base address and size of the SMMU local base, should
/f-stack/freebsd/contrib/device-tree/Bindings/memory-controllers/
H A Drenesas,h8300-bsc.txt5 - reg: Base address and length of BSC registers.
/f-stack/freebsd/mips/conf/
H A DBERI_SIM_BASE2 # BERI_SIM_BASE -- Base kernel for the SRI/Cambridge "BERI" (Bluespec
/f-stack/freebsd/contrib/device-tree/Bindings/rng/
H A Dst,rng.txt6 reg : Base address and size of IP's register map.
/f-stack/freebsd/contrib/device-tree/src/powerpc/fsl/
H A De500v2_power_isa.dtsi38 power-isa-b; // Base
40 power-isa-atb; // Alternate Time Base
/f-stack/freebsd/contrib/device-tree/Bindings/crypto/
H A Dartpec6-crypto.txt7 - reg: Base address and size for the PDMA register area.
/f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/
H A Drenesas,h8s-intc.txt8 - regs: Base address of interrupt controller registers.

123456