Searched refs:AR5312_SDRAMCTL_BASE (Results 1 – 2 of 2) sorted by relevance
73 memcfg = ATH_READ_REG(AR5312_SDRAMCTL_BASE + AR5312_SDRAMCTL_MEM_CFG1); in ar5312_chip_detect_mem_size()125 cfg0 = ATH_READ_REG(AR5312_SDRAMCTL_BASE + AR5312_SDRAMCTL_MEM_CFG0); in ar5312_chip_device_start()126 cfg1 = ATH_READ_REG(AR5312_SDRAMCTL_BASE + AR5312_SDRAMCTL_MEM_CFG1); in ar5312_chip_device_start()
54 #define AR5312_SDRAMCTL_BASE 0x18300000 macro187 #define GETSDRAMREG(x) REGVAL((x) + AR5312_SDRAMCTL_BASE)188 #define PUTSDRAMREG(x,v) (REGVAL((x) + AR5312_SDRAMCTL_BASE)) = (v)