| /dpdk/drivers/net/sfc/ |
| H A D | sfc_switch.h | 88 int *controller); 92 int *controller); 95 int controller,
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| H A D | sfc_switch.c | 316 int *controller) in sfc_mae_switch_controller_from_mapping() argument 325 *controller = i; in sfc_mae_switch_controller_from_mapping() 336 int *controller) in sfc_mae_switch_domain_get_controller() argument 350 controller); in sfc_mae_switch_domain_get_controller() 354 int controller, in sfc_mae_switch_domain_get_intf() argument 369 if ((size_t)controller > nb_controllers) in sfc_mae_switch_domain_get_intf() 372 *intf = controllers[controller]; in sfc_mae_switch_domain_get_intf()
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| H A D | sfc_ethdev.c | 2201 &range->controller); in sfc_get_representors_cb() 2205 range->controller = -1; in sfc_get_representors_cb() 2220 "c%dpf%d", range->controller, range->pf); in sfc_get_representors_cb() 2239 int controller; in sfc_representor_info_get() local 2286 &controller); in sfc_representor_info_get() 2289 controller = -1; in sfc_representor_info_get() 2292 info->controller = controller; in sfc_representor_info_get() 2970 efx_pcie_interface_t controller, in sfc_eth_dev_create_repr() argument 3006 entity.intf = controller; in sfc_eth_dev_create_repr() 3025 efx_pcie_interface_t controller, in sfc_eth_dev_create_repr_port() argument [all …]
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| H A D | sfc_repr.c | 1030 int controller; in sfc_repr_create() local 1035 controller = -1; in sfc_repr_create() 1037 entity->intf, &controller); in sfc_repr_create() 1047 parent->device->name, controller, entity->pf, in sfc_repr_create() 1052 parent->device->name, controller, entity->pf); in sfc_repr_create()
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| /dpdk/lib/ethdev/ |
| H A D | ethdev_driver.c | 643 int controller, int pf, int representor_port, in rte_eth_representor_id_get() argument 659 controller == -1 && pf == -1) { in rte_eth_representor_id_get() 677 if (controller == -1) in rte_eth_representor_id_get() 678 controller = info->controller; in rte_eth_representor_id_get() 687 if (info->ranges[i].controller != controller) in rte_eth_representor_id_get()
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| H A D | ethdev_driver.h | 1622 int controller, int pf, int representor_port,
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| H A D | rte_ethdev.h | 5201 int controller; /**< Controller index */ member 5220 uint16_t controller; /**< Controller ID of caller device. */ member
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| /dpdk/doc/guides/nics/ |
| H A D | ionic.rst | 25 b5:00.0 Ethernet controller: Device 1dd8:1002 26 b6:00.0 Ethernet controller: Device 1dd8:1002
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| H A D | e1000em.rst | 135 00:04.0 Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller (rev 03) 136 00:05.0 Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller (rev 03)
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| H A D | enic.rst | 128 0d:00.0 Ethernet controller: Cisco Systems Inc VIC Ethernet NIC (rev a2) 129 0d:00.1 Ethernet controller: Cisco Systems Inc VIC SR-IOV VF (rev a2) 130 0d:00.2 Ethernet controller: Cisco Systems Inc VIC SR-IOV VF (rev a2) 131 0d:00.3 Ethernet controller: Cisco Systems Inc VIC SR-IOV VF (rev a2) 132 0d:00.4 Ethernet controller: Cisco Systems Inc VIC SR-IOV VF (rev a2) 133 0d:00.5 Ethernet controller: Cisco Systems Inc VIC SR-IOV VF (rev a2) 134 0d:00.6 Ethernet controller: Cisco Systems Inc VIC SR-IOV VF (rev a2) 135 0d:00.7 Ethernet controller: Cisco Systems Inc VIC SR-IOV VF (rev a2) 176 00:04.0 Ethernet controller: Cisco Systems Inc VIC SR-IOV VF (rev a2)
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| H A D | thunderx.rst | 75 0002:01:00.0 Ethernet controller: Cavium Networks Device a01e (rev 01) 98 0002:01:00.1 Ethernet controller: Cavium Networks Device 0011 (rev 01) 105 0002:01:00.2 Ethernet controller: Cavium Networks Device 0011 (rev 01)
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| H A D | igc.rst | 11 …<https://ark.intel.com/content/www/us/en/ark/products/series/184686/intel-ethernet-controller-i225…
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| H A D | intel_vf.rst | 23 Therefore, it is possible to partition SR-IOV capability on Ethernet controller NIC resources logic… 264 The controller has 16 TX and 16 RX queues. 266 This gives the controller 16 queue pairs. 269 The controller has eight pools, with each pool containing two queue pairs, that is, two TX and two …
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| H A D | cxgbe.rst | 555 …02:01.0 Ethernet controller: Chelsio Communications Inc T540-CR Unified Wire Ethernet Controller [… 556 …02:01.1 Ethernet controller: Chelsio Communications Inc T540-CR Unified Wire Ethernet Controller […
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| H A D | mlx5.rst | 1649 82:00.0 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5] 1650 82:00.1 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5] 1651 … 82:00.2 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5 Virtual Function] 1652 … 82:00.3 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5 Virtual Function]
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| H A D | dpaa2.rst | 296 bus controller.
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| H A D | i40e.rst | 64 …om/content/dam/www/public/us/en/documents/release-notes/xl710-ethernet-controller-feature-matrix.p…
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| /dpdk/drivers/net/mlx5/ |
| H A D | mlx5_ethdev.c | 445 info->controller = 0; in mlx5_representor_info_get() 450 info->ranges[i].controller = 0; in mlx5_representor_info_get() 464 info->ranges[i].controller = 0; in mlx5_representor_info_get() 478 info->ranges[i].controller = 0; in mlx5_representor_info_get() 492 info->ranges[i].controller = 0; in mlx5_representor_info_get()
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| /dpdk/doc/guides/dmadevs/ |
| H A D | dpaa.rst | 11 This is achieved via using the QDMA controller of DPAA SoC. 13 The QDMA controller transfers blocks of data
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| /dpdk/doc/guides/rawdevs/ |
| H A D | cnxk_gpio.rst | 38 tells PMD which GPIO controller should be used. Available controllers are 51 In above scenario only one GPIO controller is present hence
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| /dpdk/doc/guides/prog_guide/ |
| H A D | dmadev.rst | 26 * The DMA controller could have multiple hardware DMA channels (aka. hardware
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| H A D | writing_efficient_code.rst | 74 Depending on the memory controller and its configuration,
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| /dpdk/doc/guides/sample_app_ug/ |
| H A D | vm_power_management.rst | 194 <controller type='virtio-serial' index='0'> 196 </controller> 200 <address type='virtio-serial' controller='0' bus='0' port='{N}'/> 203 Where a single controller of type ``virtio-serial`` is created, up to 32 204 channels can be associated with a single controller, and multiple
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| /dpdk/doc/guides/rel_notes/ |
| H A D | release_21_05.rst | 45 representor=[[c#]pf#]vf# c1pf2vf3 /* VF 3 on PF 2 of controller 1. */ 47 representor=[c#]pf# c2pf[0,1] /* 2 PFs on controller 2. */
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| H A D | known_issues.rst | 488 Cannot set link speed on Intel® 40G Ethernet controller 623 from the `xl710 controller spec 624 …<http://www.intel.com/content/www/us/en/embedded/products/networking/xl710-10-40-controller-spec-u…
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