Searched refs:CCP_WRITE_REG (Results 1 – 3 of 3) sorted by relevance
| /dpdk/drivers/crypto/ccp/ |
| H A D | ccp_dev.c | 501 CCP_WRITE_REG(vaddr, CMD_TRNG_CTL_OFFSET, 0x00012D57); in ccp_add_device() 502 CCP_WRITE_REG(vaddr, CMD_CONFIG_0_OFFSET, 0x00000003); in ccp_add_device() 504 CCP_WRITE_REG(vaddr, CMD_AES_MASK_OFFSET, in ccp_add_device() 507 CCP_WRITE_REG(vaddr, CMD_QUEUE_MASK_OFFSET, 0x0000001F); in ccp_add_device() 508 CCP_WRITE_REG(vaddr, CMD_QUEUE_PRIO_OFFSET, 0x00005B6D); in ccp_add_device() 509 CCP_WRITE_REG(vaddr, CMD_CMD_TIMEOUT_OFFSET, 0x00000000); in ccp_add_device() 516 CCP_WRITE_REG(vaddr, CMD_REQID_CONFIG_OFFSET, 0x0); in ccp_add_device() 554 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE, in ccp_add_device() 571 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_TAIL_LO_BASE, in ccp_add_device() 573 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_HEAD_LO_BASE, in ccp_add_device() [all …]
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| H A D | ccp_crypto.c | 1647 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE, in ccp_perform_hmac() 1733 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE, in ccp_perform_hmac() 1827 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE, in ccp_perform_sha() 1912 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE, in ccp_perform_sha3_hmac() 1988 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE, in ccp_perform_sha3_hmac() 2060 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE, in ccp_perform_sha3() 2420 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE, in ccp_perform_3des() 2506 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE, in ccp_perform_aes_gcm() 2548 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE, in ccp_perform_aes_gcm() 2593 CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE, in ccp_perform_aes_gcm() [all …]
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| H A D | ccp_dev.h | 169 #define CCP_WRITE_REG(hw_addr, reg_offset, value) \ macro
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