Home
last modified time | relevance | path

Searched refs:code (Results 4051 – 4069 of 4069) sorted by relevance

1...<<161162163

/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dinsert_vector_elt.v2i16.ll1983 ; FIXME: Better code on CI?
H A Dmachine-scheduler-sink-trivial-remats.mir4958 …; DEBUG: Machine code for function sink_and_inc_idx_when_skipping_small_region_1: IsSSA, NoPHIs, T…
5030 …; DEBUG: Machine code for function sink_and_inc_idx_when_skipping_small_regions_2: IsSSA, NoPHIs, …
H A Dwqm.ll30 ; Check that WQM is triggered by code calculating inputs to image samples and is disabled as soon a…
/llvm-project-15.0.7/libcxx/include/
H A Dstring1661 // to only inline the fast path code directly in the ctor.
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/ARM/
H A Dcast.ll7 ; RUN: opt -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=thumbv8.1…
8 ; RUN: opt -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=thumbv8m.…
9 ; RUN: opt -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=thumbv8m.…
10 ; RUN: opt -passes='print<cost-model>' 2>&1 -disable-output -cost-kind=code-size -mtriple=armv8r-no…
H A Darith.ll8 ; RUN: opt -passes='print<cost-model>' -cost-kind=code-size 2>&1 -disable-output -mtriple=thumbv8.1…
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVPseudos.td9 /// This file contains the required infrastructure to support code generation
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SVEInstrInfo.td2001 //These patterns exist to improve the code quality of conversions on unpacked types.
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dsse-intrinsics-fast-isel.ll2923 ; FIXME: Switch the frontend to use this code.
H A Dmasked_gather_scatter.ll5 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512vl -mattr=+avx512dq -code-model=large <…
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMInstrThumb2.td3819 // doing so, we also cause the prologue/epilogue code to actively preserve
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrVSX.td45 // ** input or output patterns for consciseness of the code. **
/llvm-project-15.0.7/clang/docs/tools/
H A Dclang-formatted-files.txt2188 flang/include/flang/Runtime/type-code.h
2477 flang/runtime/type-code.cpp
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Datomic.ll25 ; We want to verify the produced code is well formed all optimization levels, the rest of the tests…
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dinsertelement.ll8 ; ERR: Bad machine code: VOP* instruction violates constant bus restriction
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/autohvx/
H A Ddeal-128b.ll7 ; This is an identity shuffle: there should not be any shuffling code emitted.
H A Dshuff-128b.ll5 ; This is an identity shuffle: there should not be any shuffling code emitted.
/llvm-project-15.0.7/llvm/test/DebugInfo/NVPTX/
H A Ddebug-info.ll4 ; // Bitcode int this test case is reduced version of compiled code below:
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-indexed-vector-ldst.ll8927 ; Make sure that we test the narrow V64 code path.

1...<<161162163