1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3 * Copyright (C) 2008-2014, 2018-2021 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7 #ifndef __iwl_fw_file_h__
8 #define __iwl_fw_file_h__
9
10 #include <linux/netdevice.h>
11 #include <linux/nl80211.h>
12
13 /* v1/v2 uCode file layout */
14 struct iwl_ucode_header {
15 __le32 ver; /* major/minor/API/serial */
16 union {
17 struct {
18 __le32 inst_size; /* bytes of runtime code */
19 __le32 data_size; /* bytes of runtime data */
20 __le32 init_size; /* bytes of init code */
21 __le32 init_data_size; /* bytes of init data */
22 __le32 boot_size; /* bytes of bootstrap code */
23 u8 data[0]; /* in same order as sizes */
24 } v1;
25 struct {
26 __le32 build; /* build number */
27 __le32 inst_size; /* bytes of runtime code */
28 __le32 data_size; /* bytes of runtime data */
29 __le32 init_size; /* bytes of init code */
30 __le32 init_data_size; /* bytes of init data */
31 __le32 boot_size; /* bytes of bootstrap code */
32 u8 data[0]; /* in same order as sizes */
33 } v2;
34 } u;
35 };
36
37 #define IWL_UCODE_TLV_DEBUG_BASE 0x1000005
38 #define IWL_UCODE_TLV_CONST_BASE 0x100
39
40 /*
41 * new TLV uCode file layout
42 *
43 * The new TLV file format contains TLVs, that each specify
44 * some piece of data.
45 */
46
47 enum iwl_ucode_tlv_type {
48 IWL_UCODE_TLV_INVALID = 0, /* unused */
49 IWL_UCODE_TLV_INST = 1,
50 IWL_UCODE_TLV_DATA = 2,
51 IWL_UCODE_TLV_INIT = 3,
52 IWL_UCODE_TLV_INIT_DATA = 4,
53 IWL_UCODE_TLV_BOOT = 5,
54 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */
55 IWL_UCODE_TLV_PAN = 7, /* deprecated -- only used in DVM */
56 IWL_UCODE_TLV_MEM_DESC = 7, /* replaces PAN in non-DVM */
57 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,
58 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,
59 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,
60 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,
61 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,
62 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
63 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
64 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
65 IWL_UCODE_TLV_WOWLAN_INST = 16,
66 IWL_UCODE_TLV_WOWLAN_DATA = 17,
67 IWL_UCODE_TLV_FLAGS = 18,
68 IWL_UCODE_TLV_SEC_RT = 19,
69 IWL_UCODE_TLV_SEC_INIT = 20,
70 IWL_UCODE_TLV_SEC_WOWLAN = 21,
71 IWL_UCODE_TLV_DEF_CALIB = 22,
72 IWL_UCODE_TLV_PHY_SKU = 23,
73 IWL_UCODE_TLV_SECURE_SEC_RT = 24,
74 IWL_UCODE_TLV_SECURE_SEC_INIT = 25,
75 IWL_UCODE_TLV_SECURE_SEC_WOWLAN = 26,
76 IWL_UCODE_TLV_NUM_OF_CPU = 27,
77 IWL_UCODE_TLV_CSCHEME = 28,
78 IWL_UCODE_TLV_API_CHANGES_SET = 29,
79 IWL_UCODE_TLV_ENABLED_CAPABILITIES = 30,
80 IWL_UCODE_TLV_N_SCAN_CHANNELS = 31,
81 IWL_UCODE_TLV_PAGING = 32,
82 IWL_UCODE_TLV_SEC_RT_USNIFFER = 34,
83 /* 35 is unused */
84 IWL_UCODE_TLV_FW_VERSION = 36,
85 IWL_UCODE_TLV_FW_DBG_DEST = 38,
86 IWL_UCODE_TLV_FW_DBG_CONF = 39,
87 IWL_UCODE_TLV_FW_DBG_TRIGGER = 40,
88 IWL_UCODE_TLV_CMD_VERSIONS = 48,
89 IWL_UCODE_TLV_FW_GSCAN_CAPA = 50,
90 IWL_UCODE_TLV_FW_MEM_SEG = 51,
91 IWL_UCODE_TLV_IML = 52,
92 IWL_UCODE_TLV_UMAC_DEBUG_ADDRS = 54,
93 IWL_UCODE_TLV_LMAC_DEBUG_ADDRS = 55,
94 IWL_UCODE_TLV_FW_RECOVERY_INFO = 57,
95 IWL_UCODE_TLV_HW_TYPE = 58,
96 IWL_UCODE_TLV_FW_FSEQ_VERSION = 60,
97 IWL_UCODE_TLV_PHY_INTEGRATION_VERSION = 61,
98
99 IWL_UCODE_TLV_PNVM_VERSION = 62,
100 IWL_UCODE_TLV_PNVM_SKU = 64,
101
102 IWL_UCODE_TLV_SEC_TABLE_ADDR = 66,
103 IWL_UCODE_TLV_D3_KEK_KCK_ADDR = 67,
104
105 IWL_UCODE_TLV_FW_NUM_STATIONS = IWL_UCODE_TLV_CONST_BASE + 0,
106
107 IWL_UCODE_TLV_TYPE_DEBUG_INFO = IWL_UCODE_TLV_DEBUG_BASE + 0,
108 IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION = IWL_UCODE_TLV_DEBUG_BASE + 1,
109 IWL_UCODE_TLV_TYPE_HCMD = IWL_UCODE_TLV_DEBUG_BASE + 2,
110 IWL_UCODE_TLV_TYPE_REGIONS = IWL_UCODE_TLV_DEBUG_BASE + 3,
111 IWL_UCODE_TLV_TYPE_TRIGGERS = IWL_UCODE_TLV_DEBUG_BASE + 4,
112 IWL_UCODE_TLV_TYPE_CONF_SET = IWL_UCODE_TLV_DEBUG_BASE + 5,
113 IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
114
115 /* TLVs 0x1000-0x2000 are for internal driver usage */
116 IWL_UCODE_TLV_FW_DBG_DUMP_LST = 0x1000,
117 };
118
119 struct iwl_ucode_tlv {
120 __le32 type; /* see above */
121 __le32 length; /* not including type/length fields */
122 u8 data[];
123 };
124
125 #define IWL_TLV_UCODE_MAGIC 0x0a4c5749
126 #define FW_VER_HUMAN_READABLE_SZ 64
127
128 struct iwl_tlv_ucode_header {
129 /*
130 * The TLV style ucode header is distinguished from
131 * the v1/v2 style header by first four bytes being
132 * zero, as such is an invalid combination of
133 * major/minor/API/serial versions.
134 */
135 __le32 zero;
136 __le32 magic;
137 u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
138 /* major/minor/API/serial or major in new format */
139 __le32 ver;
140 __le32 build;
141 __le64 ignore;
142 /*
143 * The data contained herein has a TLV layout,
144 * see above for the TLV header and types.
145 * Note that each TLV is padded to a length
146 * that is a multiple of 4 for alignment.
147 */
148 u8 data[0];
149 };
150
151 /*
152 * ucode TLVs
153 *
154 * ability to get extension for: flags & capabilities from ucode binaries files
155 */
156 struct iwl_ucode_api {
157 __le32 api_index;
158 __le32 api_flags;
159 } __packed;
160
161 struct iwl_ucode_capa {
162 __le32 api_index;
163 __le32 api_capa;
164 } __packed;
165
166 /**
167 * enum iwl_ucode_tlv_flag - ucode API flags
168 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
169 * was a separate TLV but moved here to save space.
170 * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
171 * treats good CRC threshold as a boolean
172 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
173 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
174 * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan
175 * offload profile config command.
176 * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
177 * (rather than two) IPv6 addresses
178 * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
179 * from the probe request template.
180 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
181 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
182 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
183 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
184 * @IWL_UCODE_TLV_FLAGS_BCAST_FILTERING: uCode supports broadcast filtering.
185 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
186 */
187 enum iwl_ucode_tlv_flag {
188 IWL_UCODE_TLV_FLAGS_PAN = BIT(0),
189 IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1),
190 IWL_UCODE_TLV_FLAGS_MFP = BIT(2),
191 IWL_UCODE_TLV_FLAGS_SHORT_BL = BIT(7),
192 IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS = BIT(10),
193 IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID = BIT(12),
194 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL = BIT(15),
195 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE = BIT(16),
196 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24),
197 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25),
198 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26),
199 IWL_UCODE_TLV_FLAGS_BCAST_FILTERING = BIT(29),
200 };
201
202 typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
203
204 /**
205 * enum iwl_ucode_tlv_api - ucode api
206 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
207 * longer than the passive one, which is essential for fragmented scan.
208 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
209 * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
210 * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
211 * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
212 * iteration complete notification, and the timestamp reported for RX
213 * received during scan, are reported in TSF of the mac specified in the
214 * scan request.
215 * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
216 * ADD_MODIFY_STA_KEY_API_S_VER_2.
217 * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
218 * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
219 * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
220 * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
221 * indicating low latency direction.
222 * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
223 * deprecated.
224 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
225 * of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
226 * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
227 * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
228 * the REDUCE_TX_POWER_CMD.
229 * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
230 * version of the beacon notification.
231 * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
232 * BEACON_FILTER_CONFIG_API_S_VER_4.
233 * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
234 * REGULATORY_NVM_GET_INFO_RSP_API_S.
235 * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
236 * LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
237 * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
238 * SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
239 * SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
240 * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
241 * STA_CONTEXT_DOT11AX_API_S
242 * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar
243 * version tables.
244 * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of
245 * SCAN_CONFIG_DB_CMD_API_S.
246 *
247 * @NUM_IWL_UCODE_TLV_API: number of bits used
248 */
249 enum iwl_ucode_tlv_api {
250 /* API Set 0 */
251 IWL_UCODE_TLV_API_FRAGMENTED_SCAN = (__force iwl_ucode_tlv_api_t)8,
252 IWL_UCODE_TLV_API_WIFI_MCC_UPDATE = (__force iwl_ucode_tlv_api_t)9,
253 IWL_UCODE_TLV_API_LQ_SS_PARAMS = (__force iwl_ucode_tlv_api_t)18,
254 IWL_UCODE_TLV_API_NEW_VERSION = (__force iwl_ucode_tlv_api_t)20,
255 IWL_UCODE_TLV_API_SCAN_TSF_REPORT = (__force iwl_ucode_tlv_api_t)28,
256 IWL_UCODE_TLV_API_TKIP_MIC_KEYS = (__force iwl_ucode_tlv_api_t)29,
257 IWL_UCODE_TLV_API_STA_TYPE = (__force iwl_ucode_tlv_api_t)30,
258 IWL_UCODE_TLV_API_NAN2_VER2 = (__force iwl_ucode_tlv_api_t)31,
259 /* API Set 1 */
260 IWL_UCODE_TLV_API_ADAPTIVE_DWELL = (__force iwl_ucode_tlv_api_t)32,
261 IWL_UCODE_TLV_API_OCE = (__force iwl_ucode_tlv_api_t)33,
262 IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE = (__force iwl_ucode_tlv_api_t)34,
263 IWL_UCODE_TLV_API_NEW_RX_STATS = (__force iwl_ucode_tlv_api_t)35,
264 IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL = (__force iwl_ucode_tlv_api_t)36,
265 IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY = (__force iwl_ucode_tlv_api_t)38,
266 IWL_UCODE_TLV_API_DEPRECATE_TTAK = (__force iwl_ucode_tlv_api_t)41,
267 IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42,
268 IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44,
269 IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45,
270 IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF = (__force iwl_ucode_tlv_api_t)46,
271 IWL_UCODE_TLV_API_BEACON_FILTER_V4 = (__force iwl_ucode_tlv_api_t)47,
272 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO = (__force iwl_ucode_tlv_api_t)48,
273 IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ = (__force iwl_ucode_tlv_api_t)49,
274 IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS = (__force iwl_ucode_tlv_api_t)50,
275 IWL_UCODE_TLV_API_MBSSID_HE = (__force iwl_ucode_tlv_api_t)52,
276 IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE = (__force iwl_ucode_tlv_api_t)53,
277 IWL_UCODE_TLV_API_FTM_RTT_ACCURACY = (__force iwl_ucode_tlv_api_t)54,
278 IWL_UCODE_TLV_API_SAR_TABLE_VER = (__force iwl_ucode_tlv_api_t)55,
279 IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG = (__force iwl_ucode_tlv_api_t)56,
280 IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP = (__force iwl_ucode_tlv_api_t)57,
281 IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER = (__force iwl_ucode_tlv_api_t)58,
282 IWL_UCODE_TLV_API_BAND_IN_RX_DATA = (__force iwl_ucode_tlv_api_t)59,
283
284
285 #ifdef __CHECKER__
286 /* sparse says it cannot increment the previous enum member */
287 #define NUM_IWL_UCODE_TLV_API 128
288 #else
289 NUM_IWL_UCODE_TLV_API
290 #endif
291 };
292
293 typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
294
295 /**
296 * enum iwl_ucode_tlv_capa - ucode capabilities
297 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
298 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
299 * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
300 * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
301 * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
302 * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
303 * tx power value into TPC Report action frame and Link Measurement Report
304 * action frame
305 * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
306 * channel in DS parameter set element in probe requests.
307 * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
308 * probe requests.
309 * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
310 * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
311 * which also implies support for the scheduler configuration command
312 * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
313 * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
314 * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
315 * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
316 * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
317 * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
318 * is standalone or with a BSS station interface in the same binding.
319 * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
320 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
321 * sources for the MCC. This TLV bit is a future replacement to
322 * IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
323 * is supported.
324 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
325 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
326 * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting
327 * stabilization latency for SoCs.
328 * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
329 * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
330 * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
331 * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
332 * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
333 * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
334 * (6 GHz).
335 * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command
336 * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
337 * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
338 * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
339 * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
340 * countdown offloading. Beacon notifications are not sent to the host.
341 * The fw also offloads TBTT alignment.
342 * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
343 * antenna the beacon should be transmitted
344 * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
345 * from AP and will send it upon d0i3 exit.
346 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
347 * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
348 * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
349 * thresholds reporting
350 * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
351 * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
352 * regular image.
353 * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
354 * memory addresses from the firmware.
355 * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
356 * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
357 * command size (command version 4) that supports toggling ACK TX
358 * power reduction.
359 * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
360 * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
361 * capability.
362 * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
363 * to report the CSI information with (certain) RX frames
364 * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
365 * initiator and responder
366 * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload
367 * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames
368 * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in
369 * reset flow
370 * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC
371 * channels even when these are not enabled.
372 * @IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT: Support for indicating dump collection
373 * complete to FW.
374 *
375 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
376 */
377 enum iwl_ucode_tlv_capa {
378 /* set 0 */
379 IWL_UCODE_TLV_CAPA_D0I3_SUPPORT = (__force iwl_ucode_tlv_capa_t)0,
380 IWL_UCODE_TLV_CAPA_LAR_SUPPORT = (__force iwl_ucode_tlv_capa_t)1,
381 IWL_UCODE_TLV_CAPA_UMAC_SCAN = (__force iwl_ucode_tlv_capa_t)2,
382 IWL_UCODE_TLV_CAPA_BEAMFORMER = (__force iwl_ucode_tlv_capa_t)3,
383 IWL_UCODE_TLV_CAPA_TDLS_SUPPORT = (__force iwl_ucode_tlv_capa_t)6,
384 IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT = (__force iwl_ucode_tlv_capa_t)8,
385 IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)9,
386 IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)10,
387 IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT = (__force iwl_ucode_tlv_capa_t)11,
388 IWL_UCODE_TLV_CAPA_DQA_SUPPORT = (__force iwl_ucode_tlv_capa_t)12,
389 IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13,
390 IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17,
391 IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18,
392 IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21,
393 IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22,
394 IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26,
395 IWL_UCODE_TLV_CAPA_BT_COEX_PLCR = (__force iwl_ucode_tlv_capa_t)28,
396 IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29,
397 IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30,
398 IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31,
399
400 /* set 1 */
401 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT = (__force iwl_ucode_tlv_capa_t)37,
402 IWL_UCODE_TLV_CAPA_STA_PM_NOTIF = (__force iwl_ucode_tlv_capa_t)38,
403 IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)39,
404 IWL_UCODE_TLV_CAPA_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)40,
405 IWL_UCODE_TLV_CAPA_D0I3_END_FIRST = (__force iwl_ucode_tlv_capa_t)41,
406 IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43,
407 IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44,
408 IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45,
409 IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD = (__force iwl_ucode_tlv_capa_t)46,
410 IWL_UCODE_TLV_CAPA_FTM_CALIBRATED = (__force iwl_ucode_tlv_capa_t)47,
411 IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS = (__force iwl_ucode_tlv_capa_t)48,
412 IWL_UCODE_TLV_CAPA_CS_MODIFY = (__force iwl_ucode_tlv_capa_t)49,
413 IWL_UCODE_TLV_CAPA_SET_LTR_GEN2 = (__force iwl_ucode_tlv_capa_t)50,
414 IWL_UCODE_TLV_CAPA_SET_PPAG = (__force iwl_ucode_tlv_capa_t)52,
415 IWL_UCODE_TLV_CAPA_TAS_CFG = (__force iwl_ucode_tlv_capa_t)53,
416 IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD = (__force iwl_ucode_tlv_capa_t)54,
417 IWL_UCODE_TLV_CAPA_PROTECTED_TWT = (__force iwl_ucode_tlv_capa_t)56,
418 IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE = (__force iwl_ucode_tlv_capa_t)57,
419 IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)58,
420 IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)59,
421 IWL_UCODE_TLV_CAPA_BROADCAST_TWT = (__force iwl_ucode_tlv_capa_t)60,
422 IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO = (__force iwl_ucode_tlv_capa_t)61,
423 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT = (__force iwl_ucode_tlv_capa_t)62,
424 IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT = (__force iwl_ucode_tlv_capa_t)63,
425
426 /* set 2 */
427 IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64,
428 IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65,
429 IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT = (__force iwl_ucode_tlv_capa_t)67,
430 IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT = (__force iwl_ucode_tlv_capa_t)68,
431 IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD = (__force iwl_ucode_tlv_capa_t)70,
432 IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION = (__force iwl_ucode_tlv_capa_t)71,
433 IWL_UCODE_TLV_CAPA_BEACON_STORING = (__force iwl_ucode_tlv_capa_t)72,
434 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3 = (__force iwl_ucode_tlv_capa_t)73,
435 IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW = (__force iwl_ucode_tlv_capa_t)74,
436 IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT = (__force iwl_ucode_tlv_capa_t)75,
437 IWL_UCODE_TLV_CAPA_CTDP_SUPPORT = (__force iwl_ucode_tlv_capa_t)76,
438 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED = (__force iwl_ucode_tlv_capa_t)77,
439 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG = (__force iwl_ucode_tlv_capa_t)80,
440 IWL_UCODE_TLV_CAPA_LQM_SUPPORT = (__force iwl_ucode_tlv_capa_t)81,
441 IWL_UCODE_TLV_CAPA_TX_POWER_ACK = (__force iwl_ucode_tlv_capa_t)84,
442 IWL_UCODE_TLV_CAPA_D3_DEBUG = (__force iwl_ucode_tlv_capa_t)87,
443 IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT = (__force iwl_ucode_tlv_capa_t)88,
444 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT = (__force iwl_ucode_tlv_capa_t)89,
445 IWL_UCODE_TLV_CAPA_CSI_REPORTING = (__force iwl_ucode_tlv_capa_t)90,
446 IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)92,
447 IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)93,
448
449 /* set 3 */
450 IWL_UCODE_TLV_CAPA_MLME_OFFLOAD = (__force iwl_ucode_tlv_capa_t)96,
451
452 /*
453 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels
454 */
455 IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)98,
456
457 IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100,
458 IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT = (__force iwl_ucode_tlv_capa_t)104,
459 IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT = (__force iwl_ucode_tlv_capa_t)105,
460
461 #ifdef __CHECKER__
462 /* sparse says it cannot increment the previous enum member */
463 #define NUM_IWL_UCODE_TLV_CAPA 128
464 #else
465 NUM_IWL_UCODE_TLV_CAPA
466 #endif
467 };
468
469 /* The default calibrate table size if not specified by firmware file */
470 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
471 #define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE 19
472 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE 253
473
474 /* The default max probe length if not specified by the firmware file */
475 #define IWL_DEFAULT_MAX_PROBE_LENGTH 200
476
477 /*
478 * For 16.0 uCode and above, there is no differentiation between sections,
479 * just an offset to the HW address.
480 */
481 #define CPU1_CPU2_SEPARATOR_SECTION 0xFFFFCCCC
482 #define PAGING_SEPARATOR_SECTION 0xAAAABBBB
483
484 /* uCode version contains 4 values: Major/Minor/API/Serial */
485 #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
486 #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
487 #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
488 #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
489
490 /**
491 * struct iwl_tlv_calib_ctrl - Calibration control struct.
492 * Sent as part of the phy configuration command.
493 * @flow_trigger: bitmap for which calibrations to perform according to
494 * flow triggers.
495 * @event_trigger: bitmap for which calibrations to perform according to
496 * event triggers.
497 */
498 struct iwl_tlv_calib_ctrl {
499 __le32 flow_trigger;
500 __le32 event_trigger;
501 } __packed;
502
503 enum iwl_fw_phy_cfg {
504 FW_PHY_CFG_RADIO_TYPE_POS = 0,
505 FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
506 FW_PHY_CFG_RADIO_STEP_POS = 2,
507 FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
508 FW_PHY_CFG_RADIO_DASH_POS = 4,
509 FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
510 FW_PHY_CFG_TX_CHAIN_POS = 16,
511 FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
512 FW_PHY_CFG_RX_CHAIN_POS = 20,
513 FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
514 FW_PHY_CFG_CHAIN_SAD_POS = 23,
515 FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,
516 FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,
517 FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,
518 FW_PHY_CFG_SHARED_CLK = BIT(31),
519 };
520
521 #define IWL_UCODE_MAX_CS 1
522
523 /**
524 * struct iwl_fw_cipher_scheme - a cipher scheme supported by FW.
525 * @cipher: a cipher suite selector
526 * @flags: cipher scheme flags (currently reserved for a future use)
527 * @hdr_len: a size of MPDU security header
528 * @pn_len: a size of PN
529 * @pn_off: an offset of pn from the beginning of the security header
530 * @key_idx_off: an offset of key index byte in the security header
531 * @key_idx_mask: a bit mask of key_idx bits
532 * @key_idx_shift: bit shift needed to get key_idx
533 * @mic_len: mic length in bytes
534 * @hw_cipher: a HW cipher index used in host commands
535 */
536 struct iwl_fw_cipher_scheme {
537 __le32 cipher;
538 u8 flags;
539 u8 hdr_len;
540 u8 pn_len;
541 u8 pn_off;
542 u8 key_idx_off;
543 u8 key_idx_mask;
544 u8 key_idx_shift;
545 u8 mic_len;
546 u8 hw_cipher;
547 } __packed;
548
549 enum iwl_fw_dbg_reg_operator {
550 CSR_ASSIGN,
551 CSR_SETBIT,
552 CSR_CLEARBIT,
553
554 PRPH_ASSIGN,
555 PRPH_SETBIT,
556 PRPH_CLEARBIT,
557
558 INDIRECT_ASSIGN,
559 INDIRECT_SETBIT,
560 INDIRECT_CLEARBIT,
561
562 PRPH_BLOCKBIT,
563 };
564
565 /**
566 * struct iwl_fw_dbg_reg_op - an operation on a register
567 *
568 * @op: &enum iwl_fw_dbg_reg_operator
569 * @addr: offset of the register
570 * @val: value
571 */
572 struct iwl_fw_dbg_reg_op {
573 u8 op;
574 u8 reserved[3];
575 __le32 addr;
576 __le32 val;
577 } __packed;
578
579 /**
580 * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
581 *
582 * @SMEM_MODE: monitor stores the data in SMEM
583 * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
584 * @MARBH_MODE: monitor stores the data in MARBH buffer
585 * @MIPI_MODE: monitor outputs the data through the MIPI interface
586 */
587 enum iwl_fw_dbg_monitor_mode {
588 SMEM_MODE = 0,
589 EXTERNAL_MODE = 1,
590 MARBH_MODE = 2,
591 MIPI_MODE = 3,
592 };
593
594 /**
595 * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
596 *
597 * @data_type: the memory segment type to record
598 * @ofs: the memory segment offset
599 * @len: the memory segment length, in bytes
600 *
601 * This parses IWL_UCODE_TLV_FW_MEM_SEG
602 */
603 struct iwl_fw_dbg_mem_seg_tlv {
604 __le32 data_type;
605 __le32 ofs;
606 __le32 len;
607 } __packed;
608
609 /**
610 * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
611 *
612 * @version: version of the TLV - currently 0
613 * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
614 * @size_power: buffer size will be 2^(size_power + 11)
615 * @base_reg: addr of the base addr register (PRPH)
616 * @end_reg: addr of the end addr register (PRPH)
617 * @write_ptr_reg: the addr of the reg of the write pointer
618 * @wrap_count: the addr of the reg of the wrap_count
619 * @base_shift: shift right of the base addr reg
620 * @end_shift: shift right of the end addr reg
621 * @reg_ops: array of registers operations
622 *
623 * This parses IWL_UCODE_TLV_FW_DBG_DEST
624 */
625 struct iwl_fw_dbg_dest_tlv_v1 {
626 u8 version;
627 u8 monitor_mode;
628 u8 size_power;
629 u8 reserved;
630 __le32 base_reg;
631 __le32 end_reg;
632 __le32 write_ptr_reg;
633 __le32 wrap_count;
634 u8 base_shift;
635 u8 end_shift;
636 struct iwl_fw_dbg_reg_op reg_ops[0];
637 } __packed;
638
639 /* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
640 #define IWL_LDBG_M2S_BUF_SIZE_MSK 0x0fff0000
641 /* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
642 #define IWL_LDBG_M2S_BUF_BA_MSK 0x00000fff
643 /* The smem buffer chunks are in units of 256 bits */
644 #define IWL_M2S_UNIT_SIZE 0x100
645
646 struct iwl_fw_dbg_dest_tlv {
647 u8 version;
648 u8 monitor_mode;
649 u8 size_power;
650 u8 reserved;
651 __le32 cfg_reg;
652 __le32 write_ptr_reg;
653 __le32 wrap_count;
654 u8 base_shift;
655 u8 size_shift;
656 struct iwl_fw_dbg_reg_op reg_ops[0];
657 } __packed;
658
659 struct iwl_fw_dbg_conf_hcmd {
660 u8 id;
661 u8 reserved;
662 __le16 len;
663 u8 data[0];
664 } __packed;
665
666 /**
667 * enum iwl_fw_dbg_trigger_mode - triggers functionalities
668 *
669 * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
670 * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
671 * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
672 * collect only monitor data
673 */
674 enum iwl_fw_dbg_trigger_mode {
675 IWL_FW_DBG_TRIGGER_START = BIT(0),
676 IWL_FW_DBG_TRIGGER_STOP = BIT(1),
677 IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
678 };
679
680 /**
681 * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
682 * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
683 */
684 enum iwl_fw_dbg_trigger_flags {
685 IWL_FW_DBG_FORCE_RESTART = BIT(0),
686 };
687
688 /**
689 * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
690 * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
691 * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
692 * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
693 * @IWL_FW_DBG_CONF_VIF_AP: AP mode
694 * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
695 * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
696 * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
697 */
698 enum iwl_fw_dbg_trigger_vif_type {
699 IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
700 IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
701 IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
702 IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
703 IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
704 IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
705 IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
706 };
707
708 /**
709 * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
710 * @id: &enum iwl_fw_dbg_trigger
711 * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
712 * @stop_conf_ids: bitmap of configurations this trigger relates to.
713 * if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
714 * to the currently running configuration is set, the data should be
715 * collected.
716 * @stop_delay: how many milliseconds to wait before collecting the data
717 * after the STOP trigger fires.
718 * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
719 * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
720 * configuration should be applied when the triggers kicks in.
721 * @occurrences: number of occurrences. 0 means the trigger will never fire.
722 * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
723 * trigger in which another occurrence should be ignored.
724 * @flags: &enum iwl_fw_dbg_trigger_flags
725 */
726 struct iwl_fw_dbg_trigger_tlv {
727 __le32 id;
728 __le32 vif_type;
729 __le32 stop_conf_ids;
730 __le32 stop_delay;
731 u8 mode;
732 u8 start_conf_id;
733 __le16 occurrences;
734 __le16 trig_dis_ms;
735 u8 flags;
736 u8 reserved[5];
737
738 u8 data[0];
739 } __packed;
740
741 #define FW_DBG_START_FROM_ALIVE 0
742 #define FW_DBG_CONF_MAX 32
743 #define FW_DBG_INVALID 0xff
744
745 /**
746 * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
747 * @stop_consec_missed_bcon: stop recording if threshold is crossed.
748 * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
749 * @start_consec_missed_bcon: start recording if threshold is crossed.
750 * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
751 * @reserved1: reserved
752 * @reserved2: reserved
753 */
754 struct iwl_fw_dbg_trigger_missed_bcon {
755 __le32 stop_consec_missed_bcon;
756 __le32 stop_consec_missed_bcon_since_rx;
757 __le32 reserved2[2];
758 __le32 start_consec_missed_bcon;
759 __le32 start_consec_missed_bcon_since_rx;
760 __le32 reserved1[2];
761 } __packed;
762
763 /**
764 * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
765 * cmds: the list of commands to trigger the collection on
766 */
767 struct iwl_fw_dbg_trigger_cmd {
768 struct cmd {
769 u8 cmd_id;
770 u8 group_id;
771 } __packed cmds[16];
772 } __packed;
773
774 /**
775 * iwl_fw_dbg_trigger_stats - configures trigger for statistics
776 * @stop_offset: the offset of the value to be monitored
777 * @stop_threshold: the threshold above which to collect
778 * @start_offset: the offset of the value to be monitored
779 * @start_threshold: the threshold above which to start recording
780 */
781 struct iwl_fw_dbg_trigger_stats {
782 __le32 stop_offset;
783 __le32 stop_threshold;
784 __le32 start_offset;
785 __le32 start_threshold;
786 } __packed;
787
788 /**
789 * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
790 * @rssi: RSSI value to trigger at
791 */
792 struct iwl_fw_dbg_trigger_low_rssi {
793 __le32 rssi;
794 } __packed;
795
796 /**
797 * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
798 * @stop_auth_denied: number of denied authentication to collect
799 * @stop_auth_timeout: number of authentication timeout to collect
800 * @stop_rx_deauth: number of Rx deauth before to collect
801 * @stop_tx_deauth: number of Tx deauth before to collect
802 * @stop_assoc_denied: number of denied association to collect
803 * @stop_assoc_timeout: number of association timeout to collect
804 * @stop_connection_loss: number of connection loss to collect
805 * @start_auth_denied: number of denied authentication to start recording
806 * @start_auth_timeout: number of authentication timeout to start recording
807 * @start_rx_deauth: number of Rx deauth to start recording
808 * @start_tx_deauth: number of Tx deauth to start recording
809 * @start_assoc_denied: number of denied association to start recording
810 * @start_assoc_timeout: number of association timeout to start recording
811 * @start_connection_loss: number of connection loss to start recording
812 */
813 struct iwl_fw_dbg_trigger_mlme {
814 u8 stop_auth_denied;
815 u8 stop_auth_timeout;
816 u8 stop_rx_deauth;
817 u8 stop_tx_deauth;
818
819 u8 stop_assoc_denied;
820 u8 stop_assoc_timeout;
821 u8 stop_connection_loss;
822 u8 reserved;
823
824 u8 start_auth_denied;
825 u8 start_auth_timeout;
826 u8 start_rx_deauth;
827 u8 start_tx_deauth;
828
829 u8 start_assoc_denied;
830 u8 start_assoc_timeout;
831 u8 start_connection_loss;
832 u8 reserved2;
833 } __packed;
834
835 /**
836 * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
837 * @command_queue: timeout for the command queue in ms
838 * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
839 * @softap: timeout for the queues of a softAP in ms
840 * @p2p_go: timeout for the queues of a P2P GO in ms
841 * @p2p_client: timeout for the queues of a P2P client in ms
842 * @p2p_device: timeout for the queues of a P2P device in ms
843 * @ibss: timeout for the queues of an IBSS in ms
844 * @tdls: timeout for the queues of a TDLS station in ms
845 */
846 struct iwl_fw_dbg_trigger_txq_timer {
847 __le32 command_queue;
848 __le32 bss;
849 __le32 softap;
850 __le32 p2p_go;
851 __le32 p2p_client;
852 __le32 p2p_device;
853 __le32 ibss;
854 __le32 tdls;
855 __le32 reserved[4];
856 } __packed;
857
858 /**
859 * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
860 * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
861 * trigger each time a time event notification that relates to time event
862 * id with one of the actions in the bitmap is received and
863 * BIT(notif->status) is set in status_bitmap.
864 *
865 */
866 struct iwl_fw_dbg_trigger_time_event {
867 struct {
868 __le32 id;
869 __le32 action_bitmap;
870 __le32 status_bitmap;
871 } __packed time_events[16];
872 } __packed;
873
874 /**
875 * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
876 * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
877 * when an Rx BlockAck session is started.
878 * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
879 * when an Rx BlockAck session is stopped.
880 * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
881 * when a Tx BlockAck session is started.
882 * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
883 * when a Tx BlockAck session is stopped.
884 * rx_bar: tid bitmap to configure on what tid the trigger should occur
885 * when a BAR is received (for a Tx BlockAck session).
886 * tx_bar: tid bitmap to configure on what tid the trigger should occur
887 * when a BAR is send (for an Rx BlocAck session).
888 * frame_timeout: tid bitmap to configure on what tid the trigger should occur
889 * when a frame times out in the reordering buffer.
890 */
891 struct iwl_fw_dbg_trigger_ba {
892 __le16 rx_ba_start;
893 __le16 rx_ba_stop;
894 __le16 tx_ba_start;
895 __le16 tx_ba_stop;
896 __le16 rx_bar;
897 __le16 tx_bar;
898 __le16 frame_timeout;
899 } __packed;
900
901 /**
902 * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
903 * @action_bitmap: the TDLS action to trigger the collection upon
904 * @peer_mode: trigger on specific peer or all
905 * @peer: the TDLS peer to trigger the collection on
906 */
907 struct iwl_fw_dbg_trigger_tdls {
908 u8 action_bitmap;
909 u8 peer_mode;
910 u8 peer[ETH_ALEN];
911 u8 reserved[4];
912 } __packed;
913
914 /**
915 * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
916 * status.
917 * @statuses: the list of statuses to trigger the collection on
918 */
919 struct iwl_fw_dbg_trigger_tx_status {
920 struct tx_status {
921 u8 status;
922 u8 reserved[3];
923 } __packed statuses[16];
924 __le32 reserved[2];
925 } __packed;
926
927 /**
928 * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
929 * @id: conf id
930 * @usniffer: should the uSniffer image be used
931 * @num_of_hcmds: how many HCMDs to send are present here
932 * @hcmd: a variable length host command to be sent to apply the configuration.
933 * If there is more than one HCMD to send, they will appear one after the
934 * other and be sent in the order that they appear in.
935 * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
936 * %FW_DBG_CONF_MAX configuration per run.
937 */
938 struct iwl_fw_dbg_conf_tlv {
939 u8 id;
940 u8 usniffer;
941 u8 reserved;
942 u8 num_of_hcmds;
943 struct iwl_fw_dbg_conf_hcmd hcmd;
944 } __packed;
945
946 #define IWL_FW_CMD_VER_UNKNOWN 99
947
948 /**
949 * struct iwl_fw_cmd_version - firmware command version entry
950 * @cmd: command ID
951 * @group: group ID
952 * @cmd_ver: command version
953 * @notif_ver: notification version
954 */
955 struct iwl_fw_cmd_version {
956 u8 cmd;
957 u8 group;
958 u8 cmd_ver;
959 u8 notif_ver;
960 } __packed;
961
962 struct iwl_fw_tcm_error_addr {
963 __le32 addr;
964 }; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */
965
966 struct iwl_fw_dump_exclude {
967 __le32 addr, size;
968 };
969
_iwl_tlv_array_len(const struct iwl_ucode_tlv * tlv,size_t fixed_size,size_t var_size)970 static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
971 size_t fixed_size, size_t var_size)
972 {
973 size_t var_len = le32_to_cpu(tlv->length) - fixed_size;
974
975 if (WARN_ON(var_len % var_size))
976 return 0;
977
978 return var_len / var_size;
979 }
980
981 #define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb) \
982 _iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), \
983 sizeof(_struct_ptr->_memb[0]))
984
985 #endif /* __iwl_fw_file_h__ */
986