1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2011 NetApp, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33
34 #include <sys/param.h>
35 #include <sys/types.h>
36 #include <sys/sysctl.h>
37 #include <sys/errno.h>
38 #include <sys/mman.h>
39 #include <sys/cpuset.h>
40
41 #include <stdio.h>
42 #include <stdlib.h>
43 #include <stdbool.h>
44 #include <string.h>
45 #include <unistd.h>
46 #include <libgen.h>
47 #include <libutil.h>
48 #include <fcntl.h>
49 #include <getopt.h>
50 #include <time.h>
51 #include <assert.h>
52 #include <libutil.h>
53
54 #include <machine/cpufunc.h>
55 #include <machine/specialreg.h>
56 #include <machine/vmm.h>
57 #include <machine/vmm_dev.h>
58 #include <vmmapi.h>
59
60 #include "amd/vmcb.h"
61 #include "intel/vmcs.h"
62
63 #define MB (1UL << 20)
64 #define GB (1UL << 30)
65
66 #define REQ_ARG required_argument
67 #define NO_ARG no_argument
68 #define OPT_ARG optional_argument
69
70 static const char *progname;
71
72 static void
usage(bool cpu_intel)73 usage(bool cpu_intel)
74 {
75
76 (void)fprintf(stderr,
77 "Usage: %s --vm=<vmname>\n"
78 " [--cpu=<vcpu_number>]\n"
79 " [--create]\n"
80 " [--destroy]\n"
81 " [--get-all]\n"
82 " [--get-stats]\n"
83 " [--set-desc-ds]\n"
84 " [--get-desc-ds]\n"
85 " [--set-desc-es]\n"
86 " [--get-desc-es]\n"
87 " [--set-desc-gs]\n"
88 " [--get-desc-gs]\n"
89 " [--set-desc-fs]\n"
90 " [--get-desc-fs]\n"
91 " [--set-desc-cs]\n"
92 " [--get-desc-cs]\n"
93 " [--set-desc-ss]\n"
94 " [--get-desc-ss]\n"
95 " [--set-desc-tr]\n"
96 " [--get-desc-tr]\n"
97 " [--set-desc-ldtr]\n"
98 " [--get-desc-ldtr]\n"
99 " [--set-desc-gdtr]\n"
100 " [--get-desc-gdtr]\n"
101 " [--set-desc-idtr]\n"
102 " [--get-desc-idtr]\n"
103 " [--run]\n"
104 " [--capname=<capname>]\n"
105 " [--getcap]\n"
106 " [--setcap=<0|1>]\n"
107 " [--desc-base=<BASE>]\n"
108 " [--desc-limit=<LIMIT>]\n"
109 " [--desc-access=<ACCESS>]\n"
110 " [--set-cr0=<CR0>]\n"
111 " [--get-cr0]\n"
112 " [--set-cr2=<CR2>]\n"
113 " [--get-cr2]\n"
114 " [--set-cr3=<CR3>]\n"
115 " [--get-cr3]\n"
116 " [--set-cr4=<CR4>]\n"
117 " [--get-cr4]\n"
118 " [--set-dr0=<DR0>]\n"
119 " [--get-dr0]\n"
120 " [--set-dr1=<DR1>]\n"
121 " [--get-dr1]\n"
122 " [--set-dr2=<DR2>]\n"
123 " [--get-dr2]\n"
124 " [--set-dr3=<DR3>]\n"
125 " [--get-dr3]\n"
126 " [--set-dr6=<DR6>]\n"
127 " [--get-dr6]\n"
128 " [--set-dr7=<DR7>]\n"
129 " [--get-dr7]\n"
130 " [--set-rsp=<RSP>]\n"
131 " [--get-rsp]\n"
132 " [--set-rip=<RIP>]\n"
133 " [--get-rip]\n"
134 " [--get-rax]\n"
135 " [--set-rax=<RAX>]\n"
136 " [--get-rbx]\n"
137 " [--get-rcx]\n"
138 " [--get-rdx]\n"
139 " [--get-rsi]\n"
140 " [--get-rdi]\n"
141 " [--get-rbp]\n"
142 " [--get-r8]\n"
143 " [--get-r9]\n"
144 " [--get-r10]\n"
145 " [--get-r11]\n"
146 " [--get-r12]\n"
147 " [--get-r13]\n"
148 " [--get-r14]\n"
149 " [--get-r15]\n"
150 " [--set-rflags=<RFLAGS>]\n"
151 " [--get-rflags]\n"
152 " [--set-cs]\n"
153 " [--get-cs]\n"
154 " [--set-ds]\n"
155 " [--get-ds]\n"
156 " [--set-es]\n"
157 " [--get-es]\n"
158 " [--set-fs]\n"
159 " [--get-fs]\n"
160 " [--set-gs]\n"
161 " [--get-gs]\n"
162 " [--set-ss]\n"
163 " [--get-ss]\n"
164 " [--get-tr]\n"
165 " [--get-ldtr]\n"
166 " [--set-x2apic-state=<state>]\n"
167 " [--get-x2apic-state]\n"
168 " [--unassign-pptdev=<bus/slot/func>]\n"
169 " [--set-mem=<memory in units of MB>]\n"
170 " [--get-lowmem]\n"
171 " [--get-highmem]\n"
172 " [--get-gpa-pmap]\n"
173 " [--assert-lapic-lvt=<pin>]\n"
174 " [--inject-nmi]\n"
175 " [--force-reset]\n"
176 " [--force-poweroff]\n"
177 " [--get-rtc-time]\n"
178 " [--set-rtc-time=<secs>]\n"
179 " [--get-rtc-nvram]\n"
180 " [--set-rtc-nvram=<val>]\n"
181 " [--rtc-nvram-offset=<offset>]\n"
182 " [--get-active-cpus]\n"
183 " [--get-suspended-cpus]\n"
184 " [--get-intinfo]\n"
185 " [--get-eptp]\n"
186 " [--set-exception-bitmap]\n"
187 " [--get-exception-bitmap]\n"
188 " [--get-tsc-offset]\n"
189 " [--get-guest-pat]\n"
190 " [--get-io-bitmap-address]\n"
191 " [--get-msr-bitmap]\n"
192 " [--get-msr-bitmap-address]\n"
193 " [--get-guest-sysenter]\n"
194 " [--get-exit-reason]\n"
195 " [--get-cpu-topology]\n",
196 progname);
197
198 if (cpu_intel) {
199 (void)fprintf(stderr,
200 " [--get-vmcs-pinbased-ctls]\n"
201 " [--get-vmcs-procbased-ctls]\n"
202 " [--get-vmcs-procbased-ctls2]\n"
203 " [--get-vmcs-entry-interruption-info]\n"
204 " [--set-vmcs-entry-interruption-info=<info>]\n"
205 " [--get-vmcs-guest-physical-address\n"
206 " [--get-vmcs-guest-linear-address\n"
207 " [--get-vmcs-host-pat]\n"
208 " [--get-vmcs-host-cr0]\n"
209 " [--get-vmcs-host-cr3]\n"
210 " [--get-vmcs-host-cr4]\n"
211 " [--get-vmcs-host-rip]\n"
212 " [--get-vmcs-host-rsp]\n"
213 " [--get-vmcs-cr0-mask]\n"
214 " [--get-vmcs-cr0-shadow]\n"
215 " [--get-vmcs-cr4-mask]\n"
216 " [--get-vmcs-cr4-shadow]\n"
217 " [--get-vmcs-cr3-targets]\n"
218 " [--get-vmcs-apic-access-address]\n"
219 " [--get-vmcs-virtual-apic-address]\n"
220 " [--get-vmcs-tpr-threshold]\n"
221 " [--get-vmcs-vpid]\n"
222 " [--get-vmcs-instruction-error]\n"
223 " [--get-vmcs-exit-ctls]\n"
224 " [--get-vmcs-entry-ctls]\n"
225 " [--get-vmcs-link]\n"
226 " [--get-vmcs-exit-qualification]\n"
227 " [--get-vmcs-exit-interruption-info]\n"
228 " [--get-vmcs-exit-interruption-error]\n"
229 " [--get-vmcs-interruptibility]\n"
230 );
231 } else {
232 (void)fprintf(stderr,
233 " [--get-vmcb-intercepts]\n"
234 " [--get-vmcb-asid]\n"
235 " [--get-vmcb-exit-details]\n"
236 " [--get-vmcb-tlb-ctrl]\n"
237 " [--get-vmcb-virq]\n"
238 " [--get-avic-apic-bar]\n"
239 " [--get-avic-backing-page]\n"
240 " [--get-avic-table]\n"
241 );
242 }
243 exit(1);
244 }
245
246 static int get_rtc_time, set_rtc_time;
247 static int get_rtc_nvram, set_rtc_nvram;
248 static int rtc_nvram_offset;
249 static uint8_t rtc_nvram_value;
250 static time_t rtc_secs;
251
252 static int get_stats, getcap, setcap, capval, get_gpa_pmap;
253 static int inject_nmi, assert_lapic_lvt;
254 static int force_reset, force_poweroff;
255 static const char *capname;
256 static int create, destroy, get_memmap, get_memseg;
257 static int get_intinfo;
258 static int get_active_cpus, get_suspended_cpus;
259 static uint64_t memsize;
260 static int set_cr0, get_cr0, set_cr2, get_cr2, set_cr3, get_cr3;
261 static int set_cr4, get_cr4;
262 static int set_efer, get_efer;
263 static int set_dr0, get_dr0;
264 static int set_dr1, get_dr1;
265 static int set_dr2, get_dr2;
266 static int set_dr3, get_dr3;
267 static int set_dr6, get_dr6;
268 static int set_dr7, get_dr7;
269 static int set_rsp, get_rsp, set_rip, get_rip, set_rflags, get_rflags;
270 static int set_rax, get_rax;
271 static int get_rbx, get_rcx, get_rdx, get_rsi, get_rdi, get_rbp;
272 static int get_r8, get_r9, get_r10, get_r11, get_r12, get_r13, get_r14, get_r15;
273 static int set_desc_ds, get_desc_ds;
274 static int set_desc_es, get_desc_es;
275 static int set_desc_fs, get_desc_fs;
276 static int set_desc_gs, get_desc_gs;
277 static int set_desc_cs, get_desc_cs;
278 static int set_desc_ss, get_desc_ss;
279 static int set_desc_gdtr, get_desc_gdtr;
280 static int set_desc_idtr, get_desc_idtr;
281 static int set_desc_tr, get_desc_tr;
282 static int set_desc_ldtr, get_desc_ldtr;
283 static int set_cs, set_ds, set_es, set_fs, set_gs, set_ss, set_tr, set_ldtr;
284 static int get_cs, get_ds, get_es, get_fs, get_gs, get_ss, get_tr, get_ldtr;
285 static int set_x2apic_state, get_x2apic_state;
286 enum x2apic_state x2apic_state;
287 static int unassign_pptdev, bus, slot, func;
288 static int run;
289 static int get_cpu_topology;
290
291 /*
292 * VMCB specific.
293 */
294 static int get_vmcb_intercept, get_vmcb_exit_details, get_vmcb_tlb_ctrl;
295 static int get_vmcb_virq, get_avic_table;
296
297 /*
298 * VMCS-specific fields
299 */
300 static int get_pinbased_ctls, get_procbased_ctls, get_procbased_ctls2;
301 static int get_eptp, get_io_bitmap, get_tsc_offset;
302 static int get_vmcs_entry_interruption_info, set_vmcs_entry_interruption_info;
303 static int get_vmcs_interruptibility;
304 uint32_t vmcs_entry_interruption_info;
305 static int get_vmcs_gpa, get_vmcs_gla;
306 static int get_exception_bitmap, set_exception_bitmap, exception_bitmap;
307 static int get_cr0_mask, get_cr0_shadow;
308 static int get_cr4_mask, get_cr4_shadow;
309 static int get_cr3_targets;
310 static int get_apic_access_addr, get_virtual_apic_addr, get_tpr_threshold;
311 static int get_msr_bitmap, get_msr_bitmap_address;
312 static int get_vpid_asid;
313 static int get_inst_err, get_exit_ctls, get_entry_ctls;
314 static int get_host_cr0, get_host_cr3, get_host_cr4;
315 static int get_host_rip, get_host_rsp;
316 static int get_guest_pat, get_host_pat;
317 static int get_guest_sysenter, get_vmcs_link;
318 static int get_exit_reason, get_vmcs_exit_qualification;
319 static int get_vmcs_exit_interruption_info, get_vmcs_exit_interruption_error;
320 static int get_vmcs_exit_inst_length;
321
322 static uint64_t desc_base;
323 static uint32_t desc_limit, desc_access;
324
325 static int get_all;
326
327 static void
dump_vm_run_exitcode(struct vm_exit * vmexit,int vcpu)328 dump_vm_run_exitcode(struct vm_exit *vmexit, int vcpu)
329 {
330 printf("vm exit[%d]\n", vcpu);
331 printf("\trip\t\t0x%016lx\n", vmexit->rip);
332 printf("\tinst_length\t%d\n", vmexit->inst_length);
333 switch (vmexit->exitcode) {
334 case VM_EXITCODE_INOUT:
335 printf("\treason\t\tINOUT\n");
336 printf("\tdirection\t%s\n", vmexit->u.inout.in ? "IN" : "OUT");
337 printf("\tbytes\t\t%d\n", vmexit->u.inout.bytes);
338 printf("\tflags\t\t%s%s\n",
339 vmexit->u.inout.string ? "STRING " : "",
340 vmexit->u.inout.rep ? "REP " : "");
341 printf("\tport\t\t0x%04x\n", vmexit->u.inout.port);
342 printf("\teax\t\t0x%08x\n", vmexit->u.inout.eax);
343 break;
344 case VM_EXITCODE_VMX:
345 printf("\treason\t\tVMX\n");
346 printf("\tstatus\t\t%d\n", vmexit->u.vmx.status);
347 printf("\texit_reason\t0x%08x (%u)\n",
348 vmexit->u.vmx.exit_reason, vmexit->u.vmx.exit_reason);
349 printf("\tqualification\t0x%016lx\n",
350 vmexit->u.vmx.exit_qualification);
351 printf("\tinst_type\t\t%d\n", vmexit->u.vmx.inst_type);
352 printf("\tinst_error\t\t%d\n", vmexit->u.vmx.inst_error);
353 break;
354 case VM_EXITCODE_SVM:
355 printf("\treason\t\tSVM\n");
356 printf("\texit_reason\t\t%#lx\n", vmexit->u.svm.exitcode);
357 printf("\texitinfo1\t\t%#lx\n", vmexit->u.svm.exitinfo1);
358 printf("\texitinfo2\t\t%#lx\n", vmexit->u.svm.exitinfo2);
359 break;
360 default:
361 printf("*** unknown vm run exitcode %d\n", vmexit->exitcode);
362 break;
363 }
364 }
365
366 /* AMD 6th generation and Intel compatible MSRs */
367 #define MSR_AMD6TH_START 0xC0000000
368 #define MSR_AMD6TH_END 0xC0001FFF
369 /* AMD 7th and 8th generation compatible MSRs */
370 #define MSR_AMD7TH_START 0xC0010000
371 #define MSR_AMD7TH_END 0xC0011FFF
372
373 static const char *
msr_name(uint32_t msr)374 msr_name(uint32_t msr)
375 {
376 static char buf[32];
377
378 switch(msr) {
379 case MSR_TSC:
380 return ("MSR_TSC");
381 case MSR_EFER:
382 return ("MSR_EFER");
383 case MSR_STAR:
384 return ("MSR_STAR");
385 case MSR_LSTAR:
386 return ("MSR_LSTAR");
387 case MSR_CSTAR:
388 return ("MSR_CSTAR");
389 case MSR_SF_MASK:
390 return ("MSR_SF_MASK");
391 case MSR_FSBASE:
392 return ("MSR_FSBASE");
393 case MSR_GSBASE:
394 return ("MSR_GSBASE");
395 case MSR_KGSBASE:
396 return ("MSR_KGSBASE");
397 case MSR_SYSENTER_CS_MSR:
398 return ("MSR_SYSENTER_CS_MSR");
399 case MSR_SYSENTER_ESP_MSR:
400 return ("MSR_SYSENTER_ESP_MSR");
401 case MSR_SYSENTER_EIP_MSR:
402 return ("MSR_SYSENTER_EIP_MSR");
403 case MSR_PAT:
404 return ("MSR_PAT");
405 }
406 snprintf(buf, sizeof(buf), "MSR %#08x", msr);
407
408 return (buf);
409 }
410
411 static inline void
print_msr_pm(uint64_t msr,int vcpu,int readable,int writeable)412 print_msr_pm(uint64_t msr, int vcpu, int readable, int writeable)
413 {
414
415 if (readable || writeable) {
416 printf("%-20s[%d]\t\t%c%c\n", msr_name(msr), vcpu,
417 readable ? 'R' : '-', writeable ? 'W' : '-');
418 }
419 }
420
421 /*
422 * Reference APM vol2, section 15.11 MSR Intercepts.
423 */
424 static void
dump_amd_msr_pm(const char * bitmap,int vcpu)425 dump_amd_msr_pm(const char *bitmap, int vcpu)
426 {
427 int byte, bit, readable, writeable;
428 uint32_t msr;
429
430 for (msr = 0; msr < 0x2000; msr++) {
431 byte = msr / 4;
432 bit = (msr % 4) * 2;
433
434 /* Look at MSRs in the range 0x00000000 to 0x00001FFF */
435 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1;
436 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1;
437 print_msr_pm(msr, vcpu, readable, writeable);
438
439 /* Look at MSRs in the range 0xC0000000 to 0xC0001FFF */
440 byte += 2048;
441 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1;
442 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1;
443 print_msr_pm(msr + MSR_AMD6TH_START, vcpu, readable,
444 writeable);
445
446 /* MSR 0xC0010000 to 0xC0011FF is only for AMD */
447 byte += 4096;
448 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1;
449 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1;
450 print_msr_pm(msr + MSR_AMD7TH_START, vcpu, readable,
451 writeable);
452 }
453 }
454
455 /*
456 * Reference Intel SDM Vol3 Section 24.6.9 MSR-Bitmap Address
457 */
458 static void
dump_intel_msr_pm(const char * bitmap,int vcpu)459 dump_intel_msr_pm(const char *bitmap, int vcpu)
460 {
461 int byte, bit, readable, writeable;
462 uint32_t msr;
463
464 for (msr = 0; msr < 0x2000; msr++) {
465 byte = msr / 8;
466 bit = msr & 0x7;
467
468 /* Look at MSRs in the range 0x00000000 to 0x00001FFF */
469 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1;
470 writeable = (bitmap[2048 + byte] & (1 << bit)) ? 0 : 1;
471 print_msr_pm(msr, vcpu, readable, writeable);
472
473 /* Look at MSRs in the range 0xC0000000 to 0xC0001FFF */
474 byte += 1024;
475 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1;
476 writeable = (bitmap[2048 + byte] & (1 << bit)) ? 0 : 1;
477 print_msr_pm(msr + MSR_AMD6TH_START, vcpu, readable,
478 writeable);
479 }
480 }
481
482 static int
dump_msr_bitmap(int vcpu,uint64_t addr,bool cpu_intel)483 dump_msr_bitmap(int vcpu, uint64_t addr, bool cpu_intel)
484 {
485 int error, fd, map_size;
486 const char *bitmap;
487
488 error = -1;
489 bitmap = MAP_FAILED;
490
491 fd = open("/dev/mem", O_RDONLY, 0);
492 if (fd < 0) {
493 perror("Couldn't open /dev/mem");
494 goto done;
495 }
496
497 if (cpu_intel)
498 map_size = PAGE_SIZE;
499 else
500 map_size = 2 * PAGE_SIZE;
501
502 bitmap = mmap(NULL, map_size, PROT_READ, MAP_SHARED, fd, addr);
503 if (bitmap == MAP_FAILED) {
504 perror("mmap failed");
505 goto done;
506 }
507
508 if (cpu_intel)
509 dump_intel_msr_pm(bitmap, vcpu);
510 else
511 dump_amd_msr_pm(bitmap, vcpu);
512
513 error = 0;
514 done:
515 if (bitmap != MAP_FAILED)
516 munmap((void *)bitmap, map_size);
517 if (fd >= 0)
518 close(fd);
519
520 return (error);
521 }
522
523 static int
vm_get_vmcs_field(struct vmctx * ctx,int vcpu,int field,uint64_t * ret_val)524 vm_get_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t *ret_val)
525 {
526
527 return (vm_get_register(ctx, vcpu, VMCS_IDENT(field), ret_val));
528 }
529
530 static int
vm_set_vmcs_field(struct vmctx * ctx,int vcpu,int field,uint64_t val)531 vm_set_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t val)
532 {
533
534 return (vm_set_register(ctx, vcpu, VMCS_IDENT(field), val));
535 }
536
537 static int
vm_get_vmcb_field(struct vmctx * ctx,int vcpu,int off,int bytes,uint64_t * ret_val)538 vm_get_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes,
539 uint64_t *ret_val)
540 {
541
542 return (vm_get_register(ctx, vcpu, VMCB_ACCESS(off, bytes), ret_val));
543 }
544
545 static int
vm_set_vmcb_field(struct vmctx * ctx,int vcpu,int off,int bytes,uint64_t val)546 vm_set_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes,
547 uint64_t val)
548 {
549
550 return (vm_set_register(ctx, vcpu, VMCB_ACCESS(off, bytes), val));
551 }
552
553 enum {
554 VMNAME = 1000, /* avoid collision with return values from getopt */
555 VCPU,
556 SET_MEM,
557 SET_EFER,
558 SET_CR0,
559 SET_CR2,
560 SET_CR3,
561 SET_CR4,
562 SET_DR0,
563 SET_DR1,
564 SET_DR2,
565 SET_DR3,
566 SET_DR6,
567 SET_DR7,
568 SET_RSP,
569 SET_RIP,
570 SET_RAX,
571 SET_RFLAGS,
572 DESC_BASE,
573 DESC_LIMIT,
574 DESC_ACCESS,
575 SET_CS,
576 SET_DS,
577 SET_ES,
578 SET_FS,
579 SET_GS,
580 SET_SS,
581 SET_TR,
582 SET_LDTR,
583 SET_X2APIC_STATE,
584 SET_EXCEPTION_BITMAP,
585 SET_VMCS_ENTRY_INTERRUPTION_INFO,
586 SET_CAP,
587 CAPNAME,
588 UNASSIGN_PPTDEV,
589 GET_GPA_PMAP,
590 ASSERT_LAPIC_LVT,
591 SET_RTC_TIME,
592 SET_RTC_NVRAM,
593 RTC_NVRAM_OFFSET,
594 };
595
596 static void
print_cpus(const char * banner,const cpuset_t * cpus)597 print_cpus(const char *banner, const cpuset_t *cpus)
598 {
599 int i, first;
600
601 first = 1;
602 printf("%s:\t", banner);
603 if (!CPU_EMPTY(cpus)) {
604 for (i = 0; i < CPU_SETSIZE; i++) {
605 if (CPU_ISSET(i, cpus)) {
606 printf("%s%d", first ? " " : ", ", i);
607 first = 0;
608 }
609 }
610 } else
611 printf(" (none)");
612 printf("\n");
613 }
614
615 static void
print_intinfo(const char * banner,uint64_t info)616 print_intinfo(const char *banner, uint64_t info)
617 {
618 int type;
619
620 printf("%s:\t", banner);
621 if (info & VM_INTINFO_VALID) {
622 type = info & VM_INTINFO_TYPE;
623 switch (type) {
624 case VM_INTINFO_HWINTR:
625 printf("extint");
626 break;
627 case VM_INTINFO_NMI:
628 printf("nmi");
629 break;
630 case VM_INTINFO_SWINTR:
631 printf("swint");
632 break;
633 default:
634 printf("exception");
635 break;
636 }
637 printf(" vector %d", (int)VM_INTINFO_VECTOR(info));
638 if (info & VM_INTINFO_DEL_ERRCODE)
639 printf(" errcode %#x", (u_int)(info >> 32));
640 } else {
641 printf("n/a");
642 }
643 printf("\n");
644 }
645
646 static bool
cpu_vendor_intel(void)647 cpu_vendor_intel(void)
648 {
649 u_int regs[4];
650 char cpu_vendor[13];
651
652 do_cpuid(0, regs);
653 ((u_int *)&cpu_vendor)[0] = regs[1];
654 ((u_int *)&cpu_vendor)[1] = regs[3];
655 ((u_int *)&cpu_vendor)[2] = regs[2];
656 cpu_vendor[12] = '\0';
657
658 if (strcmp(cpu_vendor, "AuthenticAMD") == 0) {
659 return (false);
660 } else if (strcmp(cpu_vendor, "GenuineIntel") == 0) {
661 return (true);
662 } else {
663 fprintf(stderr, "Unknown cpu vendor \"%s\"\n", cpu_vendor);
664 exit(1);
665 }
666 }
667
668 static int
get_all_registers(struct vmctx * ctx,int vcpu)669 get_all_registers(struct vmctx *ctx, int vcpu)
670 {
671 uint64_t cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7;
672 uint64_t rsp, rip, rflags, efer;
673 uint64_t rax, rbx, rcx, rdx, rsi, rdi, rbp;
674 uint64_t r8, r9, r10, r11, r12, r13, r14, r15;
675 int error = 0;
676
677 if (!error && (get_efer || get_all)) {
678 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_EFER, &efer);
679 if (error == 0)
680 printf("efer[%d]\t\t0x%016lx\n", vcpu, efer);
681 }
682
683 if (!error && (get_cr0 || get_all)) {
684 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR0, &cr0);
685 if (error == 0)
686 printf("cr0[%d]\t\t0x%016lx\n", vcpu, cr0);
687 }
688
689 if (!error && (get_cr2 || get_all)) {
690 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR2, &cr2);
691 if (error == 0)
692 printf("cr2[%d]\t\t0x%016lx\n", vcpu, cr2);
693 }
694
695 if (!error && (get_cr3 || get_all)) {
696 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR3, &cr3);
697 if (error == 0)
698 printf("cr3[%d]\t\t0x%016lx\n", vcpu, cr3);
699 }
700
701 if (!error && (get_cr4 || get_all)) {
702 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR4, &cr4);
703 if (error == 0)
704 printf("cr4[%d]\t\t0x%016lx\n", vcpu, cr4);
705 }
706
707 if (!error && (get_dr0 || get_all)) {
708 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR0, &dr0);
709 if (error == 0)
710 printf("dr0[%d]\t\t0x%016lx\n", vcpu, dr0);
711 }
712
713 if (!error && (get_dr1 || get_all)) {
714 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR1, &dr1);
715 if (error == 0)
716 printf("dr1[%d]\t\t0x%016lx\n", vcpu, dr1);
717 }
718
719 if (!error && (get_dr2 || get_all)) {
720 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR2, &dr2);
721 if (error == 0)
722 printf("dr2[%d]\t\t0x%016lx\n", vcpu, dr2);
723 }
724
725 if (!error && (get_dr3 || get_all)) {
726 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR3, &dr3);
727 if (error == 0)
728 printf("dr3[%d]\t\t0x%016lx\n", vcpu, dr3);
729 }
730
731 if (!error && (get_dr6 || get_all)) {
732 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR6, &dr6);
733 if (error == 0)
734 printf("dr6[%d]\t\t0x%016lx\n", vcpu, dr6);
735 }
736
737 if (!error && (get_dr7 || get_all)) {
738 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR7, &dr7);
739 if (error == 0)
740 printf("dr7[%d]\t\t0x%016lx\n", vcpu, dr7);
741 }
742
743 if (!error && (get_rsp || get_all)) {
744 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSP, &rsp);
745 if (error == 0)
746 printf("rsp[%d]\t\t0x%016lx\n", vcpu, rsp);
747 }
748
749 if (!error && (get_rip || get_all)) {
750 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RIP, &rip);
751 if (error == 0)
752 printf("rip[%d]\t\t0x%016lx\n", vcpu, rip);
753 }
754
755 if (!error && (get_rax || get_all)) {
756 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RAX, &rax);
757 if (error == 0)
758 printf("rax[%d]\t\t0x%016lx\n", vcpu, rax);
759 }
760
761 if (!error && (get_rbx || get_all)) {
762 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBX, &rbx);
763 if (error == 0)
764 printf("rbx[%d]\t\t0x%016lx\n", vcpu, rbx);
765 }
766
767 if (!error && (get_rcx || get_all)) {
768 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RCX, &rcx);
769 if (error == 0)
770 printf("rcx[%d]\t\t0x%016lx\n", vcpu, rcx);
771 }
772
773 if (!error && (get_rdx || get_all)) {
774 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDX, &rdx);
775 if (error == 0)
776 printf("rdx[%d]\t\t0x%016lx\n", vcpu, rdx);
777 }
778
779 if (!error && (get_rsi || get_all)) {
780 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSI, &rsi);
781 if (error == 0)
782 printf("rsi[%d]\t\t0x%016lx\n", vcpu, rsi);
783 }
784
785 if (!error && (get_rdi || get_all)) {
786 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDI, &rdi);
787 if (error == 0)
788 printf("rdi[%d]\t\t0x%016lx\n", vcpu, rdi);
789 }
790
791 if (!error && (get_rbp || get_all)) {
792 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBP, &rbp);
793 if (error == 0)
794 printf("rbp[%d]\t\t0x%016lx\n", vcpu, rbp);
795 }
796
797 if (!error && (get_r8 || get_all)) {
798 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R8, &r8);
799 if (error == 0)
800 printf("r8[%d]\t\t0x%016lx\n", vcpu, r8);
801 }
802
803 if (!error && (get_r9 || get_all)) {
804 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R9, &r9);
805 if (error == 0)
806 printf("r9[%d]\t\t0x%016lx\n", vcpu, r9);
807 }
808
809 if (!error && (get_r10 || get_all)) {
810 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R10, &r10);
811 if (error == 0)
812 printf("r10[%d]\t\t0x%016lx\n", vcpu, r10);
813 }
814
815 if (!error && (get_r11 || get_all)) {
816 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R11, &r11);
817 if (error == 0)
818 printf("r11[%d]\t\t0x%016lx\n", vcpu, r11);
819 }
820
821 if (!error && (get_r12 || get_all)) {
822 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R12, &r12);
823 if (error == 0)
824 printf("r12[%d]\t\t0x%016lx\n", vcpu, r12);
825 }
826
827 if (!error && (get_r13 || get_all)) {
828 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R13, &r13);
829 if (error == 0)
830 printf("r13[%d]\t\t0x%016lx\n", vcpu, r13);
831 }
832
833 if (!error && (get_r14 || get_all)) {
834 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R14, &r14);
835 if (error == 0)
836 printf("r14[%d]\t\t0x%016lx\n", vcpu, r14);
837 }
838
839 if (!error && (get_r15 || get_all)) {
840 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R15, &r15);
841 if (error == 0)
842 printf("r15[%d]\t\t0x%016lx\n", vcpu, r15);
843 }
844
845 if (!error && (get_rflags || get_all)) {
846 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RFLAGS,
847 &rflags);
848 if (error == 0)
849 printf("rflags[%d]\t0x%016lx\n", vcpu, rflags);
850 }
851
852 return (error);
853 }
854
855 static int
get_all_segments(struct vmctx * ctx,int vcpu)856 get_all_segments(struct vmctx *ctx, int vcpu)
857 {
858 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr;
859 int error = 0;
860
861 if (!error && (get_desc_ds || get_all)) {
862 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_DS,
863 &desc_base, &desc_limit, &desc_access);
864 if (error == 0) {
865 printf("ds desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
866 vcpu, desc_base, desc_limit, desc_access);
867 }
868 }
869
870 if (!error && (get_desc_es || get_all)) {
871 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_ES,
872 &desc_base, &desc_limit, &desc_access);
873 if (error == 0) {
874 printf("es desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
875 vcpu, desc_base, desc_limit, desc_access);
876 }
877 }
878
879 if (!error && (get_desc_fs || get_all)) {
880 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_FS,
881 &desc_base, &desc_limit, &desc_access);
882 if (error == 0) {
883 printf("fs desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
884 vcpu, desc_base, desc_limit, desc_access);
885 }
886 }
887
888 if (!error && (get_desc_gs || get_all)) {
889 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GS,
890 &desc_base, &desc_limit, &desc_access);
891 if (error == 0) {
892 printf("gs desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
893 vcpu, desc_base, desc_limit, desc_access);
894 }
895 }
896
897 if (!error && (get_desc_ss || get_all)) {
898 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_SS,
899 &desc_base, &desc_limit, &desc_access);
900 if (error == 0) {
901 printf("ss desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
902 vcpu, desc_base, desc_limit, desc_access);
903 }
904 }
905
906 if (!error && (get_desc_cs || get_all)) {
907 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_CS,
908 &desc_base, &desc_limit, &desc_access);
909 if (error == 0) {
910 printf("cs desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
911 vcpu, desc_base, desc_limit, desc_access);
912 }
913 }
914
915 if (!error && (get_desc_tr || get_all)) {
916 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_TR,
917 &desc_base, &desc_limit, &desc_access);
918 if (error == 0) {
919 printf("tr desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
920 vcpu, desc_base, desc_limit, desc_access);
921 }
922 }
923
924 if (!error && (get_desc_ldtr || get_all)) {
925 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_LDTR,
926 &desc_base, &desc_limit, &desc_access);
927 if (error == 0) {
928 printf("ldtr desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
929 vcpu, desc_base, desc_limit, desc_access);
930 }
931 }
932
933 if (!error && (get_desc_gdtr || get_all)) {
934 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GDTR,
935 &desc_base, &desc_limit, &desc_access);
936 if (error == 0) {
937 printf("gdtr[%d]\t\t0x%016lx/0x%08x\n",
938 vcpu, desc_base, desc_limit);
939 }
940 }
941
942 if (!error && (get_desc_idtr || get_all)) {
943 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_IDTR,
944 &desc_base, &desc_limit, &desc_access);
945 if (error == 0) {
946 printf("idtr[%d]\t\t0x%016lx/0x%08x\n",
947 vcpu, desc_base, desc_limit);
948 }
949 }
950
951 if (!error && (get_cs || get_all)) {
952 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CS, &cs);
953 if (error == 0)
954 printf("cs[%d]\t\t0x%04lx\n", vcpu, cs);
955 }
956
957 if (!error && (get_ds || get_all)) {
958 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DS, &ds);
959 if (error == 0)
960 printf("ds[%d]\t\t0x%04lx\n", vcpu, ds);
961 }
962
963 if (!error && (get_es || get_all)) {
964 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_ES, &es);
965 if (error == 0)
966 printf("es[%d]\t\t0x%04lx\n", vcpu, es);
967 }
968
969 if (!error && (get_fs || get_all)) {
970 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_FS, &fs);
971 if (error == 0)
972 printf("fs[%d]\t\t0x%04lx\n", vcpu, fs);
973 }
974
975 if (!error && (get_gs || get_all)) {
976 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_GS, &gs);
977 if (error == 0)
978 printf("gs[%d]\t\t0x%04lx\n", vcpu, gs);
979 }
980
981 if (!error && (get_ss || get_all)) {
982 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_SS, &ss);
983 if (error == 0)
984 printf("ss[%d]\t\t0x%04lx\n", vcpu, ss);
985 }
986
987 if (!error && (get_tr || get_all)) {
988 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_TR, &tr);
989 if (error == 0)
990 printf("tr[%d]\t\t0x%04lx\n", vcpu, tr);
991 }
992
993 if (!error && (get_ldtr || get_all)) {
994 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_LDTR, &ldtr);
995 if (error == 0)
996 printf("ldtr[%d]\t\t0x%04lx\n", vcpu, ldtr);
997 }
998
999 return (error);
1000 }
1001
1002 static int
get_misc_vmcs(struct vmctx * ctx,int vcpu)1003 get_misc_vmcs(struct vmctx *ctx, int vcpu)
1004 {
1005 uint64_t ctl, cr0, cr3, cr4, rsp, rip, pat, addr, u64;
1006 int error = 0;
1007
1008 if (!error && (get_cr0_mask || get_all)) {
1009 uint64_t cr0mask;
1010 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_MASK, &cr0mask);
1011 if (error == 0)
1012 printf("cr0_mask[%d]\t\t0x%016lx\n", vcpu, cr0mask);
1013 }
1014
1015 if (!error && (get_cr0_shadow || get_all)) {
1016 uint64_t cr0shadow;
1017 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_SHADOW,
1018 &cr0shadow);
1019 if (error == 0)
1020 printf("cr0_shadow[%d]\t\t0x%016lx\n", vcpu, cr0shadow);
1021 }
1022
1023 if (!error && (get_cr4_mask || get_all)) {
1024 uint64_t cr4mask;
1025 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_MASK, &cr4mask);
1026 if (error == 0)
1027 printf("cr4_mask[%d]\t\t0x%016lx\n", vcpu, cr4mask);
1028 }
1029
1030 if (!error && (get_cr4_shadow || get_all)) {
1031 uint64_t cr4shadow;
1032 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_SHADOW,
1033 &cr4shadow);
1034 if (error == 0)
1035 printf("cr4_shadow[%d]\t\t0x%016lx\n", vcpu, cr4shadow);
1036 }
1037
1038 if (!error && (get_cr3_targets || get_all)) {
1039 uint64_t target_count, target_addr;
1040 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET_COUNT,
1041 &target_count);
1042 if (error == 0) {
1043 printf("cr3_target_count[%d]\t0x%016lx\n",
1044 vcpu, target_count);
1045 }
1046
1047 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET0,
1048 &target_addr);
1049 if (error == 0) {
1050 printf("cr3_target0[%d]\t\t0x%016lx\n",
1051 vcpu, target_addr);
1052 }
1053
1054 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET1,
1055 &target_addr);
1056 if (error == 0) {
1057 printf("cr3_target1[%d]\t\t0x%016lx\n",
1058 vcpu, target_addr);
1059 }
1060
1061 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET2,
1062 &target_addr);
1063 if (error == 0) {
1064 printf("cr3_target2[%d]\t\t0x%016lx\n",
1065 vcpu, target_addr);
1066 }
1067
1068 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET3,
1069 &target_addr);
1070 if (error == 0) {
1071 printf("cr3_target3[%d]\t\t0x%016lx\n",
1072 vcpu, target_addr);
1073 }
1074 }
1075
1076 if (!error && (get_pinbased_ctls || get_all)) {
1077 error = vm_get_vmcs_field(ctx, vcpu, VMCS_PIN_BASED_CTLS, &ctl);
1078 if (error == 0)
1079 printf("pinbased_ctls[%d]\t0x%016lx\n", vcpu, ctl);
1080 }
1081
1082 if (!error && (get_procbased_ctls || get_all)) {
1083 error = vm_get_vmcs_field(ctx, vcpu,
1084 VMCS_PRI_PROC_BASED_CTLS, &ctl);
1085 if (error == 0)
1086 printf("procbased_ctls[%d]\t0x%016lx\n", vcpu, ctl);
1087 }
1088
1089 if (!error && (get_procbased_ctls2 || get_all)) {
1090 error = vm_get_vmcs_field(ctx, vcpu,
1091 VMCS_SEC_PROC_BASED_CTLS, &ctl);
1092 if (error == 0)
1093 printf("procbased_ctls2[%d]\t0x%016lx\n", vcpu, ctl);
1094 }
1095
1096 if (!error && (get_vmcs_gla || get_all)) {
1097 error = vm_get_vmcs_field(ctx, vcpu,
1098 VMCS_GUEST_LINEAR_ADDRESS, &u64);
1099 if (error == 0)
1100 printf("gla[%d]\t\t0x%016lx\n", vcpu, u64);
1101 }
1102
1103 if (!error && (get_vmcs_gpa || get_all)) {
1104 error = vm_get_vmcs_field(ctx, vcpu,
1105 VMCS_GUEST_PHYSICAL_ADDRESS, &u64);
1106 if (error == 0)
1107 printf("gpa[%d]\t\t0x%016lx\n", vcpu, u64);
1108 }
1109
1110 if (!error && (get_vmcs_entry_interruption_info ||
1111 get_all)) {
1112 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO,&u64);
1113 if (error == 0) {
1114 printf("entry_interruption_info[%d]\t0x%016lx\n",
1115 vcpu, u64);
1116 }
1117 }
1118
1119 if (!error && (get_tpr_threshold || get_all)) {
1120 uint64_t threshold;
1121 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TPR_THRESHOLD,
1122 &threshold);
1123 if (error == 0)
1124 printf("tpr_threshold[%d]\t0x%016lx\n", vcpu, threshold);
1125 }
1126
1127 if (!error && (get_inst_err || get_all)) {
1128 uint64_t insterr;
1129 error = vm_get_vmcs_field(ctx, vcpu, VMCS_INSTRUCTION_ERROR,
1130 &insterr);
1131 if (error == 0) {
1132 printf("instruction_error[%d]\t0x%016lx\n",
1133 vcpu, insterr);
1134 }
1135 }
1136
1137 if (!error && (get_exit_ctls || get_all)) {
1138 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_CTLS, &ctl);
1139 if (error == 0)
1140 printf("exit_ctls[%d]\t\t0x%016lx\n", vcpu, ctl);
1141 }
1142
1143 if (!error && (get_entry_ctls || get_all)) {
1144 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_CTLS, &ctl);
1145 if (error == 0)
1146 printf("entry_ctls[%d]\t\t0x%016lx\n", vcpu, ctl);
1147 }
1148
1149 if (!error && (get_host_pat || get_all)) {
1150 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_IA32_PAT, &pat);
1151 if (error == 0)
1152 printf("host_pat[%d]\t\t0x%016lx\n", vcpu, pat);
1153 }
1154
1155 if (!error && (get_host_cr0 || get_all)) {
1156 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR0, &cr0);
1157 if (error == 0)
1158 printf("host_cr0[%d]\t\t0x%016lx\n", vcpu, cr0);
1159 }
1160
1161 if (!error && (get_host_cr3 || get_all)) {
1162 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR3, &cr3);
1163 if (error == 0)
1164 printf("host_cr3[%d]\t\t0x%016lx\n", vcpu, cr3);
1165 }
1166
1167 if (!error && (get_host_cr4 || get_all)) {
1168 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR4, &cr4);
1169 if (error == 0)
1170 printf("host_cr4[%d]\t\t0x%016lx\n", vcpu, cr4);
1171 }
1172
1173 if (!error && (get_host_rip || get_all)) {
1174 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RIP, &rip);
1175 if (error == 0)
1176 printf("host_rip[%d]\t\t0x%016lx\n", vcpu, rip);
1177 }
1178
1179 if (!error && (get_host_rsp || get_all)) {
1180 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RSP, &rsp);
1181 if (error == 0)
1182 printf("host_rsp[%d]\t\t0x%016lx\n", vcpu, rsp);
1183 }
1184
1185 if (!error && (get_vmcs_link || get_all)) {
1186 error = vm_get_vmcs_field(ctx, vcpu, VMCS_LINK_POINTER, &addr);
1187 if (error == 0)
1188 printf("vmcs_pointer[%d]\t0x%016lx\n", vcpu, addr);
1189 }
1190
1191 if (!error && (get_vmcs_exit_interruption_info || get_all)) {
1192 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_INFO, &u64);
1193 if (error == 0) {
1194 printf("vmcs_exit_interruption_info[%d]\t0x%016lx\n",
1195 vcpu, u64);
1196 }
1197 }
1198
1199 if (!error && (get_vmcs_exit_interruption_error || get_all)) {
1200 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_ERRCODE,
1201 &u64);
1202 if (error == 0) {
1203 printf("vmcs_exit_interruption_error[%d]\t0x%016lx\n",
1204 vcpu, u64);
1205 }
1206 }
1207
1208 if (!error && (get_vmcs_interruptibility || get_all)) {
1209 error = vm_get_vmcs_field(ctx, vcpu,
1210 VMCS_GUEST_INTERRUPTIBILITY, &u64);
1211 if (error == 0) {
1212 printf("vmcs_guest_interruptibility[%d]\t0x%016lx\n",
1213 vcpu, u64);
1214 }
1215 }
1216
1217 if (!error && (get_vmcs_exit_inst_length || get_all)) {
1218 error = vm_get_vmcs_field(ctx, vcpu,
1219 VMCS_EXIT_INSTRUCTION_LENGTH, &u64);
1220 if (error == 0)
1221 printf("vmcs_exit_inst_length[%d]\t0x%08x\n", vcpu,
1222 (uint32_t)u64);
1223 }
1224
1225 if (!error && (get_vmcs_exit_qualification || get_all)) {
1226 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_QUALIFICATION,
1227 &u64);
1228 if (error == 0)
1229 printf("vmcs_exit_qualification[%d]\t0x%016lx\n",
1230 vcpu, u64);
1231 }
1232
1233 return (error);
1234 }
1235
1236 static int
get_misc_vmcb(struct vmctx * ctx,int vcpu)1237 get_misc_vmcb(struct vmctx *ctx, int vcpu)
1238 {
1239 uint64_t ctl, addr;
1240 int error = 0;
1241
1242 if (!error && (get_vmcb_intercept || get_all)) {
1243 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_CR_INTERCEPT, 4,
1244 &ctl);
1245 if (error == 0)
1246 printf("cr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl);
1247
1248 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_DR_INTERCEPT, 4,
1249 &ctl);
1250 if (error == 0)
1251 printf("dr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl);
1252
1253 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXC_INTERCEPT, 4,
1254 &ctl);
1255 if (error == 0)
1256 printf("exc_intercept[%d]\t0x%08x\n", vcpu, (int)ctl);
1257
1258 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST1_INTERCEPT,
1259 4, &ctl);
1260 if (error == 0)
1261 printf("inst1_intercept[%d]\t0x%08x\n", vcpu, (int)ctl);
1262
1263 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST2_INTERCEPT,
1264 4, &ctl);
1265 if (error == 0)
1266 printf("inst2_intercept[%d]\t0x%08x\n", vcpu, (int)ctl);
1267 }
1268
1269 if (!error && (get_vmcb_tlb_ctrl || get_all)) {
1270 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_TLB_CTRL,
1271 4, &ctl);
1272 if (error == 0)
1273 printf("TLB ctrl[%d]\t0x%016lx\n", vcpu, ctl);
1274 }
1275
1276 if (!error && (get_vmcb_exit_details || get_all)) {
1277 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO1,
1278 8, &ctl);
1279 if (error == 0)
1280 printf("exitinfo1[%d]\t0x%016lx\n", vcpu, ctl);
1281 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO2,
1282 8, &ctl);
1283 if (error == 0)
1284 printf("exitinfo2[%d]\t0x%016lx\n", vcpu, ctl);
1285 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINTINFO,
1286 8, &ctl);
1287 if (error == 0)
1288 printf("exitintinfo[%d]\t0x%016lx\n", vcpu, ctl);
1289 }
1290
1291 if (!error && (get_vmcb_virq || get_all)) {
1292 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_VIRQ,
1293 8, &ctl);
1294 if (error == 0)
1295 printf("v_irq/tpr[%d]\t0x%016lx\n", vcpu, ctl);
1296 }
1297
1298 if (!error && (get_apic_access_addr || get_all)) {
1299 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_BAR, 8,
1300 &addr);
1301 if (error == 0)
1302 printf("AVIC apic_bar[%d]\t0x%016lx\n", vcpu, addr);
1303 }
1304
1305 if (!error && (get_virtual_apic_addr || get_all)) {
1306 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PAGE, 8,
1307 &addr);
1308 if (error == 0)
1309 printf("AVIC backing page[%d]\t0x%016lx\n", vcpu, addr);
1310 }
1311
1312 if (!error && (get_avic_table || get_all)) {
1313 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_LT, 8,
1314 &addr);
1315 if (error == 0)
1316 printf("AVIC logical table[%d]\t0x%016lx\n",
1317 vcpu, addr);
1318 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PT, 8,
1319 &addr);
1320 if (error == 0)
1321 printf("AVIC physical table[%d]\t0x%016lx\n",
1322 vcpu, addr);
1323 }
1324
1325 return (error);
1326 }
1327
1328 static struct option *
setup_options(bool cpu_intel)1329 setup_options(bool cpu_intel)
1330 {
1331 const struct option common_opts[] = {
1332 { "vm", REQ_ARG, 0, VMNAME },
1333 { "cpu", REQ_ARG, 0, VCPU },
1334 { "set-mem", REQ_ARG, 0, SET_MEM },
1335 { "set-efer", REQ_ARG, 0, SET_EFER },
1336 { "set-cr0", REQ_ARG, 0, SET_CR0 },
1337 { "set-cr2", REQ_ARG, 0, SET_CR2 },
1338 { "set-cr3", REQ_ARG, 0, SET_CR3 },
1339 { "set-cr4", REQ_ARG, 0, SET_CR4 },
1340 { "set-dr0", REQ_ARG, 0, SET_DR0 },
1341 { "set-dr1", REQ_ARG, 0, SET_DR1 },
1342 { "set-dr2", REQ_ARG, 0, SET_DR2 },
1343 { "set-dr3", REQ_ARG, 0, SET_DR3 },
1344 { "set-dr6", REQ_ARG, 0, SET_DR6 },
1345 { "set-dr7", REQ_ARG, 0, SET_DR7 },
1346 { "set-rsp", REQ_ARG, 0, SET_RSP },
1347 { "set-rip", REQ_ARG, 0, SET_RIP },
1348 { "set-rax", REQ_ARG, 0, SET_RAX },
1349 { "set-rflags", REQ_ARG, 0, SET_RFLAGS },
1350 { "desc-base", REQ_ARG, 0, DESC_BASE },
1351 { "desc-limit", REQ_ARG, 0, DESC_LIMIT },
1352 { "desc-access",REQ_ARG, 0, DESC_ACCESS },
1353 { "set-cs", REQ_ARG, 0, SET_CS },
1354 { "set-ds", REQ_ARG, 0, SET_DS },
1355 { "set-es", REQ_ARG, 0, SET_ES },
1356 { "set-fs", REQ_ARG, 0, SET_FS },
1357 { "set-gs", REQ_ARG, 0, SET_GS },
1358 { "set-ss", REQ_ARG, 0, SET_SS },
1359 { "set-tr", REQ_ARG, 0, SET_TR },
1360 { "set-ldtr", REQ_ARG, 0, SET_LDTR },
1361 { "set-x2apic-state",REQ_ARG, 0, SET_X2APIC_STATE },
1362 { "set-exception-bitmap",
1363 REQ_ARG, 0, SET_EXCEPTION_BITMAP },
1364 { "capname", REQ_ARG, 0, CAPNAME },
1365 { "unassign-pptdev", REQ_ARG, 0, UNASSIGN_PPTDEV },
1366 { "setcap", REQ_ARG, 0, SET_CAP },
1367 { "get-gpa-pmap", REQ_ARG, 0, GET_GPA_PMAP },
1368 { "assert-lapic-lvt", REQ_ARG, 0, ASSERT_LAPIC_LVT },
1369 { "get-rtc-time", NO_ARG, &get_rtc_time, 1 },
1370 { "set-rtc-time", REQ_ARG, 0, SET_RTC_TIME },
1371 { "rtc-nvram-offset", REQ_ARG, 0, RTC_NVRAM_OFFSET },
1372 { "get-rtc-nvram", NO_ARG, &get_rtc_nvram, 1 },
1373 { "set-rtc-nvram", REQ_ARG, 0, SET_RTC_NVRAM },
1374 { "getcap", NO_ARG, &getcap, 1 },
1375 { "get-stats", NO_ARG, &get_stats, 1 },
1376 { "get-desc-ds",NO_ARG, &get_desc_ds, 1 },
1377 { "set-desc-ds",NO_ARG, &set_desc_ds, 1 },
1378 { "get-desc-es",NO_ARG, &get_desc_es, 1 },
1379 { "set-desc-es",NO_ARG, &set_desc_es, 1 },
1380 { "get-desc-ss",NO_ARG, &get_desc_ss, 1 },
1381 { "set-desc-ss",NO_ARG, &set_desc_ss, 1 },
1382 { "get-desc-cs",NO_ARG, &get_desc_cs, 1 },
1383 { "set-desc-cs",NO_ARG, &set_desc_cs, 1 },
1384 { "get-desc-fs",NO_ARG, &get_desc_fs, 1 },
1385 { "set-desc-fs",NO_ARG, &set_desc_fs, 1 },
1386 { "get-desc-gs",NO_ARG, &get_desc_gs, 1 },
1387 { "set-desc-gs",NO_ARG, &set_desc_gs, 1 },
1388 { "get-desc-tr",NO_ARG, &get_desc_tr, 1 },
1389 { "set-desc-tr",NO_ARG, &set_desc_tr, 1 },
1390 { "set-desc-ldtr", NO_ARG, &set_desc_ldtr, 1 },
1391 { "get-desc-ldtr", NO_ARG, &get_desc_ldtr, 1 },
1392 { "set-desc-gdtr", NO_ARG, &set_desc_gdtr, 1 },
1393 { "get-desc-gdtr", NO_ARG, &get_desc_gdtr, 1 },
1394 { "set-desc-idtr", NO_ARG, &set_desc_idtr, 1 },
1395 { "get-desc-idtr", NO_ARG, &get_desc_idtr, 1 },
1396 { "get-memmap", NO_ARG, &get_memmap, 1 },
1397 { "get-memseg", NO_ARG, &get_memseg, 1 },
1398 { "get-efer", NO_ARG, &get_efer, 1 },
1399 { "get-cr0", NO_ARG, &get_cr0, 1 },
1400 { "get-cr2", NO_ARG, &get_cr2, 1 },
1401 { "get-cr3", NO_ARG, &get_cr3, 1 },
1402 { "get-cr4", NO_ARG, &get_cr4, 1 },
1403 { "get-dr0", NO_ARG, &get_dr0, 1 },
1404 { "get-dr1", NO_ARG, &get_dr1, 1 },
1405 { "get-dr2", NO_ARG, &get_dr2, 1 },
1406 { "get-dr3", NO_ARG, &get_dr3, 1 },
1407 { "get-dr6", NO_ARG, &get_dr6, 1 },
1408 { "get-dr7", NO_ARG, &get_dr7, 1 },
1409 { "get-rsp", NO_ARG, &get_rsp, 1 },
1410 { "get-rip", NO_ARG, &get_rip, 1 },
1411 { "get-rax", NO_ARG, &get_rax, 1 },
1412 { "get-rbx", NO_ARG, &get_rbx, 1 },
1413 { "get-rcx", NO_ARG, &get_rcx, 1 },
1414 { "get-rdx", NO_ARG, &get_rdx, 1 },
1415 { "get-rsi", NO_ARG, &get_rsi, 1 },
1416 { "get-rdi", NO_ARG, &get_rdi, 1 },
1417 { "get-rbp", NO_ARG, &get_rbp, 1 },
1418 { "get-r8", NO_ARG, &get_r8, 1 },
1419 { "get-r9", NO_ARG, &get_r9, 1 },
1420 { "get-r10", NO_ARG, &get_r10, 1 },
1421 { "get-r11", NO_ARG, &get_r11, 1 },
1422 { "get-r12", NO_ARG, &get_r12, 1 },
1423 { "get-r13", NO_ARG, &get_r13, 1 },
1424 { "get-r14", NO_ARG, &get_r14, 1 },
1425 { "get-r15", NO_ARG, &get_r15, 1 },
1426 { "get-rflags", NO_ARG, &get_rflags, 1 },
1427 { "get-cs", NO_ARG, &get_cs, 1 },
1428 { "get-ds", NO_ARG, &get_ds, 1 },
1429 { "get-es", NO_ARG, &get_es, 1 },
1430 { "get-fs", NO_ARG, &get_fs, 1 },
1431 { "get-gs", NO_ARG, &get_gs, 1 },
1432 { "get-ss", NO_ARG, &get_ss, 1 },
1433 { "get-tr", NO_ARG, &get_tr, 1 },
1434 { "get-ldtr", NO_ARG, &get_ldtr, 1 },
1435 { "get-eptp", NO_ARG, &get_eptp, 1 },
1436 { "get-exception-bitmap",
1437 NO_ARG, &get_exception_bitmap, 1 },
1438 { "get-io-bitmap-address",
1439 NO_ARG, &get_io_bitmap, 1 },
1440 { "get-tsc-offset", NO_ARG, &get_tsc_offset, 1 },
1441 { "get-msr-bitmap",
1442 NO_ARG, &get_msr_bitmap, 1 },
1443 { "get-msr-bitmap-address",
1444 NO_ARG, &get_msr_bitmap_address, 1 },
1445 { "get-guest-pat", NO_ARG, &get_guest_pat, 1 },
1446 { "get-guest-sysenter",
1447 NO_ARG, &get_guest_sysenter, 1 },
1448 { "get-exit-reason",
1449 NO_ARG, &get_exit_reason, 1 },
1450 { "get-x2apic-state", NO_ARG, &get_x2apic_state, 1 },
1451 { "get-all", NO_ARG, &get_all, 1 },
1452 { "run", NO_ARG, &run, 1 },
1453 { "create", NO_ARG, &create, 1 },
1454 { "destroy", NO_ARG, &destroy, 1 },
1455 { "inject-nmi", NO_ARG, &inject_nmi, 1 },
1456 { "force-reset", NO_ARG, &force_reset, 1 },
1457 { "force-poweroff", NO_ARG, &force_poweroff, 1 },
1458 { "get-active-cpus", NO_ARG, &get_active_cpus, 1 },
1459 { "get-suspended-cpus", NO_ARG, &get_suspended_cpus, 1 },
1460 { "get-intinfo", NO_ARG, &get_intinfo, 1 },
1461 { "get-cpu-topology", NO_ARG, &get_cpu_topology, 1 },
1462 };
1463
1464 const struct option intel_opts[] = {
1465 { "get-vmcs-pinbased-ctls",
1466 NO_ARG, &get_pinbased_ctls, 1 },
1467 { "get-vmcs-procbased-ctls",
1468 NO_ARG, &get_procbased_ctls, 1 },
1469 { "get-vmcs-procbased-ctls2",
1470 NO_ARG, &get_procbased_ctls2, 1 },
1471 { "get-vmcs-guest-linear-address",
1472 NO_ARG, &get_vmcs_gla, 1 },
1473 { "get-vmcs-guest-physical-address",
1474 NO_ARG, &get_vmcs_gpa, 1 },
1475 { "get-vmcs-entry-interruption-info",
1476 NO_ARG, &get_vmcs_entry_interruption_info, 1},
1477 { "get-vmcs-cr0-mask", NO_ARG, &get_cr0_mask, 1 },
1478 { "get-vmcs-cr0-shadow", NO_ARG,&get_cr0_shadow, 1 },
1479 { "get-vmcs-cr4-mask", NO_ARG, &get_cr4_mask, 1 },
1480 { "get-vmcs-cr4-shadow", NO_ARG, &get_cr4_shadow, 1 },
1481 { "get-vmcs-cr3-targets", NO_ARG, &get_cr3_targets, 1 },
1482 { "get-vmcs-tpr-threshold",
1483 NO_ARG, &get_tpr_threshold, 1 },
1484 { "get-vmcs-vpid", NO_ARG, &get_vpid_asid, 1 },
1485 { "get-vmcs-exit-ctls", NO_ARG, &get_exit_ctls, 1 },
1486 { "get-vmcs-entry-ctls",
1487 NO_ARG, &get_entry_ctls, 1 },
1488 { "get-vmcs-instruction-error",
1489 NO_ARG, &get_inst_err, 1 },
1490 { "get-vmcs-host-pat", NO_ARG, &get_host_pat, 1 },
1491 { "get-vmcs-host-cr0",
1492 NO_ARG, &get_host_cr0, 1 },
1493 { "set-vmcs-entry-interruption-info",
1494 REQ_ARG, 0, SET_VMCS_ENTRY_INTERRUPTION_INFO },
1495 { "get-vmcs-exit-qualification",
1496 NO_ARG, &get_vmcs_exit_qualification, 1 },
1497 { "get-vmcs-exit-inst-length",
1498 NO_ARG, &get_vmcs_exit_inst_length, 1 },
1499 { "get-vmcs-interruptibility",
1500 NO_ARG, &get_vmcs_interruptibility, 1 },
1501 { "get-vmcs-exit-interruption-error",
1502 NO_ARG, &get_vmcs_exit_interruption_error, 1 },
1503 { "get-vmcs-exit-interruption-info",
1504 NO_ARG, &get_vmcs_exit_interruption_info, 1 },
1505 { "get-vmcs-link", NO_ARG, &get_vmcs_link, 1 },
1506 { "get-vmcs-host-cr3",
1507 NO_ARG, &get_host_cr3, 1 },
1508 { "get-vmcs-host-cr4",
1509 NO_ARG, &get_host_cr4, 1 },
1510 { "get-vmcs-host-rip",
1511 NO_ARG, &get_host_rip, 1 },
1512 { "get-vmcs-host-rsp",
1513 NO_ARG, &get_host_rsp, 1 },
1514 { "get-apic-access-address",
1515 NO_ARG, &get_apic_access_addr, 1},
1516 { "get-virtual-apic-address",
1517 NO_ARG, &get_virtual_apic_addr, 1}
1518 };
1519
1520 const struct option amd_opts[] = {
1521 { "get-vmcb-intercepts",
1522 NO_ARG, &get_vmcb_intercept, 1 },
1523 { "get-vmcb-asid",
1524 NO_ARG, &get_vpid_asid, 1 },
1525 { "get-vmcb-exit-details",
1526 NO_ARG, &get_vmcb_exit_details, 1 },
1527 { "get-vmcb-tlb-ctrl",
1528 NO_ARG, &get_vmcb_tlb_ctrl, 1 },
1529 { "get-vmcb-virq",
1530 NO_ARG, &get_vmcb_virq, 1 },
1531 { "get-avic-apic-bar",
1532 NO_ARG, &get_apic_access_addr, 1 },
1533 { "get-avic-backing-page",
1534 NO_ARG, &get_virtual_apic_addr, 1 },
1535 { "get-avic-table",
1536 NO_ARG, &get_avic_table, 1 }
1537 };
1538
1539 const struct option null_opt = {
1540 NULL, 0, NULL, 0
1541 };
1542
1543 struct option *all_opts;
1544 char *cp;
1545 int optlen;
1546
1547 optlen = sizeof(common_opts);
1548
1549 if (cpu_intel)
1550 optlen += sizeof(intel_opts);
1551 else
1552 optlen += sizeof(amd_opts);
1553
1554 optlen += sizeof(null_opt);
1555
1556 all_opts = malloc(optlen);
1557
1558 cp = (char *)all_opts;
1559 memcpy(cp, common_opts, sizeof(common_opts));
1560 cp += sizeof(common_opts);
1561
1562 if (cpu_intel) {
1563 memcpy(cp, intel_opts, sizeof(intel_opts));
1564 cp += sizeof(intel_opts);
1565 } else {
1566 memcpy(cp, amd_opts, sizeof(amd_opts));
1567 cp += sizeof(amd_opts);
1568 }
1569
1570 memcpy(cp, &null_opt, sizeof(null_opt));
1571 cp += sizeof(null_opt);
1572
1573 return (all_opts);
1574 }
1575
1576 static const char *
wday_str(int idx)1577 wday_str(int idx)
1578 {
1579 static const char *weekdays[] = {
1580 "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat"
1581 };
1582
1583 if (idx >= 0 && idx < 7)
1584 return (weekdays[idx]);
1585 else
1586 return ("UNK");
1587 }
1588
1589 static const char *
mon_str(int idx)1590 mon_str(int idx)
1591 {
1592 static const char *months[] = {
1593 "Jan", "Feb", "Mar", "Apr", "May", "Jun",
1594 "Jul", "Aug", "Sep", "Oct", "Nov", "Dec"
1595 };
1596
1597 if (idx >= 0 && idx < 12)
1598 return (months[idx]);
1599 else
1600 return ("UNK");
1601 }
1602
1603 static int
show_memmap(struct vmctx * ctx)1604 show_memmap(struct vmctx *ctx)
1605 {
1606 char name[SPECNAMELEN + 1], numbuf[8];
1607 vm_ooffset_t segoff;
1608 vm_paddr_t gpa;
1609 size_t maplen, seglen;
1610 int error, flags, prot, segid, delim;
1611
1612 printf("Address Length Segment Offset ");
1613 printf("Prot Flags\n");
1614
1615 gpa = 0;
1616 while (1) {
1617 error = vm_mmap_getnext(ctx, &gpa, &segid, &segoff, &maplen,
1618 &prot, &flags);
1619 if (error)
1620 return (errno == ENOENT ? 0 : error);
1621
1622 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name));
1623 if (error)
1624 return (error);
1625
1626 printf("%-12lX", gpa);
1627 humanize_number(numbuf, sizeof(numbuf), maplen, "B",
1628 HN_AUTOSCALE, HN_NOSPACE);
1629 printf("%-12s", numbuf);
1630
1631 printf("%-12s", name[0] ? name : "sysmem");
1632 printf("%-12lX", segoff);
1633 printf("%c%c%c ", prot & PROT_READ ? 'R' : '-',
1634 prot & PROT_WRITE ? 'W' : '-',
1635 prot & PROT_EXEC ? 'X' : '-');
1636
1637 delim = '\0';
1638 if (flags & VM_MEMMAP_F_WIRED) {
1639 printf("%cwired", delim);
1640 delim = '/';
1641 }
1642 if (flags & VM_MEMMAP_F_IOMMU) {
1643 printf("%ciommu", delim);
1644 delim = '/';
1645 }
1646 printf("\n");
1647
1648 gpa += maplen;
1649 }
1650 }
1651
1652 static int
show_memseg(struct vmctx * ctx)1653 show_memseg(struct vmctx *ctx)
1654 {
1655 char name[SPECNAMELEN + 1], numbuf[8];
1656 size_t seglen;
1657 int error, segid;
1658
1659 printf("ID Length Name\n");
1660
1661 segid = 0;
1662 while (1) {
1663 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name));
1664 if (error)
1665 return (errno == EINVAL ? 0 : error);
1666
1667 if (seglen) {
1668 printf("%-4d", segid);
1669 humanize_number(numbuf, sizeof(numbuf), seglen, "B",
1670 HN_AUTOSCALE, HN_NOSPACE);
1671 printf("%-12s", numbuf);
1672 printf("%s", name[0] ? name : "sysmem");
1673 printf("\n");
1674 }
1675 segid++;
1676 }
1677 }
1678
1679 int
main(int argc,char * argv[])1680 main(int argc, char *argv[])
1681 {
1682 char *vmname;
1683 int error, ch, vcpu, ptenum;
1684 vm_paddr_t gpa_pmap;
1685 struct vm_exit vmexit;
1686 uint64_t rax, cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7;
1687 uint64_t rsp, rip, rflags, efer, pat;
1688 uint64_t eptp, bm, addr, u64, pteval[4], *pte, info[2];
1689 struct vmctx *ctx;
1690 cpuset_t cpus;
1691 bool cpu_intel;
1692 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr;
1693 struct tm tm;
1694 struct option *opts;
1695
1696 cpu_intel = cpu_vendor_intel();
1697 opts = setup_options(cpu_intel);
1698
1699 vcpu = 0;
1700 vmname = NULL;
1701 assert_lapic_lvt = -1;
1702 progname = basename(argv[0]);
1703
1704 while ((ch = getopt_long(argc, argv, "", opts, NULL)) != -1) {
1705 switch (ch) {
1706 case 0:
1707 break;
1708 case VMNAME:
1709 vmname = optarg;
1710 break;
1711 case VCPU:
1712 vcpu = atoi(optarg);
1713 break;
1714 case SET_MEM:
1715 memsize = atoi(optarg) * MB;
1716 memsize = roundup(memsize, 2 * MB);
1717 break;
1718 case SET_EFER:
1719 efer = strtoul(optarg, NULL, 0);
1720 set_efer = 1;
1721 break;
1722 case SET_CR0:
1723 cr0 = strtoul(optarg, NULL, 0);
1724 set_cr0 = 1;
1725 break;
1726 case SET_CR2:
1727 cr2 = strtoul(optarg, NULL, 0);
1728 set_cr2 = 1;
1729 break;
1730 case SET_CR3:
1731 cr3 = strtoul(optarg, NULL, 0);
1732 set_cr3 = 1;
1733 break;
1734 case SET_CR4:
1735 cr4 = strtoul(optarg, NULL, 0);
1736 set_cr4 = 1;
1737 break;
1738 case SET_DR0:
1739 dr0 = strtoul(optarg, NULL, 0);
1740 set_dr0 = 1;
1741 break;
1742 case SET_DR1:
1743 dr1 = strtoul(optarg, NULL, 0);
1744 set_dr1 = 1;
1745 break;
1746 case SET_DR2:
1747 dr2 = strtoul(optarg, NULL, 0);
1748 set_dr2 = 1;
1749 break;
1750 case SET_DR3:
1751 dr3 = strtoul(optarg, NULL, 0);
1752 set_dr3 = 1;
1753 break;
1754 case SET_DR6:
1755 dr6 = strtoul(optarg, NULL, 0);
1756 set_dr6 = 1;
1757 break;
1758 case SET_DR7:
1759 dr7 = strtoul(optarg, NULL, 0);
1760 set_dr7 = 1;
1761 break;
1762 case SET_RSP:
1763 rsp = strtoul(optarg, NULL, 0);
1764 set_rsp = 1;
1765 break;
1766 case SET_RIP:
1767 rip = strtoul(optarg, NULL, 0);
1768 set_rip = 1;
1769 break;
1770 case SET_RAX:
1771 rax = strtoul(optarg, NULL, 0);
1772 set_rax = 1;
1773 break;
1774 case SET_RFLAGS:
1775 rflags = strtoul(optarg, NULL, 0);
1776 set_rflags = 1;
1777 break;
1778 case DESC_BASE:
1779 desc_base = strtoul(optarg, NULL, 0);
1780 break;
1781 case DESC_LIMIT:
1782 desc_limit = strtoul(optarg, NULL, 0);
1783 break;
1784 case DESC_ACCESS:
1785 desc_access = strtoul(optarg, NULL, 0);
1786 break;
1787 case SET_CS:
1788 cs = strtoul(optarg, NULL, 0);
1789 set_cs = 1;
1790 break;
1791 case SET_DS:
1792 ds = strtoul(optarg, NULL, 0);
1793 set_ds = 1;
1794 break;
1795 case SET_ES:
1796 es = strtoul(optarg, NULL, 0);
1797 set_es = 1;
1798 break;
1799 case SET_FS:
1800 fs = strtoul(optarg, NULL, 0);
1801 set_fs = 1;
1802 break;
1803 case SET_GS:
1804 gs = strtoul(optarg, NULL, 0);
1805 set_gs = 1;
1806 break;
1807 case SET_SS:
1808 ss = strtoul(optarg, NULL, 0);
1809 set_ss = 1;
1810 break;
1811 case SET_TR:
1812 tr = strtoul(optarg, NULL, 0);
1813 set_tr = 1;
1814 break;
1815 case SET_LDTR:
1816 ldtr = strtoul(optarg, NULL, 0);
1817 set_ldtr = 1;
1818 break;
1819 case SET_X2APIC_STATE:
1820 x2apic_state = strtol(optarg, NULL, 0);
1821 set_x2apic_state = 1;
1822 break;
1823 case SET_EXCEPTION_BITMAP:
1824 exception_bitmap = strtoul(optarg, NULL, 0);
1825 set_exception_bitmap = 1;
1826 break;
1827 case SET_VMCS_ENTRY_INTERRUPTION_INFO:
1828 vmcs_entry_interruption_info = strtoul(optarg, NULL, 0);
1829 set_vmcs_entry_interruption_info = 1;
1830 break;
1831 case SET_CAP:
1832 capval = strtoul(optarg, NULL, 0);
1833 setcap = 1;
1834 break;
1835 case SET_RTC_TIME:
1836 rtc_secs = strtoul(optarg, NULL, 0);
1837 set_rtc_time = 1;
1838 break;
1839 case SET_RTC_NVRAM:
1840 rtc_nvram_value = (uint8_t)strtoul(optarg, NULL, 0);
1841 set_rtc_nvram = 1;
1842 break;
1843 case RTC_NVRAM_OFFSET:
1844 rtc_nvram_offset = strtoul(optarg, NULL, 0);
1845 break;
1846 case GET_GPA_PMAP:
1847 gpa_pmap = strtoul(optarg, NULL, 0);
1848 get_gpa_pmap = 1;
1849 break;
1850 case CAPNAME:
1851 capname = optarg;
1852 break;
1853 case UNASSIGN_PPTDEV:
1854 unassign_pptdev = 1;
1855 if (sscanf(optarg, "%d/%d/%d", &bus, &slot, &func) != 3)
1856 usage(cpu_intel);
1857 break;
1858 case ASSERT_LAPIC_LVT:
1859 assert_lapic_lvt = atoi(optarg);
1860 break;
1861 default:
1862 usage(cpu_intel);
1863 }
1864 }
1865 argc -= optind;
1866 argv += optind;
1867
1868 if (vmname == NULL)
1869 usage(cpu_intel);
1870
1871 error = 0;
1872
1873 if (!error && create)
1874 error = vm_create(vmname);
1875
1876 if (!error) {
1877 ctx = vm_open(vmname);
1878 if (ctx == NULL) {
1879 printf("VM:%s is not created.\n", vmname);
1880 exit (1);
1881 }
1882 }
1883
1884 if (!error && memsize)
1885 error = vm_setup_memory(ctx, memsize, VM_MMAP_ALL);
1886
1887 if (!error && set_efer)
1888 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_EFER, efer);
1889
1890 if (!error && set_cr0)
1891 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR0, cr0);
1892
1893 if (!error && set_cr2)
1894 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR2, cr2);
1895
1896 if (!error && set_cr3)
1897 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR3, cr3);
1898
1899 if (!error && set_cr4)
1900 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR4, cr4);
1901
1902 if (!error && set_dr0)
1903 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR0, dr0);
1904
1905 if (!error && set_dr1)
1906 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR1, dr1);
1907
1908 if (!error && set_dr2)
1909 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR2, dr2);
1910
1911 if (!error && set_dr3)
1912 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR3, dr3);
1913
1914 if (!error && set_dr6)
1915 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR6, dr6);
1916
1917 if (!error && set_dr7)
1918 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR7, dr7);
1919
1920 if (!error && set_rsp)
1921 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RSP, rsp);
1922
1923 if (!error && set_rip)
1924 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RIP, rip);
1925
1926 if (!error && set_rax)
1927 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RAX, rax);
1928
1929 if (!error && set_rflags) {
1930 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RFLAGS,
1931 rflags);
1932 }
1933
1934 if (!error && set_desc_ds) {
1935 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_DS,
1936 desc_base, desc_limit, desc_access);
1937 }
1938
1939 if (!error && set_desc_es) {
1940 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_ES,
1941 desc_base, desc_limit, desc_access);
1942 }
1943
1944 if (!error && set_desc_ss) {
1945 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_SS,
1946 desc_base, desc_limit, desc_access);
1947 }
1948
1949 if (!error && set_desc_cs) {
1950 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_CS,
1951 desc_base, desc_limit, desc_access);
1952 }
1953
1954 if (!error && set_desc_fs) {
1955 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_FS,
1956 desc_base, desc_limit, desc_access);
1957 }
1958
1959 if (!error && set_desc_gs) {
1960 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GS,
1961 desc_base, desc_limit, desc_access);
1962 }
1963
1964 if (!error && set_desc_tr) {
1965 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_TR,
1966 desc_base, desc_limit, desc_access);
1967 }
1968
1969 if (!error && set_desc_ldtr) {
1970 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_LDTR,
1971 desc_base, desc_limit, desc_access);
1972 }
1973
1974 if (!error && set_desc_gdtr) {
1975 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GDTR,
1976 desc_base, desc_limit, 0);
1977 }
1978
1979 if (!error && set_desc_idtr) {
1980 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_IDTR,
1981 desc_base, desc_limit, 0);
1982 }
1983
1984 if (!error && set_cs)
1985 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CS, cs);
1986
1987 if (!error && set_ds)
1988 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DS, ds);
1989
1990 if (!error && set_es)
1991 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_ES, es);
1992
1993 if (!error && set_fs)
1994 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_FS, fs);
1995
1996 if (!error && set_gs)
1997 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_GS, gs);
1998
1999 if (!error && set_ss)
2000 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_SS, ss);
2001
2002 if (!error && set_tr)
2003 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_TR, tr);
2004
2005 if (!error && set_ldtr)
2006 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_LDTR, ldtr);
2007
2008 if (!error && set_x2apic_state)
2009 error = vm_set_x2apic_state(ctx, vcpu, x2apic_state);
2010
2011 if (!error && unassign_pptdev)
2012 error = vm_unassign_pptdev(ctx, bus, slot, func);
2013
2014 if (!error && set_exception_bitmap) {
2015 if (cpu_intel)
2016 error = vm_set_vmcs_field(ctx, vcpu,
2017 VMCS_EXCEPTION_BITMAP,
2018 exception_bitmap);
2019 else
2020 error = vm_set_vmcb_field(ctx, vcpu,
2021 VMCB_OFF_EXC_INTERCEPT,
2022 4, exception_bitmap);
2023 }
2024
2025 if (!error && cpu_intel && set_vmcs_entry_interruption_info) {
2026 error = vm_set_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO,
2027 vmcs_entry_interruption_info);
2028 }
2029
2030 if (!error && inject_nmi) {
2031 error = vm_inject_nmi(ctx, vcpu);
2032 }
2033
2034 if (!error && assert_lapic_lvt != -1) {
2035 error = vm_lapic_local_irq(ctx, vcpu, assert_lapic_lvt);
2036 }
2037
2038 if (!error && (get_memseg || get_all))
2039 error = show_memseg(ctx);
2040
2041 if (!error && (get_memmap || get_all))
2042 error = show_memmap(ctx);
2043
2044 if (!error)
2045 error = get_all_registers(ctx, vcpu);
2046
2047 if (!error)
2048 error = get_all_segments(ctx, vcpu);
2049
2050 if (!error) {
2051 if (cpu_intel)
2052 error = get_misc_vmcs(ctx, vcpu);
2053 else
2054 error = get_misc_vmcb(ctx, vcpu);
2055 }
2056
2057 if (!error && (get_x2apic_state || get_all)) {
2058 error = vm_get_x2apic_state(ctx, vcpu, &x2apic_state);
2059 if (error == 0)
2060 printf("x2apic_state[%d]\t%d\n", vcpu, x2apic_state);
2061 }
2062
2063 if (!error && (get_eptp || get_all)) {
2064 if (cpu_intel)
2065 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EPTP, &eptp);
2066 else
2067 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_NPT_BASE,
2068 8, &eptp);
2069 if (error == 0)
2070 printf("%s[%d]\t\t0x%016lx\n",
2071 cpu_intel ? "eptp" : "rvi/npt", vcpu, eptp);
2072 }
2073
2074 if (!error && (get_exception_bitmap || get_all)) {
2075 if(cpu_intel)
2076 error = vm_get_vmcs_field(ctx, vcpu,
2077 VMCS_EXCEPTION_BITMAP, &bm);
2078 else
2079 error = vm_get_vmcb_field(ctx, vcpu,
2080 VMCB_OFF_EXC_INTERCEPT,
2081 4, &bm);
2082 if (error == 0)
2083 printf("exception_bitmap[%d]\t%#lx\n", vcpu, bm);
2084 }
2085
2086 if (!error && (get_io_bitmap || get_all)) {
2087 if (cpu_intel) {
2088 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_A,
2089 &bm);
2090 if (error == 0)
2091 printf("io_bitmap_a[%d]\t%#lx\n", vcpu, bm);
2092 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_B,
2093 &bm);
2094 if (error == 0)
2095 printf("io_bitmap_b[%d]\t%#lx\n", vcpu, bm);
2096 } else {
2097 error = vm_get_vmcb_field(ctx, vcpu,
2098 VMCB_OFF_IO_PERM, 8, &bm);
2099 if (error == 0)
2100 printf("io_bitmap[%d]\t%#lx\n", vcpu, bm);
2101 }
2102 }
2103
2104 if (!error && (get_tsc_offset || get_all)) {
2105 uint64_t tscoff;
2106 if (cpu_intel)
2107 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TSC_OFFSET,
2108 &tscoff);
2109 else
2110 error = vm_get_vmcb_field(ctx, vcpu,
2111 VMCB_OFF_TSC_OFFSET,
2112 8, &tscoff);
2113 if (error == 0)
2114 printf("tsc_offset[%d]\t0x%016lx\n", vcpu, tscoff);
2115 }
2116
2117 if (!error && (get_msr_bitmap_address || get_all)) {
2118 if (cpu_intel)
2119 error = vm_get_vmcs_field(ctx, vcpu, VMCS_MSR_BITMAP,
2120 &addr);
2121 else
2122 error = vm_get_vmcb_field(ctx, vcpu,
2123 VMCB_OFF_MSR_PERM, 8, &addr);
2124 if (error == 0)
2125 printf("msr_bitmap[%d]\t\t%#lx\n", vcpu, addr);
2126 }
2127
2128 if (!error && (get_msr_bitmap || get_all)) {
2129 if (cpu_intel) {
2130 error = vm_get_vmcs_field(ctx, vcpu,
2131 VMCS_MSR_BITMAP, &addr);
2132 } else {
2133 error = vm_get_vmcb_field(ctx, vcpu,
2134 VMCB_OFF_MSR_PERM, 8,
2135 &addr);
2136 }
2137
2138 if (error == 0)
2139 error = dump_msr_bitmap(vcpu, addr, cpu_intel);
2140 }
2141
2142 if (!error && (get_vpid_asid || get_all)) {
2143 uint64_t vpid;
2144 if (cpu_intel)
2145 error = vm_get_vmcs_field(ctx, vcpu, VMCS_VPID, &vpid);
2146 else
2147 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_ASID,
2148 4, &vpid);
2149 if (error == 0)
2150 printf("%s[%d]\t\t0x%04lx\n",
2151 cpu_intel ? "vpid" : "asid", vcpu, vpid);
2152 }
2153
2154 if (!error && (get_guest_pat || get_all)) {
2155 if (cpu_intel)
2156 error = vm_get_vmcs_field(ctx, vcpu,
2157 VMCS_GUEST_IA32_PAT, &pat);
2158 else
2159 error = vm_get_vmcb_field(ctx, vcpu,
2160 VMCB_OFF_GUEST_PAT, 8, &pat);
2161 if (error == 0)
2162 printf("guest_pat[%d]\t\t0x%016lx\n", vcpu, pat);
2163 }
2164
2165 if (!error && (get_guest_sysenter || get_all)) {
2166 if (cpu_intel)
2167 error = vm_get_vmcs_field(ctx, vcpu,
2168 VMCS_GUEST_IA32_SYSENTER_CS,
2169 &cs);
2170 else
2171 error = vm_get_vmcb_field(ctx, vcpu,
2172 VMCB_OFF_SYSENTER_CS, 8,
2173 &cs);
2174
2175 if (error == 0)
2176 printf("guest_sysenter_cs[%d]\t%#lx\n", vcpu, cs);
2177 if (cpu_intel)
2178 error = vm_get_vmcs_field(ctx, vcpu,
2179 VMCS_GUEST_IA32_SYSENTER_ESP,
2180 &rsp);
2181 else
2182 error = vm_get_vmcb_field(ctx, vcpu,
2183 VMCB_OFF_SYSENTER_ESP, 8,
2184 &rsp);
2185
2186 if (error == 0)
2187 printf("guest_sysenter_sp[%d]\t%#lx\n", vcpu, rsp);
2188 if (cpu_intel)
2189 error = vm_get_vmcs_field(ctx, vcpu,
2190 VMCS_GUEST_IA32_SYSENTER_EIP,
2191 &rip);
2192 else
2193 error = vm_get_vmcb_field(ctx, vcpu,
2194 VMCB_OFF_SYSENTER_EIP, 8,
2195 &rip);
2196 if (error == 0)
2197 printf("guest_sysenter_ip[%d]\t%#lx\n", vcpu, rip);
2198 }
2199
2200 if (!error && (get_exit_reason || get_all)) {
2201 if (cpu_intel)
2202 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_REASON,
2203 &u64);
2204 else
2205 error = vm_get_vmcb_field(ctx, vcpu,
2206 VMCB_OFF_EXIT_REASON, 8,
2207 &u64);
2208 if (error == 0)
2209 printf("exit_reason[%d]\t%#lx\n", vcpu, u64);
2210 }
2211
2212 if (!error && setcap) {
2213 int captype;
2214 captype = vm_capability_name2type(capname);
2215 error = vm_set_capability(ctx, vcpu, captype, capval);
2216 if (error != 0 && errno == ENOENT)
2217 printf("Capability \"%s\" is not available\n", capname);
2218 }
2219
2220 if (!error && get_gpa_pmap) {
2221 error = vm_get_gpa_pmap(ctx, gpa_pmap, pteval, &ptenum);
2222 if (error == 0) {
2223 printf("gpa %#lx:", gpa_pmap);
2224 pte = &pteval[0];
2225 while (ptenum-- > 0)
2226 printf(" %#lx", *pte++);
2227 printf("\n");
2228 }
2229 }
2230
2231 if (!error && set_rtc_nvram)
2232 error = vm_rtc_write(ctx, rtc_nvram_offset, rtc_nvram_value);
2233
2234 if (!error && (get_rtc_nvram || get_all)) {
2235 error = vm_rtc_read(ctx, rtc_nvram_offset, &rtc_nvram_value);
2236 if (error == 0) {
2237 printf("rtc nvram[%03d]: 0x%02x\n", rtc_nvram_offset,
2238 rtc_nvram_value);
2239 }
2240 }
2241
2242 if (!error && set_rtc_time)
2243 error = vm_rtc_settime(ctx, rtc_secs);
2244
2245 if (!error && (get_rtc_time || get_all)) {
2246 error = vm_rtc_gettime(ctx, &rtc_secs);
2247 if (error == 0) {
2248 gmtime_r(&rtc_secs, &tm);
2249 printf("rtc time %#lx: %s %s %02d %02d:%02d:%02d %d\n",
2250 rtc_secs, wday_str(tm.tm_wday), mon_str(tm.tm_mon),
2251 tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec,
2252 1900 + tm.tm_year);
2253 }
2254 }
2255
2256 if (!error && (getcap || get_all)) {
2257 int captype, val, getcaptype;
2258
2259 if (getcap && capname)
2260 getcaptype = vm_capability_name2type(capname);
2261 else
2262 getcaptype = -1;
2263
2264 for (captype = 0; captype < VM_CAP_MAX; captype++) {
2265 if (getcaptype >= 0 && captype != getcaptype)
2266 continue;
2267 error = vm_get_capability(ctx, vcpu, captype, &val);
2268 if (error == 0) {
2269 printf("Capability \"%s\" is %s on vcpu %d\n",
2270 vm_capability_type2name(captype),
2271 val ? "set" : "not set", vcpu);
2272 } else if (errno == ENOENT) {
2273 error = 0;
2274 printf("Capability \"%s\" is not available\n",
2275 vm_capability_type2name(captype));
2276 } else {
2277 break;
2278 }
2279 }
2280 }
2281
2282 if (!error && (get_active_cpus || get_all)) {
2283 error = vm_active_cpus(ctx, &cpus);
2284 if (!error)
2285 print_cpus("active cpus", &cpus);
2286 }
2287
2288 if (!error && (get_suspended_cpus || get_all)) {
2289 error = vm_suspended_cpus(ctx, &cpus);
2290 if (!error)
2291 print_cpus("suspended cpus", &cpus);
2292 }
2293
2294 if (!error && (get_intinfo || get_all)) {
2295 error = vm_get_intinfo(ctx, vcpu, &info[0], &info[1]);
2296 if (!error) {
2297 print_intinfo("pending", info[0]);
2298 print_intinfo("current", info[1]);
2299 }
2300 }
2301
2302 if (!error && (get_stats || get_all)) {
2303 int i, num_stats;
2304 uint64_t *stats;
2305 struct timeval tv;
2306 const char *desc;
2307
2308 stats = vm_get_stats(ctx, vcpu, &tv, &num_stats);
2309 if (stats != NULL) {
2310 printf("vcpu%d stats:\n", vcpu);
2311 for (i = 0; i < num_stats; i++) {
2312 desc = vm_get_stat_desc(ctx, i);
2313 printf("%-40s\t%ld\n", desc, stats[i]);
2314 }
2315 }
2316 }
2317
2318 if (!error && (get_cpu_topology || get_all)) {
2319 uint16_t sockets, cores, threads, maxcpus;
2320
2321 vm_get_topology(ctx, &sockets, &cores, &threads, &maxcpus);
2322 printf("cpu_topology:\tsockets=%hu, cores=%hu, threads=%hu, "
2323 "maxcpus=%hu\n", sockets, cores, threads, maxcpus);
2324 }
2325
2326 if (!error && run) {
2327 error = vm_run(ctx, vcpu, &vmexit);
2328 if (error == 0)
2329 dump_vm_run_exitcode(&vmexit, vcpu);
2330 else
2331 printf("vm_run error %d\n", error);
2332 }
2333
2334 if (!error && force_reset)
2335 error = vm_suspend(ctx, VM_SUSPEND_RESET);
2336
2337 if (!error && force_poweroff)
2338 error = vm_suspend(ctx, VM_SUSPEND_POWEROFF);
2339
2340 if (error)
2341 printf("errno = %d\n", errno);
2342
2343 if (!error && destroy)
2344 vm_destroy(ctx);
2345
2346 free (opts);
2347 exit(error);
2348 }
2349