1 /*
2 * Copyright (c) 2014 Roger Pau Monné <[email protected]>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29
30 #include <sys/param.h>
31 #include <sys/bus.h>
32 #include <sys/kernel.h>
33 #include <sys/malloc.h>
34 #include <sys/proc.h>
35 #include <sys/smp.h>
36 #include <sys/systm.h>
37
38 #include <vm/vm.h>
39 #include <vm/pmap.h>
40
41 #include <machine/cpufunc.h>
42 #include <machine/cpu.h>
43 #include <machine/intr_machdep.h>
44 #include <machine/md_var.h>
45 #include <machine/smp.h>
46
47 #include <x86/apicreg.h>
48 #include <x86/apicvar.h>
49
50 #include <xen/xen-os.h>
51 #include <xen/features.h>
52 #include <xen/gnttab.h>
53 #include <xen/hypervisor.h>
54 #include <xen/hvm.h>
55 #include <xen/xen_intr.h>
56
57 #include <xen/interface/vcpu.h>
58
59 /*--------------------------------- Macros -----------------------------------*/
60
61 #define XEN_APIC_UNSUPPORTED \
62 panic("%s: not available in Xen PV port.", __func__)
63
64 /*--------------------------- Forward Declarations ---------------------------*/
65 #ifdef SMP
66 static driver_filter_t xen_smp_rendezvous_action;
67 #ifdef __amd64__
68 static driver_filter_t xen_invlop;
69 #else
70 static driver_filter_t xen_invltlb;
71 static driver_filter_t xen_invlpg;
72 static driver_filter_t xen_invlrng;
73 static driver_filter_t xen_invlcache;
74 #endif
75 static driver_filter_t xen_ipi_bitmap_handler;
76 static driver_filter_t xen_cpustop_handler;
77 static driver_filter_t xen_cpususpend_handler;
78 static driver_filter_t xen_ipi_swi_handler;
79 #endif
80
81 /*---------------------------------- Macros ----------------------------------*/
82 #define IPI_TO_IDX(ipi) ((ipi) - APIC_IPI_INTS)
83
84 /*--------------------------------- Xen IPIs ---------------------------------*/
85 #ifdef SMP
86 struct xen_ipi_handler
87 {
88 driver_filter_t *filter;
89 const char *description;
90 };
91
92 static struct xen_ipi_handler xen_ipis[] =
93 {
94 [IPI_TO_IDX(IPI_RENDEZVOUS)] = { xen_smp_rendezvous_action, "r" },
95 #ifdef __amd64__
96 [IPI_TO_IDX(IPI_INVLOP)] = { xen_invlop, "itlb"},
97 #else
98 [IPI_TO_IDX(IPI_INVLTLB)] = { xen_invltlb, "itlb"},
99 [IPI_TO_IDX(IPI_INVLPG)] = { xen_invlpg, "ipg" },
100 [IPI_TO_IDX(IPI_INVLRNG)] = { xen_invlrng, "irg" },
101 [IPI_TO_IDX(IPI_INVLCACHE)] = { xen_invlcache, "ic" },
102 #endif
103 [IPI_TO_IDX(IPI_BITMAP_VECTOR)] = { xen_ipi_bitmap_handler, "b" },
104 [IPI_TO_IDX(IPI_STOP)] = { xen_cpustop_handler, "st" },
105 [IPI_TO_IDX(IPI_SUSPEND)] = { xen_cpususpend_handler, "sp" },
106 [IPI_TO_IDX(IPI_SWI)] = { xen_ipi_swi_handler, "sw" },
107 };
108 #endif
109
110 /*------------------------------- Per-CPU Data -------------------------------*/
111 #ifdef SMP
112 DPCPU_DEFINE(xen_intr_handle_t, ipi_handle[nitems(xen_ipis)]);
113 #endif
114
115 /*------------------------------- Xen PV APIC --------------------------------*/
116
117 static void
xen_pv_lapic_create(u_int apic_id,int boot_cpu)118 xen_pv_lapic_create(u_int apic_id, int boot_cpu)
119 {
120 #ifdef SMP
121 cpu_add(apic_id, boot_cpu);
122 #endif
123 }
124
125 static void
xen_pv_lapic_init(vm_paddr_t addr)126 xen_pv_lapic_init(vm_paddr_t addr)
127 {
128
129 }
130
131 static void
xen_pv_lapic_setup(int boot)132 xen_pv_lapic_setup(int boot)
133 {
134
135 }
136
137 static void
xen_pv_lapic_dump(const char * str)138 xen_pv_lapic_dump(const char *str)
139 {
140
141 printf("cpu%d %s XEN PV LAPIC\n", PCPU_GET(cpuid), str);
142 }
143
144 static void
xen_pv_lapic_disable(void)145 xen_pv_lapic_disable(void)
146 {
147
148 }
149
150 static bool
xen_pv_lapic_is_x2apic(void)151 xen_pv_lapic_is_x2apic(void)
152 {
153
154 return (false);
155 }
156
157 static void
xen_pv_lapic_eoi(void)158 xen_pv_lapic_eoi(void)
159 {
160
161 XEN_APIC_UNSUPPORTED;
162 }
163
164 static int
xen_pv_lapic_id(void)165 xen_pv_lapic_id(void)
166 {
167
168 return (PCPU_GET(apic_id));
169 }
170
171 static int
xen_pv_lapic_intr_pending(u_int vector)172 xen_pv_lapic_intr_pending(u_int vector)
173 {
174
175 XEN_APIC_UNSUPPORTED;
176 return (0);
177 }
178
179 static u_int
xen_pv_apic_cpuid(u_int apic_id)180 xen_pv_apic_cpuid(u_int apic_id)
181 {
182 #ifdef SMP
183 return (apic_cpuids[apic_id]);
184 #else
185 return (0);
186 #endif
187 }
188
189 static u_int
xen_pv_apic_alloc_vector(u_int apic_id,u_int irq)190 xen_pv_apic_alloc_vector(u_int apic_id, u_int irq)
191 {
192
193 XEN_APIC_UNSUPPORTED;
194 return (0);
195 }
196
197 static u_int
xen_pv_apic_alloc_vectors(u_int apic_id,u_int * irqs,u_int count,u_int align)198 xen_pv_apic_alloc_vectors(u_int apic_id, u_int *irqs, u_int count, u_int align)
199 {
200
201 XEN_APIC_UNSUPPORTED;
202 return (0);
203 }
204
205 static void
xen_pv_apic_disable_vector(u_int apic_id,u_int vector)206 xen_pv_apic_disable_vector(u_int apic_id, u_int vector)
207 {
208
209 XEN_APIC_UNSUPPORTED;
210 }
211
212 static void
xen_pv_apic_enable_vector(u_int apic_id,u_int vector)213 xen_pv_apic_enable_vector(u_int apic_id, u_int vector)
214 {
215
216 XEN_APIC_UNSUPPORTED;
217 }
218
219 static void
xen_pv_apic_free_vector(u_int apic_id,u_int vector,u_int irq)220 xen_pv_apic_free_vector(u_int apic_id, u_int vector, u_int irq)
221 {
222
223 XEN_APIC_UNSUPPORTED;
224 }
225
226 static void
xen_pv_lapic_set_logical_id(u_int apic_id,u_int cluster,u_int cluster_id)227 xen_pv_lapic_set_logical_id(u_int apic_id, u_int cluster, u_int cluster_id)
228 {
229
230 XEN_APIC_UNSUPPORTED;
231 }
232
233 static int
xen_pv_lapic_enable_pmc(void)234 xen_pv_lapic_enable_pmc(void)
235 {
236
237 XEN_APIC_UNSUPPORTED;
238 return (0);
239 }
240
241 static void
xen_pv_lapic_disable_pmc(void)242 xen_pv_lapic_disable_pmc(void)
243 {
244
245 XEN_APIC_UNSUPPORTED;
246 }
247
248 static void
xen_pv_lapic_reenable_pmc(void)249 xen_pv_lapic_reenable_pmc(void)
250 {
251
252 XEN_APIC_UNSUPPORTED;
253 }
254
255 static void
xen_pv_lapic_enable_cmc(void)256 xen_pv_lapic_enable_cmc(void)
257 {
258
259 }
260
261 #ifdef SMP
262 static void
xen_pv_lapic_ipi_raw(register_t icrlo,u_int dest)263 xen_pv_lapic_ipi_raw(register_t icrlo, u_int dest)
264 {
265
266 XEN_APIC_UNSUPPORTED;
267 }
268
269 #define PCPU_ID_GET(id, field) (pcpu_find(id)->pc_##field)
270 static void
send_nmi(int dest)271 send_nmi(int dest)
272 {
273 unsigned int cpu;
274
275 /*
276 * NMIs are not routed over event channels, and instead delivered as on
277 * native using the exception vector (#2). Triggering them can be done
278 * using the local APIC, or an hypercall as a shortcut like it's done
279 * below.
280 */
281 switch(dest) {
282 case APIC_IPI_DEST_SELF:
283 HYPERVISOR_vcpu_op(VCPUOP_send_nmi, PCPU_GET(vcpu_id), NULL);
284 break;
285 case APIC_IPI_DEST_ALL:
286 CPU_FOREACH(cpu)
287 HYPERVISOR_vcpu_op(VCPUOP_send_nmi,
288 PCPU_ID_GET(cpu, vcpu_id), NULL);
289 break;
290 case APIC_IPI_DEST_OTHERS:
291 CPU_FOREACH(cpu)
292 if (cpu != PCPU_GET(cpuid))
293 HYPERVISOR_vcpu_op(VCPUOP_send_nmi,
294 PCPU_ID_GET(cpu, vcpu_id), NULL);
295 break;
296 default:
297 HYPERVISOR_vcpu_op(VCPUOP_send_nmi,
298 PCPU_ID_GET(apic_cpuid(dest), vcpu_id), NULL);
299 break;
300 }
301 }
302 #undef PCPU_ID_GET
303
304 static void
xen_pv_lapic_ipi_vectored(u_int vector,int dest)305 xen_pv_lapic_ipi_vectored(u_int vector, int dest)
306 {
307 xen_intr_handle_t *ipi_handle;
308 int ipi_idx, to_cpu, self;
309
310 if (vector >= IPI_NMI_FIRST) {
311 send_nmi(dest);
312 return;
313 }
314
315 ipi_idx = IPI_TO_IDX(vector);
316 if (ipi_idx >= nitems(xen_ipis))
317 panic("IPI out of range");
318
319 switch(dest) {
320 case APIC_IPI_DEST_SELF:
321 ipi_handle = DPCPU_GET(ipi_handle);
322 xen_intr_signal(ipi_handle[ipi_idx]);
323 break;
324 case APIC_IPI_DEST_ALL:
325 CPU_FOREACH(to_cpu) {
326 ipi_handle = DPCPU_ID_GET(to_cpu, ipi_handle);
327 xen_intr_signal(ipi_handle[ipi_idx]);
328 }
329 break;
330 case APIC_IPI_DEST_OTHERS:
331 self = PCPU_GET(cpuid);
332 CPU_FOREACH(to_cpu) {
333 if (to_cpu != self) {
334 ipi_handle = DPCPU_ID_GET(to_cpu, ipi_handle);
335 xen_intr_signal(ipi_handle[ipi_idx]);
336 }
337 }
338 break;
339 default:
340 to_cpu = apic_cpuid(dest);
341 ipi_handle = DPCPU_ID_GET(to_cpu, ipi_handle);
342 xen_intr_signal(ipi_handle[ipi_idx]);
343 break;
344 }
345 }
346
347 static int
xen_pv_lapic_ipi_wait(int delay)348 xen_pv_lapic_ipi_wait(int delay)
349 {
350
351 XEN_APIC_UNSUPPORTED;
352 return (0);
353 }
354 #endif /* SMP */
355
356 static int
xen_pv_lapic_ipi_alloc(inthand_t * ipifunc)357 xen_pv_lapic_ipi_alloc(inthand_t *ipifunc)
358 {
359
360 XEN_APIC_UNSUPPORTED;
361 return (-1);
362 }
363
364 static void
xen_pv_lapic_ipi_free(int vector)365 xen_pv_lapic_ipi_free(int vector)
366 {
367
368 XEN_APIC_UNSUPPORTED;
369 }
370
371 static int
xen_pv_lapic_set_lvt_mask(u_int apic_id,u_int lvt,u_char masked)372 xen_pv_lapic_set_lvt_mask(u_int apic_id, u_int lvt, u_char masked)
373 {
374
375 XEN_APIC_UNSUPPORTED;
376 return (0);
377 }
378
379 static int
xen_pv_lapic_set_lvt_mode(u_int apic_id,u_int lvt,uint32_t mode)380 xen_pv_lapic_set_lvt_mode(u_int apic_id, u_int lvt, uint32_t mode)
381 {
382
383 XEN_APIC_UNSUPPORTED;
384 return (0);
385 }
386
387 static int
xen_pv_lapic_set_lvt_polarity(u_int apic_id,u_int lvt,enum intr_polarity pol)388 xen_pv_lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol)
389 {
390
391 XEN_APIC_UNSUPPORTED;
392 return (0);
393 }
394
395 static int
xen_pv_lapic_set_lvt_triggermode(u_int apic_id,u_int lvt,enum intr_trigger trigger)396 xen_pv_lapic_set_lvt_triggermode(u_int apic_id, u_int lvt,
397 enum intr_trigger trigger)
398 {
399
400 XEN_APIC_UNSUPPORTED;
401 return (0);
402 }
403
404 /* Xen apic_ops implementation */
405 struct apic_ops xen_apic_ops = {
406 .create = xen_pv_lapic_create,
407 .init = xen_pv_lapic_init,
408 .xapic_mode = xen_pv_lapic_disable,
409 .is_x2apic = xen_pv_lapic_is_x2apic,
410 .setup = xen_pv_lapic_setup,
411 .dump = xen_pv_lapic_dump,
412 .disable = xen_pv_lapic_disable,
413 .eoi = xen_pv_lapic_eoi,
414 .id = xen_pv_lapic_id,
415 .intr_pending = xen_pv_lapic_intr_pending,
416 .set_logical_id = xen_pv_lapic_set_logical_id,
417 .cpuid = xen_pv_apic_cpuid,
418 .alloc_vector = xen_pv_apic_alloc_vector,
419 .alloc_vectors = xen_pv_apic_alloc_vectors,
420 .enable_vector = xen_pv_apic_enable_vector,
421 .disable_vector = xen_pv_apic_disable_vector,
422 .free_vector = xen_pv_apic_free_vector,
423 .enable_pmc = xen_pv_lapic_enable_pmc,
424 .disable_pmc = xen_pv_lapic_disable_pmc,
425 .reenable_pmc = xen_pv_lapic_reenable_pmc,
426 .enable_cmc = xen_pv_lapic_enable_cmc,
427 #ifdef SMP
428 .ipi_raw = xen_pv_lapic_ipi_raw,
429 .ipi_vectored = xen_pv_lapic_ipi_vectored,
430 .ipi_wait = xen_pv_lapic_ipi_wait,
431 #endif
432 .ipi_alloc = xen_pv_lapic_ipi_alloc,
433 .ipi_free = xen_pv_lapic_ipi_free,
434 .set_lvt_mask = xen_pv_lapic_set_lvt_mask,
435 .set_lvt_mode = xen_pv_lapic_set_lvt_mode,
436 .set_lvt_polarity = xen_pv_lapic_set_lvt_polarity,
437 .set_lvt_triggermode = xen_pv_lapic_set_lvt_triggermode,
438 };
439
440 #ifdef SMP
441 /*---------------------------- XEN PV IPI Handlers ---------------------------*/
442 /*
443 * These are C clones of the ASM functions found in apic_vector.
444 */
445 static int
xen_ipi_bitmap_handler(void * arg)446 xen_ipi_bitmap_handler(void *arg)
447 {
448 struct trapframe *frame;
449
450 frame = arg;
451 ipi_bitmap_handler(*frame);
452 return (FILTER_HANDLED);
453 }
454
455 static int
xen_smp_rendezvous_action(void * arg)456 xen_smp_rendezvous_action(void *arg)
457 {
458 #ifdef COUNT_IPIS
459 (*ipi_rendezvous_counts[PCPU_GET(cpuid)])++;
460 #endif /* COUNT_IPIS */
461
462 smp_rendezvous_action();
463 return (FILTER_HANDLED);
464 }
465
466 #ifdef __amd64__
467 static int
xen_invlop(void * arg)468 xen_invlop(void *arg)
469 {
470
471 invlop_handler();
472 return (FILTER_HANDLED);
473 }
474
475 #else /* __i386__ */
476
477 static int
xen_invltlb(void * arg)478 xen_invltlb(void *arg)
479 {
480
481 invltlb_handler();
482 return (FILTER_HANDLED);
483 }
484
485 static int
xen_invlpg(void * arg)486 xen_invlpg(void *arg)
487 {
488
489 invlpg_handler();
490 return (FILTER_HANDLED);
491 }
492
493 static int
xen_invlrng(void * arg)494 xen_invlrng(void *arg)
495 {
496
497 invlrng_handler();
498 return (FILTER_HANDLED);
499 }
500
501 static int
xen_invlcache(void * arg)502 xen_invlcache(void *arg)
503 {
504
505 invlcache_handler();
506 return (FILTER_HANDLED);
507 }
508 #endif /* __amd64__ */
509
510 static int
xen_cpustop_handler(void * arg)511 xen_cpustop_handler(void *arg)
512 {
513
514 cpustop_handler();
515 return (FILTER_HANDLED);
516 }
517
518 static int
xen_cpususpend_handler(void * arg)519 xen_cpususpend_handler(void *arg)
520 {
521
522 cpususpend_handler();
523 return (FILTER_HANDLED);
524 }
525
526 static int
xen_ipi_swi_handler(void * arg)527 xen_ipi_swi_handler(void *arg)
528 {
529 struct trapframe *frame = arg;
530
531 ipi_swi_handler(*frame);
532 return (FILTER_HANDLED);
533 }
534
535 /*----------------------------- XEN PV IPI setup -----------------------------*/
536 /*
537 * Those functions are provided outside of the Xen PV APIC implementation
538 * so PVHVM guests can also use PV IPIs without having an actual Xen PV APIC,
539 * because on PVHVM there's an emulated LAPIC provided by Xen.
540 */
541 static void
xen_cpu_ipi_init(int cpu)542 xen_cpu_ipi_init(int cpu)
543 {
544 xen_intr_handle_t *ipi_handle;
545 const struct xen_ipi_handler *ipi;
546 int idx, rc;
547
548 ipi_handle = DPCPU_ID_GET(cpu, ipi_handle);
549
550 for (ipi = xen_ipis, idx = 0; idx < nitems(xen_ipis); ipi++, idx++) {
551 if (ipi->filter == NULL) {
552 ipi_handle[idx] = NULL;
553 continue;
554 }
555
556 rc = xen_intr_alloc_and_bind_ipi(cpu, ipi->filter,
557 INTR_TYPE_TTY, &ipi_handle[idx]);
558 if (rc != 0)
559 panic("Unable to allocate a XEN IPI port");
560 xen_intr_describe(ipi_handle[idx], "%s", ipi->description);
561 }
562 }
563
564 static void
xen_setup_cpus(void)565 xen_setup_cpus(void)
566 {
567 int i;
568
569 if (!xen_vector_callback_enabled)
570 return;
571
572 CPU_FOREACH(i)
573 xen_cpu_ipi_init(i);
574
575 /* Set the xen pv ipi ops to replace the native ones */
576 if (xen_hvm_domain())
577 apic_ops.ipi_vectored = xen_pv_lapic_ipi_vectored;
578 }
579
580 /* Switch to using PV IPIs as soon as the vcpu_id is set. */
581 SYSINIT(xen_setup_cpus, SI_SUB_SMP, SI_ORDER_SECOND, xen_setup_cpus, NULL);
582 #endif /* SMP */
583