1 /*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34 #define LINUXKPI_PARAM_PREFIX mlx4_
35
36 #include <linux/module.h>
37 #include <linux/slab.h>
38 #include <linux/errno.h>
39 #include <linux/etherdevice.h>
40 #include <linux/netdevice.h>
41 #include <linux/if_vlan.h>
42 #include <linux/fs.h>
43 #include <linux/rcupdate.h>
44 #include <linux/notifier.h>
45 #include <linux/delay.h>
46
47 #include <net/ipv6.h>
48
49 #include <rdma/ib_smi.h>
50 #include <rdma/ib_user_verbs.h>
51 #include <rdma/ib_addr.h>
52 #include <rdma/ib_cache.h>
53
54 #include <dev/mlx4/driver.h>
55 #include <dev/mlx4/cmd.h>
56 #include <dev/mlx4/qp.h>
57 #include <linux/sched.h>
58 #include <linux/page.h>
59 #include <linux/printk.h>
60 #include "mlx4_ib.h"
61 #include <rdma/mlx4-abi.h>
62 #include "wc.h"
63
64 #define DRV_NAME MLX4_IB_DRV_NAME
65 #ifndef DRV_VERSION
66 #define DRV_VERSION "3.7.1"
67 #endif
68 #define DRV_RELDATE "November 2021"
69
70 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
71 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
72 #define MLX4_IB_CARD_REV_A0 0xA0
73
74 MODULE_AUTHOR("Roland Dreier");
75 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
76 MODULE_LICENSE("Dual BSD/GPL");
77
78 int mlx4_ib_sm_guid_assign = 0;
79 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
80 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
81
82 static const char mlx4_ib_version[] =
83 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
84 DRV_VERSION " (" DRV_RELDATE ")\n";
85
86 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
87
88 static struct workqueue_struct *wq;
89
init_query_mad(struct ib_smp * mad)90 static void init_query_mad(struct ib_smp *mad)
91 {
92 mad->base_version = 1;
93 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
94 mad->class_version = 1;
95 mad->method = IB_MGMT_METHOD_GET;
96 }
97
check_flow_steering_support(struct mlx4_dev * dev)98 static int check_flow_steering_support(struct mlx4_dev *dev)
99 {
100 int eth_num_ports = 0;
101 int ib_num_ports = 0;
102
103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
104
105 if (dmfs) {
106 int i;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
108 eth_num_ports++;
109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
110 ib_num_ports++;
111 dmfs &= (!ib_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
113 (!eth_num_ports ||
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
115 if (ib_num_ports && mlx4_is_mfunc(dev)) {
116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
117 dmfs = 0;
118 }
119 }
120 return dmfs;
121 }
122
num_ib_ports(struct mlx4_dev * dev)123 static int num_ib_ports(struct mlx4_dev *dev)
124 {
125 int ib_ports = 0;
126 int i;
127
128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
129 ib_ports++;
130
131 return ib_ports;
132 }
133
mlx4_ib_get_netdev(struct ib_device * device,u8 port_num)134 static struct ifnet *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num)
135 {
136 struct mlx4_ib_dev *ibdev = to_mdev(device);
137 struct ifnet *dev;
138
139 rcu_read_lock();
140 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
141
142 #if 0
143 if (dev) {
144 if (mlx4_is_bonded(ibdev->dev)) {
145 struct ifnet *upper = NULL;
146
147 upper = netdev_master_upper_dev_get_rcu(dev);
148 if (upper) {
149 struct ifnet *active;
150
151 active = bond_option_active_slave_get_rcu(mlx4_netdev_priv(upper));
152 if (active)
153 dev = active;
154 }
155 }
156 }
157 #endif
158 if (dev)
159 if_ref(dev);
160
161 rcu_read_unlock();
162 return dev;
163 }
164
mlx4_ib_update_gids_v1(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u8 port_num)165 static int mlx4_ib_update_gids_v1(struct gid_entry *gids,
166 struct mlx4_ib_dev *ibdev,
167 u8 port_num)
168 {
169 struct mlx4_cmd_mailbox *mailbox;
170 int err;
171 struct mlx4_dev *dev = ibdev->dev;
172 int i;
173 union ib_gid *gid_tbl;
174
175 mailbox = mlx4_alloc_cmd_mailbox(dev);
176 if (IS_ERR(mailbox))
177 return -ENOMEM;
178
179 gid_tbl = mailbox->buf;
180
181 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
182 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
183
184 err = mlx4_cmd(dev, mailbox->dma,
185 MLX4_SET_PORT_GID_TABLE << 8 | port_num,
186 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
187 MLX4_CMD_WRAPPED);
188 if (mlx4_is_bonded(dev))
189 err += mlx4_cmd(dev, mailbox->dma,
190 MLX4_SET_PORT_GID_TABLE << 8 | 2,
191 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
192 MLX4_CMD_WRAPPED);
193
194 mlx4_free_cmd_mailbox(dev, mailbox);
195 return err;
196 }
197
mlx4_ib_update_gids_v1_v2(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u8 port_num)198 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids,
199 struct mlx4_ib_dev *ibdev,
200 u8 port_num)
201 {
202 struct mlx4_cmd_mailbox *mailbox;
203 int err;
204 struct mlx4_dev *dev = ibdev->dev;
205 int i;
206 struct {
207 union ib_gid gid;
208 __be32 rsrvd1[2];
209 __be16 rsrvd2;
210 u8 type;
211 u8 version;
212 __be32 rsrvd3;
213 } *gid_tbl;
214
215 mailbox = mlx4_alloc_cmd_mailbox(dev);
216 if (IS_ERR(mailbox))
217 return -ENOMEM;
218
219 gid_tbl = mailbox->buf;
220 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
221 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid));
222 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
223 gid_tbl[i].version = 2;
224 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid))
225 gid_tbl[i].type = 1;
226 else
227 memset(&gid_tbl[i].gid, 0, 12);
228 }
229 }
230
231 err = mlx4_cmd(dev, mailbox->dma,
232 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num,
233 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
234 MLX4_CMD_WRAPPED);
235 if (mlx4_is_bonded(dev))
236 err += mlx4_cmd(dev, mailbox->dma,
237 MLX4_SET_PORT_ROCE_ADDR << 8 | 2,
238 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
239 MLX4_CMD_WRAPPED);
240
241 mlx4_free_cmd_mailbox(dev, mailbox);
242 return err;
243 }
244
mlx4_ib_update_gids(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u8 port_num)245 static int mlx4_ib_update_gids(struct gid_entry *gids,
246 struct mlx4_ib_dev *ibdev,
247 u8 port_num)
248 {
249 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
250 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num);
251
252 return mlx4_ib_update_gids_v1(gids, ibdev, port_num);
253 }
254
mlx4_ib_add_gid(struct ib_device * device,u8 port_num,unsigned int index,const union ib_gid * gid,const struct ib_gid_attr * attr,void ** context)255 static int mlx4_ib_add_gid(struct ib_device *device,
256 u8 port_num,
257 unsigned int index,
258 const union ib_gid *gid,
259 const struct ib_gid_attr *attr,
260 void **context)
261 {
262 struct mlx4_ib_dev *ibdev = to_mdev(device);
263 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
264 struct mlx4_port_gid_table *port_gid_table;
265 int free = -1, found = -1;
266 int ret = 0;
267 int hw_update = 0;
268 int i;
269 struct gid_entry *gids = NULL;
270
271 if (!rdma_cap_roce_gid_table(device, port_num))
272 return -EINVAL;
273
274 if (port_num > MLX4_MAX_PORTS)
275 return -EINVAL;
276
277 if (!context)
278 return -EINVAL;
279
280 port_gid_table = &iboe->gids[port_num - 1];
281 spin_lock_bh(&iboe->lock);
282 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
283 if (!memcmp(&port_gid_table->gids[i].gid, gid, sizeof(*gid)) &&
284 (port_gid_table->gids[i].gid_type == attr->gid_type)) {
285 found = i;
286 break;
287 }
288 if (free < 0 && !memcmp(&port_gid_table->gids[i].gid, &zgid, sizeof(*gid)))
289 free = i; /* HW has space */
290 }
291
292 if (found < 0) {
293 if (free < 0) {
294 ret = -ENOSPC;
295 } else {
296 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
297 if (!port_gid_table->gids[free].ctx) {
298 ret = -ENOMEM;
299 } else {
300 *context = port_gid_table->gids[free].ctx;
301 memcpy(&port_gid_table->gids[free].gid, gid, sizeof(*gid));
302 port_gid_table->gids[free].gid_type = attr->gid_type;
303 port_gid_table->gids[free].ctx->real_index = free;
304 port_gid_table->gids[free].ctx->refcount = 1;
305 hw_update = 1;
306 }
307 }
308 } else {
309 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
310 *context = ctx;
311 ctx->refcount++;
312 }
313 if (!ret && hw_update) {
314 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
315 if (!gids) {
316 ret = -ENOMEM;
317 } else {
318 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
319 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
320 gids[i].gid_type = port_gid_table->gids[i].gid_type;
321 }
322 }
323 }
324 spin_unlock_bh(&iboe->lock);
325
326 if (!ret && hw_update) {
327 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
328 kfree(gids);
329 }
330
331 return ret;
332 }
333
mlx4_ib_del_gid(struct ib_device * device,u8 port_num,unsigned int index,void ** context)334 static int mlx4_ib_del_gid(struct ib_device *device,
335 u8 port_num,
336 unsigned int index,
337 void **context)
338 {
339 struct gid_cache_context *ctx = *context;
340 struct mlx4_ib_dev *ibdev = to_mdev(device);
341 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
342 struct mlx4_port_gid_table *port_gid_table;
343 int ret = 0;
344 int hw_update = 0;
345 struct gid_entry *gids = NULL;
346
347 if (!rdma_cap_roce_gid_table(device, port_num))
348 return -EINVAL;
349
350 if (port_num > MLX4_MAX_PORTS)
351 return -EINVAL;
352
353 port_gid_table = &iboe->gids[port_num - 1];
354 spin_lock_bh(&iboe->lock);
355 if (ctx) {
356 ctx->refcount--;
357 if (!ctx->refcount) {
358 unsigned int real_index = ctx->real_index;
359
360 memcpy(&port_gid_table->gids[real_index].gid, &zgid, sizeof(zgid));
361 kfree(port_gid_table->gids[real_index].ctx);
362 port_gid_table->gids[real_index].ctx = NULL;
363 hw_update = 1;
364 }
365 }
366 if (!ret && hw_update) {
367 int i;
368
369 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
370 if (!gids) {
371 ret = -ENOMEM;
372 } else {
373 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
374 memcpy(&gids[i].gid,
375 &port_gid_table->gids[i].gid,
376 sizeof(union ib_gid));
377 gids[i].gid_type =
378 port_gid_table->gids[i].gid_type;
379 }
380 }
381 }
382 spin_unlock_bh(&iboe->lock);
383
384 if (!ret && hw_update) {
385 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
386 kfree(gids);
387 }
388 return ret;
389 }
390
mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev * ibdev,u8 port_num,int index)391 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
392 u8 port_num, int index)
393 {
394 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
395 struct gid_cache_context *ctx = NULL;
396 union ib_gid gid;
397 struct mlx4_port_gid_table *port_gid_table;
398 int real_index = -EINVAL;
399 int i;
400 int ret;
401 unsigned long flags;
402 struct ib_gid_attr attr;
403
404 if (port_num > MLX4_MAX_PORTS)
405 return -EINVAL;
406
407 if (mlx4_is_bonded(ibdev->dev))
408 port_num = 1;
409
410 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
411 return index;
412
413 ret = ib_get_cached_gid(&ibdev->ib_dev, port_num, index, &gid, &attr);
414 if (ret)
415 return ret;
416
417 if (attr.ndev)
418 if_rele(attr.ndev);
419
420 if (!memcmp(&gid, &zgid, sizeof(gid)))
421 return -EINVAL;
422
423 spin_lock_irqsave(&iboe->lock, flags);
424 port_gid_table = &iboe->gids[port_num - 1];
425
426 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
427 if (!memcmp(&port_gid_table->gids[i].gid, &gid, sizeof(gid)) &&
428 attr.gid_type == port_gid_table->gids[i].gid_type) {
429 ctx = port_gid_table->gids[i].ctx;
430 break;
431 }
432 if (ctx)
433 real_index = ctx->real_index;
434 spin_unlock_irqrestore(&iboe->lock, flags);
435 return real_index;
436 }
437
mlx4_ib_query_device(struct ib_device * ibdev,struct ib_device_attr * props,struct ib_udata * uhw)438 static int mlx4_ib_query_device(struct ib_device *ibdev,
439 struct ib_device_attr *props,
440 struct ib_udata *uhw)
441 {
442 struct mlx4_ib_dev *dev = to_mdev(ibdev);
443 struct ib_smp *in_mad = NULL;
444 struct ib_smp *out_mad = NULL;
445 int err = -ENOMEM;
446 int have_ib_ports;
447 struct mlx4_uverbs_ex_query_device cmd;
448 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0};
449 struct mlx4_clock_params clock_params;
450
451 if (uhw->inlen) {
452 if (uhw->inlen < sizeof(cmd))
453 return -EINVAL;
454
455 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
456 if (err)
457 return err;
458
459 if (cmd.comp_mask)
460 return -EINVAL;
461
462 if (cmd.reserved)
463 return -EINVAL;
464 }
465
466 resp.response_length = offsetof(typeof(resp), response_length) +
467 sizeof(resp.response_length);
468 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
469 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
470 if (!in_mad || !out_mad)
471 goto out;
472
473 init_query_mad(in_mad);
474 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
475
476 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
477 1, NULL, NULL, in_mad, out_mad);
478 if (err)
479 goto out;
480
481 memset(props, 0, sizeof *props);
482
483 have_ib_ports = num_ib_ports(dev->dev);
484
485 props->fw_ver = dev->dev->caps.fw_ver;
486 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
487 IB_DEVICE_PORT_ACTIVE_EVENT |
488 IB_DEVICE_SYS_IMAGE_GUID |
489 IB_DEVICE_RC_RNR_NAK_GEN |
490 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
491 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
492 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
493 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
494 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
495 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
496 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
497 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
498 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
499 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
500 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
501 if (dev->dev->caps.max_gso_sz &&
502 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
503 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
504 props->device_cap_flags |= IB_DEVICE_UD_TSO;
505 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
506 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
507 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
508 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
509 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
510 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
511 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
512 props->device_cap_flags |= IB_DEVICE_XRC;
513 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
514 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
515 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
516 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
517 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
518 else
519 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
520 }
521 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
522 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
523
524 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
525
526 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
527 0xffffff;
528 props->vendor_part_id = dev->dev->persist->pdev->device;
529 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
530 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
531
532 props->max_mr_size = ~0ull;
533 props->page_size_cap = dev->dev->caps.page_size_cap;
534 props->max_qp = dev->dev->quotas.qp;
535 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
536 props->max_sge = min(dev->dev->caps.max_sq_sg,
537 dev->dev->caps.max_rq_sg);
538 props->max_sge_rd = MLX4_MAX_SGE_RD;
539 props->max_cq = dev->dev->quotas.cq;
540 props->max_cqe = dev->dev->caps.max_cqes;
541 props->max_mr = dev->dev->quotas.mpt;
542 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
543 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
544 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
545 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
546 props->max_srq = dev->dev->quotas.srq;
547 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
548 props->max_srq_sge = dev->dev->caps.max_srq_sge;
549 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
550 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
551 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
552 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
553 props->masked_atomic_cap = props->atomic_cap;
554 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
555 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
556 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
557 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
558 props->max_mcast_grp;
559 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
560 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
561 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
562
563 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
564 resp.response_length += sizeof(resp.hca_core_clock_offset);
565 if (!mlx4_get_internal_clock_params(dev->dev, &clock_params)) {
566 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP;
567 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
568 }
569 }
570
571 if (uhw->outlen) {
572 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
573 if (err)
574 goto out;
575 }
576 out:
577 kfree(in_mad);
578 kfree(out_mad);
579
580 return err;
581 }
582
583 static enum rdma_link_layer
mlx4_ib_port_link_layer(struct ib_device * device,u8 port_num)584 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
585 {
586 struct mlx4_dev *dev = to_mdev(device)->dev;
587
588 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
589 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
590 }
591
ib_link_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props,int netw_view)592 static int ib_link_query_port(struct ib_device *ibdev, u8 port,
593 struct ib_port_attr *props, int netw_view)
594 {
595 struct ib_smp *in_mad = NULL;
596 struct ib_smp *out_mad = NULL;
597 int ext_active_speed;
598 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
599 int err = -ENOMEM;
600
601 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
602 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
603 if (!in_mad || !out_mad)
604 goto out;
605
606 init_query_mad(in_mad);
607 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
608 in_mad->attr_mod = cpu_to_be32(port);
609
610 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
611 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
612
613 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
614 in_mad, out_mad);
615 if (err)
616 goto out;
617
618
619 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
620 props->lmc = out_mad->data[34] & 0x7;
621 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
622 props->sm_sl = out_mad->data[36] & 0xf;
623 props->state = out_mad->data[32] & 0xf;
624 props->phys_state = out_mad->data[33] >> 4;
625 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
626 if (netw_view)
627 props->gid_tbl_len = out_mad->data[50];
628 else
629 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
630 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
631 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
632 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
633 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
634 props->active_width = out_mad->data[31] & 0xf;
635 props->active_speed = out_mad->data[35] >> 4;
636 props->max_mtu = out_mad->data[41] & 0xf;
637 props->active_mtu = out_mad->data[36] >> 4;
638 props->subnet_timeout = out_mad->data[51] & 0x1f;
639 props->max_vl_num = out_mad->data[37] >> 4;
640 props->init_type_reply = out_mad->data[41] >> 4;
641
642 /* Check if extended speeds (EDR/FDR/...) are supported */
643 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
644 ext_active_speed = out_mad->data[62] >> 4;
645
646 switch (ext_active_speed) {
647 case 1:
648 props->active_speed = IB_SPEED_FDR;
649 break;
650 case 2:
651 props->active_speed = IB_SPEED_EDR;
652 break;
653 }
654 }
655
656 /* If reported active speed is QDR, check if is FDR-10 */
657 if (props->active_speed == IB_SPEED_QDR) {
658 init_query_mad(in_mad);
659 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
660 in_mad->attr_mod = cpu_to_be32(port);
661
662 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
663 NULL, NULL, in_mad, out_mad);
664 if (err)
665 goto out;
666
667 /* Checking LinkSpeedActive for FDR-10 */
668 if (out_mad->data[15] & 0x1)
669 props->active_speed = IB_SPEED_FDR10;
670 }
671
672 /* Avoid wrong speed value returned by FW if the IB link is down. */
673 if (props->state == IB_PORT_DOWN)
674 props->active_speed = IB_SPEED_SDR;
675
676 out:
677 kfree(in_mad);
678 kfree(out_mad);
679 return err;
680 }
681
state_to_phys_state(enum ib_port_state state)682 static u8 state_to_phys_state(enum ib_port_state state)
683 {
684 return state == IB_PORT_ACTIVE ?
685 IB_PORT_PHYS_STATE_LINK_UP : IB_PORT_PHYS_STATE_DISABLED;
686 }
687
eth_link_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props,int netw_view)688 static int eth_link_query_port(struct ib_device *ibdev, u8 port,
689 struct ib_port_attr *props, int netw_view)
690 {
691
692 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
693 struct mlx4_ib_iboe *iboe = &mdev->iboe;
694 struct ifnet *ndev;
695 enum ib_mtu tmp;
696 struct mlx4_cmd_mailbox *mailbox;
697 int err = 0;
698 int is_bonded = mlx4_is_bonded(mdev->dev);
699
700 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
701 if (IS_ERR(mailbox))
702 return PTR_ERR(mailbox);
703
704 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
705 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
706 MLX4_CMD_WRAPPED);
707 if (err)
708 goto out;
709
710 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
711 IB_WIDTH_4X : IB_WIDTH_1X;
712 props->active_speed = IB_SPEED_QDR;
713 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
714 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
715 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
716 props->pkey_tbl_len = 1;
717 props->max_mtu = IB_MTU_4096;
718 props->max_vl_num = 2;
719 props->state = IB_PORT_DOWN;
720 props->phys_state = state_to_phys_state(props->state);
721 props->active_mtu = IB_MTU_256;
722 spin_lock_bh(&iboe->lock);
723 ndev = iboe->netdevs[port - 1];
724 if (ndev && is_bonded) {
725 #if 0
726 rcu_read_lock(); /* required to get upper dev */
727 ndev = netdev_master_upper_dev_get_rcu(ndev);
728 rcu_read_unlock();
729 #endif
730 }
731 if (!ndev)
732 goto out_unlock;
733
734 tmp = iboe_get_mtu(ndev->if_mtu);
735 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
736
737 props->state = ((ndev->if_drv_flags & IFF_DRV_RUNNING) != 0 &&
738 ndev->if_link_state == LINK_STATE_UP) ?
739 IB_PORT_ACTIVE : IB_PORT_DOWN;
740 props->phys_state = state_to_phys_state(props->state);
741 out_unlock:
742 spin_unlock_bh(&iboe->lock);
743 out:
744 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
745 return err;
746 }
747
__mlx4_ib_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props,int netw_view)748 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
749 struct ib_port_attr *props, int netw_view)
750 {
751 int err;
752
753 memset(props, 0, sizeof *props);
754
755 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
756 ib_link_query_port(ibdev, port, props, netw_view) :
757 eth_link_query_port(ibdev, port, props, netw_view);
758
759 return err;
760 }
761
mlx4_ib_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props)762 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
763 struct ib_port_attr *props)
764 {
765 /* returns host view */
766 return __mlx4_ib_query_port(ibdev, port, props, 0);
767 }
768
__mlx4_ib_query_gid(struct ib_device * ibdev,u8 port,int index,union ib_gid * gid,int netw_view)769 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
770 union ib_gid *gid, int netw_view)
771 {
772 struct ib_smp *in_mad = NULL;
773 struct ib_smp *out_mad = NULL;
774 int err = -ENOMEM;
775 struct mlx4_ib_dev *dev = to_mdev(ibdev);
776 int clear = 0;
777 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
778
779 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
780 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
781 if (!in_mad || !out_mad)
782 goto out;
783
784 init_query_mad(in_mad);
785 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
786 in_mad->attr_mod = cpu_to_be32(port);
787
788 if (mlx4_is_mfunc(dev->dev) && netw_view)
789 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
790
791 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
792 if (err)
793 goto out;
794
795 memcpy(gid->raw, out_mad->data + 8, 8);
796
797 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
798 if (index) {
799 /* For any index > 0, return the null guid */
800 err = 0;
801 clear = 1;
802 goto out;
803 }
804 }
805
806 init_query_mad(in_mad);
807 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
808 in_mad->attr_mod = cpu_to_be32(index / 8);
809
810 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
811 NULL, NULL, in_mad, out_mad);
812 if (err)
813 goto out;
814
815 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
816
817 out:
818 if (clear)
819 memset(gid->raw + 8, 0, 8);
820 kfree(in_mad);
821 kfree(out_mad);
822 return err;
823 }
824
mlx4_ib_query_gid(struct ib_device * ibdev,u8 port,int index,union ib_gid * gid)825 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
826 union ib_gid *gid)
827 {
828 int ret;
829
830 if (rdma_protocol_ib(ibdev, port))
831 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
832
833 if (!rdma_protocol_roce(ibdev, port))
834 return -ENODEV;
835
836 if (!rdma_cap_roce_gid_table(ibdev, port))
837 return -ENODEV;
838
839 ret = ib_get_cached_gid(ibdev, port, index, gid, NULL);
840 if (ret == -EAGAIN) {
841 memcpy(gid, &zgid, sizeof(*gid));
842 return 0;
843 }
844
845 return ret;
846 }
847
mlx4_ib_query_sl2vl(struct ib_device * ibdev,u8 port,u64 * sl2vl_tbl)848 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl)
849 {
850 union sl2vl_tbl_to_u64 sl2vl64;
851 struct ib_smp *in_mad = NULL;
852 struct ib_smp *out_mad = NULL;
853 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
854 int err = -ENOMEM;
855 int jj;
856
857 if (mlx4_is_slave(to_mdev(ibdev)->dev)) {
858 *sl2vl_tbl = 0;
859 return 0;
860 }
861
862 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
863 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
864 if (!in_mad || !out_mad)
865 goto out;
866
867 init_query_mad(in_mad);
868 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE;
869 in_mad->attr_mod = 0;
870
871 if (mlx4_is_mfunc(to_mdev(ibdev)->dev))
872 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
873
874 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
875 in_mad, out_mad);
876 if (err)
877 goto out;
878
879 for (jj = 0; jj < 8; jj++)
880 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj];
881 *sl2vl_tbl = sl2vl64.sl64;
882
883 out:
884 kfree(in_mad);
885 kfree(out_mad);
886 return err;
887 }
888
mlx4_init_sl2vl_tbl(struct mlx4_ib_dev * mdev)889 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev)
890 {
891 u64 sl2vl;
892 int i;
893 int err;
894
895 for (i = 1; i <= mdev->dev->caps.num_ports; i++) {
896 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
897 continue;
898 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl);
899 if (err) {
900 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n",
901 i, err);
902 sl2vl = 0;
903 }
904 atomic64_set(&mdev->sl2vl[i - 1], sl2vl);
905 }
906 }
907
__mlx4_ib_query_pkey(struct ib_device * ibdev,u8 port,u16 index,u16 * pkey,int netw_view)908 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
909 u16 *pkey, int netw_view)
910 {
911 struct ib_smp *in_mad = NULL;
912 struct ib_smp *out_mad = NULL;
913 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
914 int err = -ENOMEM;
915
916 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
917 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
918 if (!in_mad || !out_mad)
919 goto out;
920
921 init_query_mad(in_mad);
922 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
923 in_mad->attr_mod = cpu_to_be32(index / 32);
924
925 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
926 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
927
928 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
929 in_mad, out_mad);
930 if (err)
931 goto out;
932
933 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
934
935 out:
936 kfree(in_mad);
937 kfree(out_mad);
938 return err;
939 }
940
mlx4_ib_query_pkey(struct ib_device * ibdev,u8 port,u16 index,u16 * pkey)941 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
942 {
943 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
944 }
945
mlx4_ib_modify_device(struct ib_device * ibdev,int mask,struct ib_device_modify * props)946 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
947 struct ib_device_modify *props)
948 {
949 struct mlx4_cmd_mailbox *mailbox;
950 unsigned long flags;
951
952 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
953 return -EOPNOTSUPP;
954
955 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
956 return 0;
957
958 if (mlx4_is_slave(to_mdev(ibdev)->dev))
959 return -EOPNOTSUPP;
960
961 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
962 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
963 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
964
965 /*
966 * If possible, pass node desc to FW, so it can generate
967 * a 144 trap. If cmd fails, just ignore.
968 */
969 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
970 if (IS_ERR(mailbox))
971 return 0;
972
973 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
974 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
975 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
976
977 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
978
979 return 0;
980 }
981
mlx4_ib_SET_PORT(struct mlx4_ib_dev * dev,u8 port,int reset_qkey_viols,u32 cap_mask)982 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
983 u32 cap_mask)
984 {
985 struct mlx4_cmd_mailbox *mailbox;
986 int err;
987
988 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
989 if (IS_ERR(mailbox))
990 return PTR_ERR(mailbox);
991
992 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
993 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
994 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
995 } else {
996 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
997 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
998 }
999
1000 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
1001 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
1002 MLX4_CMD_WRAPPED);
1003
1004 mlx4_free_cmd_mailbox(dev->dev, mailbox);
1005 return err;
1006 }
1007
mlx4_ib_modify_port(struct ib_device * ibdev,u8 port,int mask,struct ib_port_modify * props)1008 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
1009 struct ib_port_modify *props)
1010 {
1011 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
1012 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
1013 struct ib_port_attr attr;
1014 u32 cap_mask;
1015 int err;
1016
1017 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
1018 * of whether port link layer is ETH or IB. For ETH ports, qkey
1019 * violations and port capabilities are not meaningful.
1020 */
1021 if (is_eth)
1022 return 0;
1023
1024 mutex_lock(&mdev->cap_mask_mutex);
1025
1026 err = mlx4_ib_query_port(ibdev, port, &attr);
1027 if (err)
1028 goto out;
1029
1030 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1031 ~props->clr_port_cap_mask;
1032
1033 err = mlx4_ib_SET_PORT(mdev, port,
1034 !!(mask & IB_PORT_RESET_QKEY_CNTR),
1035 cap_mask);
1036
1037 out:
1038 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
1039 return err;
1040 }
1041
mlx4_ib_alloc_ucontext(struct ib_device * ibdev,struct ib_udata * udata)1042 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
1043 struct ib_udata *udata)
1044 {
1045 struct mlx4_ib_dev *dev = to_mdev(ibdev);
1046 struct mlx4_ib_ucontext *context;
1047 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
1048 struct mlx4_ib_alloc_ucontext_resp resp;
1049 int err;
1050
1051 if (!dev->ib_active)
1052 return ERR_PTR(-EAGAIN);
1053
1054 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
1055 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
1056 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
1057 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1058 } else {
1059 resp.dev_caps = dev->dev->caps.userspace_caps;
1060 resp.qp_tab_size = dev->dev->caps.num_qps;
1061 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
1062 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1063 resp.cqe_size = dev->dev->caps.cqe_size;
1064 }
1065
1066 context = kzalloc(sizeof(*context), GFP_KERNEL);
1067 if (!context)
1068 return ERR_PTR(-ENOMEM);
1069
1070 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
1071 if (err) {
1072 kfree(context);
1073 return ERR_PTR(err);
1074 }
1075
1076 INIT_LIST_HEAD(&context->db_page_list);
1077 mutex_init(&context->db_page_mutex);
1078
1079 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
1080 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
1081 else
1082 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
1083
1084 if (err) {
1085 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
1086 kfree(context);
1087 return ERR_PTR(-EFAULT);
1088 }
1089
1090 return &context->ibucontext;
1091 }
1092
mlx4_ib_dealloc_ucontext(struct ib_ucontext * ibcontext)1093 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
1094 {
1095 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1096
1097 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
1098 kfree(context);
1099
1100 return 0;
1101 }
1102
mlx4_ib_vma_open(struct vm_area_struct * area)1103 static void mlx4_ib_vma_open(struct vm_area_struct *area)
1104 {
1105 /* vma_open is called when a new VMA is created on top of our VMA.
1106 * This is done through either mremap flow or split_vma (usually due
1107 * to mlock, madvise, munmap, etc.). We do not support a clone of the
1108 * vma, as this VMA is strongly hardware related. Therefore we set the
1109 * vm_ops of the newly created/cloned VMA to NULL, to prevent it from
1110 * calling us again and trying to do incorrect actions. We assume that
1111 * the original vma size is exactly a single page that there will be no
1112 * "splitting" operations on.
1113 */
1114 area->vm_ops = NULL;
1115 }
1116
mlx4_ib_vma_close(struct vm_area_struct * area)1117 static void mlx4_ib_vma_close(struct vm_area_struct *area)
1118 {
1119 struct mlx4_ib_vma_private_data *mlx4_ib_vma_priv_data;
1120
1121 /* It's guaranteed that all VMAs opened on a FD are closed before the
1122 * file itself is closed, therefore no sync is needed with the regular
1123 * closing flow. (e.g. mlx4_ib_dealloc_ucontext) However need a sync
1124 * with accessing the vma as part of mlx4_ib_disassociate_ucontext.
1125 * The close operation is usually called under mm->mmap_sem except when
1126 * process is exiting. The exiting case is handled explicitly as part
1127 * of mlx4_ib_disassociate_ucontext.
1128 */
1129 mlx4_ib_vma_priv_data = (struct mlx4_ib_vma_private_data *)
1130 area->vm_private_data;
1131
1132 /* set the vma context pointer to null in the mlx4_ib driver's private
1133 * data to protect against a race condition in mlx4_ib_dissassociate_ucontext().
1134 */
1135 mlx4_ib_vma_priv_data->vma = NULL;
1136 }
1137
1138 static const struct vm_operations_struct mlx4_ib_vm_ops = {
1139 .open = mlx4_ib_vma_open,
1140 .close = mlx4_ib_vma_close
1141 };
1142
mlx4_ib_set_vma_data(struct vm_area_struct * vma,struct mlx4_ib_vma_private_data * vma_private_data)1143 static void mlx4_ib_set_vma_data(struct vm_area_struct *vma,
1144 struct mlx4_ib_vma_private_data *vma_private_data)
1145 {
1146 vma_private_data->vma = vma;
1147 vma->vm_private_data = vma_private_data;
1148 vma->vm_ops = &mlx4_ib_vm_ops;
1149 }
1150
mlx4_ib_mmap(struct ib_ucontext * context,struct vm_area_struct * vma)1151 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1152 {
1153 struct mlx4_ib_dev *dev = to_mdev(context->device);
1154 struct mlx4_ib_ucontext *mucontext = to_mucontext(context);
1155
1156 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
1157 return -EINVAL;
1158
1159 if (vma->vm_pgoff == 0) {
1160 /* We prevent double mmaping on same context */
1161 if (mucontext->hw_bar_info[HW_BAR_DB].vma)
1162 return -EINVAL;
1163
1164 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1165
1166 if (io_remap_pfn_range(vma, vma->vm_start,
1167 to_mucontext(context)->uar.pfn,
1168 PAGE_SIZE, vma->vm_page_prot))
1169 return -EAGAIN;
1170
1171 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_DB]);
1172
1173 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
1174 /* We prevent double mmaping on same context */
1175 if (mucontext->hw_bar_info[HW_BAR_BF].vma)
1176 return -EINVAL;
1177
1178 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
1179
1180 if (io_remap_pfn_range(vma, vma->vm_start,
1181 to_mucontext(context)->uar.pfn +
1182 dev->dev->caps.num_uars,
1183 PAGE_SIZE, vma->vm_page_prot))
1184 return -EAGAIN;
1185
1186 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_BF]);
1187
1188 } else if (vma->vm_pgoff == 3) {
1189 struct mlx4_clock_params params;
1190 int ret;
1191
1192 /* We prevent double mmaping on same context */
1193 if (mucontext->hw_bar_info[HW_BAR_CLOCK].vma)
1194 return -EINVAL;
1195
1196 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms);
1197
1198 if (ret)
1199 return ret;
1200
1201 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1202 if (io_remap_pfn_range(vma, vma->vm_start,
1203 (pci_resource_start(dev->dev->persist->pdev,
1204 params.bar) +
1205 params.offset)
1206 >> PAGE_SHIFT,
1207 PAGE_SIZE, vma->vm_page_prot))
1208 return -EAGAIN;
1209
1210 mlx4_ib_set_vma_data(vma,
1211 &mucontext->hw_bar_info[HW_BAR_CLOCK]);
1212 } else {
1213 return -EINVAL;
1214 }
1215
1216 return 0;
1217 }
1218
mlx4_ib_alloc_pd(struct ib_device * ibdev,struct ib_ucontext * context,struct ib_udata * udata)1219 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
1220 struct ib_ucontext *context,
1221 struct ib_udata *udata)
1222 {
1223 struct mlx4_ib_pd *pd;
1224 int err;
1225
1226 pd = kmalloc(sizeof *pd, GFP_KERNEL);
1227 if (!pd)
1228 return ERR_PTR(-ENOMEM);
1229
1230 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1231 if (err) {
1232 kfree(pd);
1233 return ERR_PTR(err);
1234 }
1235
1236 if (context)
1237 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
1238 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1239 kfree(pd);
1240 return ERR_PTR(-EFAULT);
1241 }
1242
1243 return &pd->ibpd;
1244 }
1245
mlx4_ib_dealloc_pd(struct ib_pd * pd)1246 static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
1247 {
1248 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1249 kfree(pd);
1250
1251 return 0;
1252 }
1253
mlx4_ib_alloc_xrcd(struct ib_device * ibdev,struct ib_ucontext * context,struct ib_udata * udata)1254 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
1255 struct ib_ucontext *context,
1256 struct ib_udata *udata)
1257 {
1258 struct mlx4_ib_xrcd *xrcd;
1259 struct ib_cq_init_attr cq_attr = {};
1260 int err;
1261
1262 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1263 return ERR_PTR(-ENOSYS);
1264
1265 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
1266 if (!xrcd)
1267 return ERR_PTR(-ENOMEM);
1268
1269 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
1270 if (err)
1271 goto err1;
1272
1273 xrcd->pd = ib_alloc_pd(ibdev, 0);
1274 if (IS_ERR(xrcd->pd)) {
1275 err = PTR_ERR(xrcd->pd);
1276 goto err2;
1277 }
1278
1279 cq_attr.cqe = 1;
1280 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
1281 if (IS_ERR(xrcd->cq)) {
1282 err = PTR_ERR(xrcd->cq);
1283 goto err3;
1284 }
1285
1286 return &xrcd->ibxrcd;
1287
1288 err3:
1289 ib_dealloc_pd(xrcd->pd);
1290 err2:
1291 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
1292 err1:
1293 kfree(xrcd);
1294 return ERR_PTR(err);
1295 }
1296
mlx4_ib_dealloc_xrcd(struct ib_xrcd * xrcd)1297 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1298 {
1299 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1300 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1301 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1302 kfree(xrcd);
1303
1304 return 0;
1305 }
1306
add_gid_entry(struct ib_qp * ibqp,union ib_gid * gid)1307 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1308 {
1309 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1310 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1311 struct mlx4_ib_gid_entry *ge;
1312
1313 ge = kzalloc(sizeof *ge, GFP_KERNEL);
1314 if (!ge)
1315 return -ENOMEM;
1316
1317 ge->gid = *gid;
1318 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1319 ge->port = mqp->port;
1320 ge->added = 1;
1321 }
1322
1323 mutex_lock(&mqp->mutex);
1324 list_add_tail(&ge->list, &mqp->gid_list);
1325 mutex_unlock(&mqp->mutex);
1326
1327 return 0;
1328 }
1329
mlx4_ib_delete_counters_table(struct mlx4_ib_dev * ibdev,struct mlx4_ib_counters * ctr_table)1330 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1331 struct mlx4_ib_counters *ctr_table)
1332 {
1333 struct counter_index *counter, *tmp_count;
1334
1335 mutex_lock(&ctr_table->mutex);
1336 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1337 list) {
1338 if (counter->allocated)
1339 mlx4_counter_free(ibdev->dev, counter->index);
1340 list_del(&counter->list);
1341 kfree(counter);
1342 }
1343 mutex_unlock(&ctr_table->mutex);
1344 }
1345
mlx4_ib_add_mc(struct mlx4_ib_dev * mdev,struct mlx4_ib_qp * mqp,union ib_gid * gid)1346 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1347 union ib_gid *gid)
1348 {
1349 struct ifnet *ndev;
1350 int ret = 0;
1351
1352 if (!mqp->port)
1353 return 0;
1354
1355 spin_lock_bh(&mdev->iboe.lock);
1356 ndev = mdev->iboe.netdevs[mqp->port - 1];
1357 if (ndev)
1358 if_ref(ndev);
1359 spin_unlock_bh(&mdev->iboe.lock);
1360
1361 if (ndev) {
1362 ret = 1;
1363 if_rele(ndev);
1364 }
1365
1366 return ret;
1367 }
1368
1369 struct mlx4_ib_steering {
1370 struct list_head list;
1371 struct mlx4_flow_reg_id reg_id;
1372 union ib_gid gid;
1373 };
1374
1375 #define LAST_ETH_FIELD vlan_tag
1376 #define LAST_IB_FIELD sl
1377 #define LAST_IPV4_FIELD dst_ip
1378 #define LAST_TCP_UDP_FIELD src_port
1379
1380 /* Field is the last supported field */
1381 #define FIELDS_NOT_SUPPORTED(filter, field)\
1382 memchr_inv((void *)&filter.field +\
1383 sizeof(filter.field), 0,\
1384 sizeof(filter) -\
1385 offsetof(typeof(filter), field) -\
1386 sizeof(filter.field))
1387
parse_flow_attr(struct mlx4_dev * dev,u32 qp_num,union ib_flow_spec * ib_spec,struct _rule_hw * mlx4_spec)1388 static int parse_flow_attr(struct mlx4_dev *dev,
1389 u32 qp_num,
1390 union ib_flow_spec *ib_spec,
1391 struct _rule_hw *mlx4_spec)
1392 {
1393 enum mlx4_net_trans_rule_id type;
1394
1395 switch (ib_spec->type) {
1396 case IB_FLOW_SPEC_ETH:
1397 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD))
1398 return -ENOTSUPP;
1399
1400 type = MLX4_NET_TRANS_RULE_ID_ETH;
1401 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1402 ETH_ALEN);
1403 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1404 ETH_ALEN);
1405 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1406 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1407 break;
1408 case IB_FLOW_SPEC_IB:
1409 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD))
1410 return -ENOTSUPP;
1411
1412 type = MLX4_NET_TRANS_RULE_ID_IB;
1413 mlx4_spec->ib.l3_qpn =
1414 cpu_to_be32(qp_num);
1415 mlx4_spec->ib.qpn_mask =
1416 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1417 break;
1418
1419
1420 case IB_FLOW_SPEC_IPV4:
1421 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD))
1422 return -ENOTSUPP;
1423
1424 type = MLX4_NET_TRANS_RULE_ID_IPV4;
1425 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1426 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1427 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1428 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1429 break;
1430
1431 case IB_FLOW_SPEC_TCP:
1432 case IB_FLOW_SPEC_UDP:
1433 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD))
1434 return -ENOTSUPP;
1435
1436 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1437 MLX4_NET_TRANS_RULE_ID_TCP :
1438 MLX4_NET_TRANS_RULE_ID_UDP;
1439 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1440 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1441 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1442 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1443 break;
1444
1445 default:
1446 return -EINVAL;
1447 }
1448 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1449 mlx4_hw_rule_sz(dev, type) < 0)
1450 return -EINVAL;
1451 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1452 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1453 return mlx4_hw_rule_sz(dev, type);
1454 }
1455
1456 struct default_rules {
1457 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1458 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1459 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1460 __u8 link_layer;
1461 };
1462 static const struct default_rules default_table[] = {
1463 {
1464 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
1465 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1466 .rules_create_list = {IB_FLOW_SPEC_IB},
1467 .link_layer = IB_LINK_LAYER_INFINIBAND
1468 }
1469 };
1470
__mlx4_ib_default_rules_match(struct ib_qp * qp,struct ib_flow_attr * flow_attr)1471 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1472 struct ib_flow_attr *flow_attr)
1473 {
1474 int i, j, k;
1475 void *ib_flow;
1476 const struct default_rules *pdefault_rules = default_table;
1477 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1478
1479 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1480 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1481 memset(&field_types, 0, sizeof(field_types));
1482
1483 if (link_layer != pdefault_rules->link_layer)
1484 continue;
1485
1486 ib_flow = flow_attr + 1;
1487 /* we assume the specs are sorted */
1488 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1489 j < flow_attr->num_of_specs; k++) {
1490 union ib_flow_spec *current_flow =
1491 (union ib_flow_spec *)ib_flow;
1492
1493 /* same layer but different type */
1494 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1495 (pdefault_rules->mandatory_fields[k] &
1496 IB_FLOW_SPEC_LAYER_MASK)) &&
1497 (current_flow->type !=
1498 pdefault_rules->mandatory_fields[k]))
1499 goto out;
1500
1501 /* same layer, try match next one */
1502 if (current_flow->type ==
1503 pdefault_rules->mandatory_fields[k]) {
1504 j++;
1505 ib_flow +=
1506 ((union ib_flow_spec *)ib_flow)->size;
1507 }
1508 }
1509
1510 ib_flow = flow_attr + 1;
1511 for (j = 0; j < flow_attr->num_of_specs;
1512 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1513 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1514 /* same layer and same type */
1515 if (((union ib_flow_spec *)ib_flow)->type ==
1516 pdefault_rules->mandatory_not_fields[k])
1517 goto out;
1518
1519 return i;
1520 }
1521 out:
1522 return -1;
1523 }
1524
__mlx4_ib_create_default_rules(struct mlx4_ib_dev * mdev,struct ib_qp * qp,const struct default_rules * pdefault_rules,struct _rule_hw * mlx4_spec)1525 static int __mlx4_ib_create_default_rules(
1526 struct mlx4_ib_dev *mdev,
1527 struct ib_qp *qp,
1528 const struct default_rules *pdefault_rules,
1529 struct _rule_hw *mlx4_spec) {
1530 int size = 0;
1531 int i;
1532
1533 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1534 int ret;
1535 union ib_flow_spec ib_spec;
1536 switch (pdefault_rules->rules_create_list[i]) {
1537 case 0:
1538 /* no rule */
1539 continue;
1540 case IB_FLOW_SPEC_IB:
1541 ib_spec.type = IB_FLOW_SPEC_IB;
1542 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1543
1544 break;
1545 default:
1546 /* invalid rule */
1547 return -EINVAL;
1548 }
1549 /* We must put empty rule, qpn is being ignored */
1550 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1551 mlx4_spec);
1552 if (ret < 0) {
1553 pr_info("invalid parsing\n");
1554 return -EINVAL;
1555 }
1556
1557 mlx4_spec = (void *)mlx4_spec + ret;
1558 size += ret;
1559 }
1560 return size;
1561 }
1562
__mlx4_ib_create_flow(struct ib_qp * qp,struct ib_flow_attr * flow_attr,int domain,enum mlx4_net_trans_promisc_mode flow_type,u64 * reg_id)1563 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1564 int domain,
1565 enum mlx4_net_trans_promisc_mode flow_type,
1566 u64 *reg_id)
1567 {
1568 int ret, i;
1569 int size = 0;
1570 void *ib_flow;
1571 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1572 struct mlx4_cmd_mailbox *mailbox;
1573 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1574 int default_flow;
1575
1576 static const u16 __mlx4_domain[] = {
1577 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1578 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1579 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1580 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1581 };
1582
1583 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1584 pr_err("Invalid priority value %d\n", flow_attr->priority);
1585 return -EINVAL;
1586 }
1587
1588 if (domain >= IB_FLOW_DOMAIN_NUM) {
1589 pr_err("Invalid domain value %d\n", domain);
1590 return -EINVAL;
1591 }
1592
1593 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1594 return -EINVAL;
1595
1596 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1597 if (IS_ERR(mailbox))
1598 return PTR_ERR(mailbox);
1599 ctrl = mailbox->buf;
1600
1601 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1602 flow_attr->priority);
1603 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1604 ctrl->port = flow_attr->port;
1605 ctrl->qpn = cpu_to_be32(qp->qp_num);
1606
1607 ib_flow = flow_attr + 1;
1608 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1609 /* Add default flows */
1610 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1611 if (default_flow >= 0) {
1612 ret = __mlx4_ib_create_default_rules(
1613 mdev, qp, default_table + default_flow,
1614 mailbox->buf + size);
1615 if (ret < 0) {
1616 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1617 return -EINVAL;
1618 }
1619 size += ret;
1620 }
1621 for (i = 0; i < flow_attr->num_of_specs; i++) {
1622 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1623 mailbox->buf + size);
1624 if (ret < 0) {
1625 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1626 return -EINVAL;
1627 }
1628 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1629 size += ret;
1630 }
1631
1632 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1633 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1634 MLX4_CMD_WRAPPED);
1635 if (ret == -ENOMEM)
1636 pr_err("mcg table is full. Fail to register network rule.\n");
1637 else if (ret == -ENXIO)
1638 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1639 else if (ret)
1640 pr_err("Invalid argument. Fail to register network rule.\n");
1641
1642 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1643 return ret;
1644 }
1645
__mlx4_ib_destroy_flow(struct mlx4_dev * dev,u64 reg_id)1646 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1647 {
1648 int err;
1649 err = mlx4_cmd(dev, reg_id, 0, 0,
1650 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1651 MLX4_CMD_WRAPPED);
1652 if (err)
1653 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1654 (long long)reg_id);
1655 return err;
1656 }
1657
mlx4_ib_tunnel_steer_add(struct ib_qp * qp,struct ib_flow_attr * flow_attr,u64 * reg_id)1658 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1659 u64 *reg_id)
1660 {
1661 void *ib_flow;
1662 union ib_flow_spec *ib_spec;
1663 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1664 int err = 0;
1665
1666 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1667 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1668 return 0; /* do nothing */
1669
1670 ib_flow = flow_attr + 1;
1671 ib_spec = (union ib_flow_spec *)ib_flow;
1672
1673 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1674 return 0; /* do nothing */
1675
1676 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1677 flow_attr->port, qp->qp_num,
1678 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1679 reg_id);
1680 return err;
1681 }
1682
mlx4_ib_add_dont_trap_rule(struct mlx4_dev * dev,struct ib_flow_attr * flow_attr,enum mlx4_net_trans_promisc_mode * type)1683 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev,
1684 struct ib_flow_attr *flow_attr,
1685 enum mlx4_net_trans_promisc_mode *type)
1686 {
1687 int err = 0;
1688
1689 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) ||
1690 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) ||
1691 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) {
1692 return -EOPNOTSUPP;
1693 }
1694
1695 if (flow_attr->num_of_specs == 0) {
1696 type[0] = MLX4_FS_MC_SNIFFER;
1697 type[1] = MLX4_FS_UC_SNIFFER;
1698 } else {
1699 union ib_flow_spec *ib_spec;
1700
1701 ib_spec = (union ib_flow_spec *)(flow_attr + 1);
1702 if (ib_spec->type != IB_FLOW_SPEC_ETH)
1703 return -EINVAL;
1704
1705 /* if all is zero than MC and UC */
1706 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) {
1707 type[0] = MLX4_FS_MC_SNIFFER;
1708 type[1] = MLX4_FS_UC_SNIFFER;
1709 } else {
1710 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01,
1711 ib_spec->eth.mask.dst_mac[1],
1712 ib_spec->eth.mask.dst_mac[2],
1713 ib_spec->eth.mask.dst_mac[3],
1714 ib_spec->eth.mask.dst_mac[4],
1715 ib_spec->eth.mask.dst_mac[5]};
1716
1717 /* Above xor was only on MC bit, non empty mask is valid
1718 * only if this bit is set and rest are zero.
1719 */
1720 if (!is_zero_ether_addr(&mac[0]))
1721 return -EINVAL;
1722
1723 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
1724 type[0] = MLX4_FS_MC_SNIFFER;
1725 else
1726 type[0] = MLX4_FS_UC_SNIFFER;
1727 }
1728 }
1729
1730 return err;
1731 }
1732
mlx4_ib_create_flow(struct ib_qp * qp,struct ib_flow_attr * flow_attr,int domain)1733 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1734 struct ib_flow_attr *flow_attr,
1735 int domain)
1736 {
1737 int err = 0, i = 0, j = 0;
1738 struct mlx4_ib_flow *mflow;
1739 enum mlx4_net_trans_promisc_mode type[2];
1740 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1741 int is_bonded = mlx4_is_bonded(dev);
1742
1743 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt)
1744 return ERR_PTR(-EINVAL);
1745
1746 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) &&
1747 (flow_attr->type != IB_FLOW_ATTR_NORMAL))
1748 return ERR_PTR(-EOPNOTSUPP);
1749
1750 memset(type, 0, sizeof(type));
1751
1752 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1753 if (!mflow) {
1754 err = -ENOMEM;
1755 goto err_free;
1756 }
1757
1758 switch (flow_attr->type) {
1759 case IB_FLOW_ATTR_NORMAL:
1760 /* If dont trap flag (continue match) is set, under specific
1761 * condition traffic be replicated to given qp,
1762 * without stealing it
1763 */
1764 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) {
1765 err = mlx4_ib_add_dont_trap_rule(dev,
1766 flow_attr,
1767 type);
1768 if (err)
1769 goto err_free;
1770 } else {
1771 type[0] = MLX4_FS_REGULAR;
1772 }
1773 break;
1774
1775 case IB_FLOW_ATTR_ALL_DEFAULT:
1776 type[0] = MLX4_FS_ALL_DEFAULT;
1777 break;
1778
1779 case IB_FLOW_ATTR_MC_DEFAULT:
1780 type[0] = MLX4_FS_MC_DEFAULT;
1781 break;
1782
1783 case IB_FLOW_ATTR_SNIFFER:
1784 type[0] = MLX4_FS_MIRROR_RX_PORT;
1785 type[1] = MLX4_FS_MIRROR_SX_PORT;
1786 break;
1787
1788 default:
1789 err = -EINVAL;
1790 goto err_free;
1791 }
1792
1793 while (i < ARRAY_SIZE(type) && type[i]) {
1794 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1795 &mflow->reg_id[i].id);
1796 if (err)
1797 goto err_create_flow;
1798 if (is_bonded) {
1799 /* Application always sees one port so the mirror rule
1800 * must be on port #2
1801 */
1802 flow_attr->port = 2;
1803 err = __mlx4_ib_create_flow(qp, flow_attr,
1804 domain, type[j],
1805 &mflow->reg_id[j].mirror);
1806 flow_attr->port = 1;
1807 if (err)
1808 goto err_create_flow;
1809 j++;
1810 }
1811
1812 i++;
1813 }
1814
1815 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1816 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1817 &mflow->reg_id[i].id);
1818 if (err)
1819 goto err_create_flow;
1820
1821 if (is_bonded) {
1822 flow_attr->port = 2;
1823 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1824 &mflow->reg_id[j].mirror);
1825 flow_attr->port = 1;
1826 if (err)
1827 goto err_create_flow;
1828 j++;
1829 }
1830 /* function to create mirror rule */
1831 i++;
1832 }
1833
1834 return &mflow->ibflow;
1835
1836 err_create_flow:
1837 while (i) {
1838 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1839 mflow->reg_id[i].id);
1840 i--;
1841 }
1842
1843 while (j) {
1844 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1845 mflow->reg_id[j].mirror);
1846 j--;
1847 }
1848 err_free:
1849 kfree(mflow);
1850 return ERR_PTR(err);
1851 }
1852
mlx4_ib_destroy_flow(struct ib_flow * flow_id)1853 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1854 {
1855 int err, ret = 0;
1856 int i = 0;
1857 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1858 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1859
1860 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1861 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1862 if (err)
1863 ret = err;
1864 if (mflow->reg_id[i].mirror) {
1865 err = __mlx4_ib_destroy_flow(mdev->dev,
1866 mflow->reg_id[i].mirror);
1867 if (err)
1868 ret = err;
1869 }
1870 i++;
1871 }
1872
1873 kfree(mflow);
1874 return ret;
1875 }
1876
mlx4_ib_mcg_attach(struct ib_qp * ibqp,union ib_gid * gid,u16 lid)1877 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1878 {
1879 int err;
1880 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1881 struct mlx4_dev *dev = mdev->dev;
1882 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1883 struct mlx4_ib_steering *ib_steering = NULL;
1884 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1885 struct mlx4_flow_reg_id reg_id;
1886
1887 if (mdev->dev->caps.steering_mode ==
1888 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1889 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1890 if (!ib_steering)
1891 return -ENOMEM;
1892 }
1893
1894 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1895 !!(mqp->flags &
1896 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1897 prot, ®_id.id);
1898 if (err) {
1899 pr_err("multicast attach op failed, err %d\n", err);
1900 goto err_malloc;
1901 }
1902
1903 reg_id.mirror = 0;
1904 if (mlx4_is_bonded(dev)) {
1905 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1906 (mqp->port == 1) ? 2 : 1,
1907 !!(mqp->flags &
1908 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1909 prot, ®_id.mirror);
1910 if (err)
1911 goto err_add;
1912 }
1913
1914 err = add_gid_entry(ibqp, gid);
1915 if (err)
1916 goto err_add;
1917
1918 if (ib_steering) {
1919 memcpy(ib_steering->gid.raw, gid->raw, 16);
1920 ib_steering->reg_id = reg_id;
1921 mutex_lock(&mqp->mutex);
1922 list_add(&ib_steering->list, &mqp->steering_rules);
1923 mutex_unlock(&mqp->mutex);
1924 }
1925 return 0;
1926
1927 err_add:
1928 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1929 prot, reg_id.id);
1930 if (reg_id.mirror)
1931 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1932 prot, reg_id.mirror);
1933 err_malloc:
1934 kfree(ib_steering);
1935
1936 return err;
1937 }
1938
find_gid_entry(struct mlx4_ib_qp * qp,u8 * raw)1939 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1940 {
1941 struct mlx4_ib_gid_entry *ge;
1942 struct mlx4_ib_gid_entry *tmp;
1943 struct mlx4_ib_gid_entry *ret = NULL;
1944
1945 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1946 if (!memcmp(raw, ge->gid.raw, 16)) {
1947 ret = ge;
1948 break;
1949 }
1950 }
1951
1952 return ret;
1953 }
1954
mlx4_ib_mcg_detach(struct ib_qp * ibqp,union ib_gid * gid,u16 lid)1955 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1956 {
1957 int err;
1958 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1959 struct mlx4_dev *dev = mdev->dev;
1960 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1961 struct ifnet *ndev;
1962 struct mlx4_ib_gid_entry *ge;
1963 struct mlx4_flow_reg_id reg_id = {0, 0};
1964 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1965
1966 if (mdev->dev->caps.steering_mode ==
1967 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1968 struct mlx4_ib_steering *ib_steering;
1969
1970 mutex_lock(&mqp->mutex);
1971 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1972 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1973 list_del(&ib_steering->list);
1974 break;
1975 }
1976 }
1977 mutex_unlock(&mqp->mutex);
1978 if (&ib_steering->list == &mqp->steering_rules) {
1979 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1980 return -EINVAL;
1981 }
1982 reg_id = ib_steering->reg_id;
1983 kfree(ib_steering);
1984 }
1985
1986 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1987 prot, reg_id.id);
1988 if (err)
1989 return err;
1990
1991 if (mlx4_is_bonded(dev)) {
1992 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1993 prot, reg_id.mirror);
1994 if (err)
1995 return err;
1996 }
1997
1998 mutex_lock(&mqp->mutex);
1999 ge = find_gid_entry(mqp, gid->raw);
2000 if (ge) {
2001 spin_lock_bh(&mdev->iboe.lock);
2002 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
2003 if (ndev)
2004 if_ref(ndev);
2005 spin_unlock_bh(&mdev->iboe.lock);
2006 if (ndev)
2007 if_rele(ndev);
2008 list_del(&ge->list);
2009 kfree(ge);
2010 } else
2011 pr_warn("could not find mgid entry\n");
2012
2013 mutex_unlock(&mqp->mutex);
2014
2015 return 0;
2016 }
2017
init_node_data(struct mlx4_ib_dev * dev)2018 static int init_node_data(struct mlx4_ib_dev *dev)
2019 {
2020 struct ib_smp *in_mad = NULL;
2021 struct ib_smp *out_mad = NULL;
2022 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
2023 int err = -ENOMEM;
2024
2025 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
2026 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
2027 if (!in_mad || !out_mad)
2028 goto out;
2029
2030 init_query_mad(in_mad);
2031 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
2032 if (mlx4_is_master(dev->dev))
2033 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
2034
2035 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2036 if (err)
2037 goto out;
2038
2039 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
2040
2041 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
2042
2043 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2044 if (err)
2045 goto out;
2046
2047 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
2048 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
2049
2050 out:
2051 kfree(in_mad);
2052 kfree(out_mad);
2053 return err;
2054 }
2055
show_hca(struct device * device,struct device_attribute * attr,char * buf)2056 static ssize_t show_hca(struct device *device, struct device_attribute *attr,
2057 char *buf)
2058 {
2059 struct mlx4_ib_dev *dev =
2060 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2061 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
2062 }
2063
show_rev(struct device * device,struct device_attribute * attr,char * buf)2064 static ssize_t show_rev(struct device *device, struct device_attribute *attr,
2065 char *buf)
2066 {
2067 struct mlx4_ib_dev *dev =
2068 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2069 return sprintf(buf, "%x\n", dev->dev->rev_id);
2070 }
2071
show_board(struct device * device,struct device_attribute * attr,char * buf)2072 static ssize_t show_board(struct device *device, struct device_attribute *attr,
2073 char *buf)
2074 {
2075 struct mlx4_ib_dev *dev =
2076 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2077 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
2078 dev->dev->board_id);
2079 }
2080
2081 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
2082 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
2083 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
2084
2085 static struct device_attribute *mlx4_class_attributes[] = {
2086 &dev_attr_hw_rev,
2087 &dev_attr_hca_type,
2088 &dev_attr_board_id
2089 };
2090
2091 struct diag_counter {
2092 const char *name;
2093 u32 offset;
2094 };
2095
2096 #define DIAG_COUNTER(_name, _offset) \
2097 { .name = #_name, .offset = _offset }
2098
2099 static const struct diag_counter diag_basic[] = {
2100 DIAG_COUNTER(rq_num_lle, 0x00),
2101 DIAG_COUNTER(sq_num_lle, 0x04),
2102 DIAG_COUNTER(rq_num_lqpoe, 0x08),
2103 DIAG_COUNTER(sq_num_lqpoe, 0x0C),
2104 DIAG_COUNTER(rq_num_lpe, 0x18),
2105 DIAG_COUNTER(sq_num_lpe, 0x1C),
2106 DIAG_COUNTER(rq_num_wrfe, 0x20),
2107 DIAG_COUNTER(sq_num_wrfe, 0x24),
2108 DIAG_COUNTER(sq_num_mwbe, 0x2C),
2109 DIAG_COUNTER(sq_num_bre, 0x34),
2110 DIAG_COUNTER(sq_num_rire, 0x44),
2111 DIAG_COUNTER(rq_num_rire, 0x48),
2112 DIAG_COUNTER(sq_num_rae, 0x4C),
2113 DIAG_COUNTER(rq_num_rae, 0x50),
2114 DIAG_COUNTER(sq_num_roe, 0x54),
2115 DIAG_COUNTER(sq_num_tree, 0x5C),
2116 DIAG_COUNTER(sq_num_rree, 0x64),
2117 DIAG_COUNTER(rq_num_rnr, 0x68),
2118 DIAG_COUNTER(sq_num_rnr, 0x6C),
2119 DIAG_COUNTER(rq_num_oos, 0x100),
2120 DIAG_COUNTER(sq_num_oos, 0x104),
2121 };
2122
2123 static const struct diag_counter diag_ext[] = {
2124 DIAG_COUNTER(rq_num_dup, 0x130),
2125 DIAG_COUNTER(sq_num_to, 0x134),
2126 };
2127
2128 static const struct diag_counter diag_device_only[] = {
2129 DIAG_COUNTER(num_cqovf, 0x1A0),
2130 DIAG_COUNTER(rq_num_udsdprd, 0x118),
2131 };
2132
mlx4_ib_alloc_hw_stats(struct ib_device * ibdev,u8 port_num)2133 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev,
2134 u8 port_num)
2135 {
2136 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2137 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2138
2139 if (!diag[!!port_num].name)
2140 return NULL;
2141
2142 return rdma_alloc_hw_stats_struct(diag[!!port_num].name,
2143 diag[!!port_num].num_counters,
2144 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2145 }
2146
mlx4_ib_get_hw_stats(struct ib_device * ibdev,struct rdma_hw_stats * stats,u8 port,int index)2147 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev,
2148 struct rdma_hw_stats *stats,
2149 u8 port, int index)
2150 {
2151 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2152 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2153 u32 hw_value[ARRAY_SIZE(diag_device_only) +
2154 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {};
2155 int ret;
2156 int i;
2157
2158 ret = mlx4_query_diag_counters(dev->dev,
2159 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS,
2160 diag[!!port].offset, hw_value,
2161 diag[!!port].num_counters, port);
2162
2163 if (ret)
2164 return ret;
2165
2166 for (i = 0; i < diag[!!port].num_counters; i++)
2167 stats->value[i] = hw_value[i];
2168
2169 return diag[!!port].num_counters;
2170 }
2171
__mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev * ibdev,const char *** name,u32 ** offset,u32 * num,bool port)2172 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev,
2173 const char ***name,
2174 u32 **offset,
2175 u32 *num,
2176 bool port)
2177 {
2178 u32 num_counters;
2179
2180 num_counters = ARRAY_SIZE(diag_basic);
2181
2182 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT)
2183 num_counters += ARRAY_SIZE(diag_ext);
2184
2185 if (!port)
2186 num_counters += ARRAY_SIZE(diag_device_only);
2187
2188 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL);
2189 if (!*name)
2190 return -ENOMEM;
2191
2192 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL);
2193 if (!*offset)
2194 goto err_name;
2195
2196 *num = num_counters;
2197
2198 return 0;
2199
2200 err_name:
2201 kfree(*name);
2202 return -ENOMEM;
2203 }
2204
mlx4_ib_fill_diag_counters(struct mlx4_ib_dev * ibdev,const char ** name,u32 * offset,bool port)2205 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev,
2206 const char **name,
2207 u32 *offset,
2208 bool port)
2209 {
2210 int i;
2211 int j;
2212
2213 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) {
2214 name[i] = diag_basic[i].name;
2215 offset[i] = diag_basic[i].offset;
2216 }
2217
2218 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) {
2219 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) {
2220 name[j] = diag_ext[i].name;
2221 offset[j] = diag_ext[i].offset;
2222 }
2223 }
2224
2225 if (!port) {
2226 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) {
2227 name[j] = diag_device_only[i].name;
2228 offset[j] = diag_device_only[i].offset;
2229 }
2230 }
2231 }
2232
mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev * ibdev)2233 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev)
2234 {
2235 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters;
2236 int i;
2237 int ret;
2238 bool per_port = !!(ibdev->dev->caps.flags2 &
2239 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT);
2240
2241 if (mlx4_is_slave(ibdev->dev))
2242 return 0;
2243
2244 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2245 /* i == 1 means we are building port counters */
2246 if (i && !per_port)
2247 continue;
2248
2249 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name,
2250 &diag[i].offset,
2251 &diag[i].num_counters, i);
2252 if (ret)
2253 goto err_alloc;
2254
2255 mlx4_ib_fill_diag_counters(ibdev, diag[i].name,
2256 diag[i].offset, i);
2257 }
2258
2259 ibdev->ib_dev.get_hw_stats = mlx4_ib_get_hw_stats;
2260 ibdev->ib_dev.alloc_hw_stats = mlx4_ib_alloc_hw_stats;
2261
2262 return 0;
2263
2264 err_alloc:
2265 if (i) {
2266 kfree(diag[i - 1].name);
2267 kfree(diag[i - 1].offset);
2268 }
2269
2270 return ret;
2271 }
2272
mlx4_ib_diag_cleanup(struct mlx4_ib_dev * ibdev)2273 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev)
2274 {
2275 int i;
2276
2277 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2278 kfree(ibdev->diag_counters[i].offset);
2279 kfree(ibdev->diag_counters[i].name);
2280 }
2281 }
2282
2283 #define MLX4_IB_INVALID_MAC ((u64)-1)
mlx4_ib_update_qps(struct mlx4_ib_dev * ibdev,struct ifnet * dev,int port)2284 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
2285 struct ifnet *dev,
2286 int port)
2287 {
2288 u64 new_smac = 0;
2289 u64 release_mac = MLX4_IB_INVALID_MAC;
2290 struct mlx4_ib_qp *qp;
2291
2292 new_smac = mlx4_mac_to_u64(IF_LLADDR(dev));
2293
2294 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2295
2296 /* no need for update QP1 and mac registration in non-SRIOV */
2297 if (!mlx4_is_mfunc(ibdev->dev))
2298 return;
2299
2300 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
2301 qp = ibdev->qp1_proxy[port - 1];
2302 if (qp) {
2303 int new_smac_index;
2304 u64 old_smac;
2305 struct mlx4_update_qp_params update_params;
2306
2307 mutex_lock(&qp->mutex);
2308 old_smac = qp->pri.smac;
2309 if (new_smac == old_smac)
2310 goto unlock;
2311
2312 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
2313
2314 if (new_smac_index < 0)
2315 goto unlock;
2316
2317 update_params.smac_index = new_smac_index;
2318 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
2319 &update_params)) {
2320 release_mac = new_smac;
2321 goto unlock;
2322 }
2323 /* if old port was zero, no mac was yet registered for this QP */
2324 if (qp->pri.smac_port)
2325 release_mac = old_smac;
2326 qp->pri.smac = new_smac;
2327 qp->pri.smac_port = port;
2328 qp->pri.smac_index = new_smac_index;
2329 }
2330
2331 unlock:
2332 if (release_mac != MLX4_IB_INVALID_MAC)
2333 mlx4_unregister_mac(ibdev->dev, port, release_mac);
2334 if (qp)
2335 mutex_unlock(&qp->mutex);
2336 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
2337 }
2338
mlx4_ib_scan_netdevs(struct mlx4_ib_dev * ibdev,struct ifnet * dev,unsigned long event)2339 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
2340 struct ifnet *dev,
2341 unsigned long event)
2342
2343 {
2344 struct mlx4_ib_iboe *iboe;
2345 int update_qps_port = -1;
2346 int port;
2347
2348 iboe = &ibdev->iboe;
2349
2350 spin_lock_bh(&iboe->lock);
2351 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2352
2353 iboe->netdevs[port - 1] =
2354 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2355
2356 if (dev == iboe->netdevs[port - 1] &&
2357 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2358 event == NETDEV_UP || event == NETDEV_CHANGE))
2359 update_qps_port = port;
2360
2361 }
2362 spin_unlock_bh(&iboe->lock);
2363
2364 if (update_qps_port > 0)
2365 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2366 }
2367
mlx4_ib_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)2368 static int mlx4_ib_netdev_event(struct notifier_block *this,
2369 unsigned long event, void *ptr)
2370 {
2371 struct ifnet *dev = netdev_notifier_info_to_ifp(ptr);
2372 struct mlx4_ib_dev *ibdev;
2373
2374 if (dev->if_vnet != &init_net)
2375 return NOTIFY_DONE;
2376
2377 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2378 mlx4_ib_scan_netdevs(ibdev, dev, event);
2379
2380 return NOTIFY_DONE;
2381 }
2382
init_pkeys(struct mlx4_ib_dev * ibdev)2383 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2384 {
2385 int port;
2386 int slave;
2387 int i;
2388
2389 if (mlx4_is_master(ibdev->dev)) {
2390 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2391 ++slave) {
2392 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2393 for (i = 0;
2394 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2395 ++i) {
2396 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2397 /* master has the identity virt2phys pkey mapping */
2398 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2399 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2400 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2401 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2402 }
2403 }
2404 }
2405 /* initialize pkey cache */
2406 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2407 for (i = 0;
2408 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2409 ++i)
2410 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2411 (i) ? 0 : 0xFFFF;
2412 }
2413 }
2414 }
2415
mlx4_ib_alloc_eqs(struct mlx4_dev * dev,struct mlx4_ib_dev * ibdev)2416 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2417 {
2418 int i, j, eq = 0, total_eqs = 0;
2419
2420 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2421 sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2422 if (!ibdev->eq_table)
2423 return;
2424
2425 for (i = 1; i <= dev->caps.num_ports; i++) {
2426 for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2427 j++, total_eqs++) {
2428 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs))
2429 continue;
2430 ibdev->eq_table[eq] = total_eqs;
2431 if (!mlx4_assign_eq(dev, i,
2432 &ibdev->eq_table[eq]))
2433 eq++;
2434 else
2435 ibdev->eq_table[eq] = -1;
2436 }
2437 }
2438
2439 for (i = eq; i < dev->caps.num_comp_vectors;
2440 ibdev->eq_table[i++] = -1)
2441 ;
2442
2443 /* Advertise the new number of EQs to clients */
2444 ibdev->ib_dev.num_comp_vectors = eq;
2445 }
2446
mlx4_ib_free_eqs(struct mlx4_dev * dev,struct mlx4_ib_dev * ibdev)2447 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2448 {
2449 int i;
2450 int total_eqs = ibdev->ib_dev.num_comp_vectors;
2451
2452 /* no eqs were allocated */
2453 if (!ibdev->eq_table)
2454 return;
2455
2456 /* Reset the advertised EQ number */
2457 ibdev->ib_dev.num_comp_vectors = 0;
2458
2459 for (i = 0; i < total_eqs; i++)
2460 mlx4_release_eq(dev, ibdev->eq_table[i]);
2461
2462 kfree(ibdev->eq_table);
2463 ibdev->eq_table = NULL;
2464 }
2465
mlx4_port_immutable(struct ib_device * ibdev,u8 port_num,struct ib_port_immutable * immutable)2466 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2467 struct ib_port_immutable *immutable)
2468 {
2469 struct ib_port_attr attr;
2470 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
2471 int err;
2472
2473 err = mlx4_ib_query_port(ibdev, port_num, &attr);
2474 if (err)
2475 return err;
2476
2477 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2478 immutable->gid_tbl_len = attr.gid_tbl_len;
2479
2480 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) {
2481 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2482 } else {
2483 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)
2484 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2485 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
2486 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |
2487 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
2488 }
2489
2490 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2491
2492 return 0;
2493 }
2494
get_fw_ver_str(struct ib_device * device,char * str,size_t str_len)2495 static void get_fw_ver_str(struct ib_device *device, char *str,
2496 size_t str_len)
2497 {
2498 struct mlx4_ib_dev *dev =
2499 container_of(device, struct mlx4_ib_dev, ib_dev);
2500 snprintf(str, str_len, "%d.%d.%d",
2501 (int) (dev->dev->caps.fw_ver >> 32),
2502 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
2503 (int) dev->dev->caps.fw_ver & 0xffff);
2504 }
2505
mlx4_ib_add(struct mlx4_dev * dev)2506 static void *mlx4_ib_add(struct mlx4_dev *dev)
2507 {
2508 struct mlx4_ib_dev *ibdev;
2509 int num_ports;
2510 int i, j;
2511 int err;
2512 struct mlx4_ib_iboe *iboe;
2513 int ib_num_ports = 0;
2514 int num_req_counters;
2515 int allocated;
2516 u32 counter_index;
2517 struct counter_index *new_counter_index = NULL;
2518
2519 pr_info_once("%s", mlx4_ib_version);
2520
2521 num_ports = 0;
2522 mlx4_foreach_ib_transport_port(i, dev)
2523 num_ports++;
2524
2525 /* No point in registering a device with no ports... */
2526 if (num_ports == 0)
2527 return NULL;
2528
2529 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2530 if (!ibdev) {
2531 dev_err(&dev->persist->pdev->dev,
2532 "Device struct alloc failed\n");
2533 return NULL;
2534 }
2535
2536 iboe = &ibdev->iboe;
2537
2538 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2539 goto err_dealloc;
2540
2541 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2542 goto err_pd;
2543
2544 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2545 PAGE_SIZE);
2546 if (!ibdev->uar_map)
2547 goto err_uar;
2548 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2549
2550 ibdev->dev = dev;
2551 ibdev->bond_next_port = 0;
2552
2553 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2554 ibdev->ib_dev.owner = THIS_MODULE;
2555 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2556 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2557 ibdev->num_ports = num_ports;
2558 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2559 1 : ibdev->num_ports;
2560 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2561 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
2562 ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev;
2563 ibdev->ib_dev.add_gid = mlx4_ib_add_gid;
2564 ibdev->ib_dev.del_gid = mlx4_ib_del_gid;
2565
2566 if (dev->caps.userspace_caps)
2567 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2568 else
2569 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2570
2571 ibdev->ib_dev.uverbs_cmd_mask =
2572 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2573 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2574 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2575 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2576 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2577 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2578 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
2579 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2580 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2581 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2582 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
2583 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2584 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2585 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2586 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2587 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2588 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2589 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2590 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2591 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
2592 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
2593 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
2594 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2595 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
2596
2597 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2598 ibdev->ib_dev.query_port = mlx4_ib_query_port;
2599 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
2600 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2601 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2602 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2603 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2604 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2605 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2606 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2607 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2608 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2609 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2610 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2611 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2612 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2613 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
2614 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
2615 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2616 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2617 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2618 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
2619 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
2620 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2621 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2622 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2623 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
2624 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
2625 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
2626 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2627 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2628 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2629 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2630 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
2631 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
2632 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
2633 ibdev->ib_dev.alloc_mr = mlx4_ib_alloc_mr;
2634 ibdev->ib_dev.map_mr_sg = mlx4_ib_map_mr_sg;
2635 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2636 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2637 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2638 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
2639 ibdev->ib_dev.get_dev_fw_str = get_fw_ver_str;
2640
2641 if (!mlx4_is_slave(ibdev->dev)) {
2642 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2643 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2644 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2645 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2646 }
2647
2648 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2649 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2650 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2651 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2652
2653 ibdev->ib_dev.uverbs_cmd_mask |=
2654 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2655 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2656 }
2657
2658 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2659 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2660 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2661 ibdev->ib_dev.uverbs_cmd_mask |=
2662 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2663 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2664 }
2665
2666 if (check_flow_steering_support(dev)) {
2667 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2668 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2669 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2670
2671 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2672 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2673 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2674 }
2675
2676 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2677 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) |
2678 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) |
2679 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP);
2680
2681 mlx4_ib_alloc_eqs(dev, ibdev);
2682
2683 spin_lock_init(&iboe->lock);
2684
2685 if (init_node_data(ibdev))
2686 goto err_map;
2687 mlx4_init_sl2vl_tbl(ibdev);
2688
2689 for (i = 0; i < ibdev->num_ports; ++i) {
2690 mutex_init(&ibdev->counters_table[i].mutex);
2691 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2692 }
2693
2694 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2695 for (i = 0; i < num_req_counters; ++i) {
2696 mutex_init(&ibdev->qp1_proxy_lock[i]);
2697 allocated = 0;
2698 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2699 IB_LINK_LAYER_ETHERNET) {
2700 err = mlx4_counter_alloc(ibdev->dev, &counter_index);
2701 /* if failed to allocate a new counter, use default */
2702 if (err)
2703 counter_index =
2704 mlx4_get_default_counter_index(dev,
2705 i + 1);
2706 else
2707 allocated = 1;
2708 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2709 counter_index = mlx4_get_default_counter_index(dev,
2710 i + 1);
2711 }
2712 new_counter_index = kmalloc(sizeof(*new_counter_index),
2713 GFP_KERNEL);
2714 if (!new_counter_index) {
2715 if (allocated)
2716 mlx4_counter_free(ibdev->dev, counter_index);
2717 goto err_counter;
2718 }
2719 new_counter_index->index = counter_index;
2720 new_counter_index->allocated = allocated;
2721 list_add_tail(&new_counter_index->list,
2722 &ibdev->counters_table[i].counters_list);
2723 ibdev->counters_table[i].default_counter = counter_index;
2724 pr_info("counter index %d for port %d allocated %d\n",
2725 counter_index, i + 1, allocated);
2726 }
2727 if (mlx4_is_bonded(dev))
2728 for (i = 1; i < ibdev->num_ports ; ++i) {
2729 new_counter_index =
2730 kmalloc(sizeof(struct counter_index),
2731 GFP_KERNEL);
2732 if (!new_counter_index)
2733 goto err_counter;
2734 new_counter_index->index = counter_index;
2735 new_counter_index->allocated = 0;
2736 list_add_tail(&new_counter_index->list,
2737 &ibdev->counters_table[i].counters_list);
2738 ibdev->counters_table[i].default_counter =
2739 counter_index;
2740 }
2741
2742 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2743 ib_num_ports++;
2744
2745 spin_lock_init(&ibdev->sm_lock);
2746 mutex_init(&ibdev->cap_mask_mutex);
2747 INIT_LIST_HEAD(&ibdev->qp_list);
2748 spin_lock_init(&ibdev->reset_flow_resource_lock);
2749
2750 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2751 ib_num_ports) {
2752 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2753 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2754 MLX4_IB_UC_STEER_QPN_ALIGN,
2755 &ibdev->steer_qpn_base, 0);
2756 if (err)
2757 goto err_counter;
2758
2759 ibdev->ib_uc_qpns_bitmap =
2760 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2761 sizeof(long),
2762 GFP_KERNEL);
2763 if (!ibdev->ib_uc_qpns_bitmap) {
2764 dev_err(&dev->persist->pdev->dev,
2765 "bit map alloc failed\n");
2766 goto err_steer_qp_release;
2767 }
2768
2769 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2770
2771 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2772 dev, ibdev->steer_qpn_base,
2773 ibdev->steer_qpn_base +
2774 ibdev->steer_qpn_count - 1);
2775 if (err)
2776 goto err_steer_free_bitmap;
2777 }
2778
2779 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2780 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2781
2782 if (mlx4_ib_alloc_diag_counters(ibdev))
2783 goto err_steer_free_bitmap;
2784
2785 if (ib_register_device(&ibdev->ib_dev, NULL))
2786 goto err_diag_counters;
2787
2788 if (mlx4_ib_mad_init(ibdev))
2789 goto err_reg;
2790
2791 if (mlx4_ib_init_sriov(ibdev))
2792 goto err_mad;
2793
2794 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE ||
2795 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2796 if (!iboe->nb.notifier_call) {
2797 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2798 err = register_netdevice_notifier(&iboe->nb);
2799 if (err) {
2800 iboe->nb.notifier_call = NULL;
2801 goto err_notif;
2802 }
2803 }
2804 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2805 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT);
2806 if (err) {
2807 goto err_notif;
2808 }
2809 }
2810 }
2811
2812 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
2813 if (device_create_file(&ibdev->ib_dev.dev,
2814 mlx4_class_attributes[j]))
2815 goto err_notif;
2816 }
2817
2818 ibdev->ib_active = true;
2819
2820 if (mlx4_is_mfunc(ibdev->dev))
2821 init_pkeys(ibdev);
2822
2823 /* create paravirt contexts for any VFs which are active */
2824 if (mlx4_is_master(ibdev->dev)) {
2825 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2826 if (j == mlx4_master_func_num(ibdev->dev))
2827 continue;
2828 if (mlx4_is_slave_active(ibdev->dev, j))
2829 do_slave_init(ibdev, j, 1);
2830 }
2831 }
2832 return ibdev;
2833
2834 err_notif:
2835 if (ibdev->iboe.nb.notifier_call) {
2836 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2837 pr_warn("failure unregistering notifier\n");
2838 ibdev->iboe.nb.notifier_call = NULL;
2839 }
2840 flush_workqueue(wq);
2841
2842 mlx4_ib_close_sriov(ibdev);
2843
2844 err_mad:
2845 mlx4_ib_mad_cleanup(ibdev);
2846
2847 err_reg:
2848 ib_unregister_device(&ibdev->ib_dev);
2849
2850 err_diag_counters:
2851 mlx4_ib_diag_cleanup(ibdev);
2852
2853 err_steer_free_bitmap:
2854 kfree(ibdev->ib_uc_qpns_bitmap);
2855
2856 err_steer_qp_release:
2857 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2858 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2859 ibdev->steer_qpn_count);
2860 err_counter:
2861 for (i = 0; i < ibdev->num_ports; ++i)
2862 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2863
2864 err_map:
2865 iounmap(ibdev->uar_map);
2866
2867 err_uar:
2868 mlx4_uar_free(dev, &ibdev->priv_uar);
2869
2870 err_pd:
2871 mlx4_pd_free(dev, ibdev->priv_pdn);
2872
2873 err_dealloc:
2874 ib_dealloc_device(&ibdev->ib_dev);
2875
2876 return NULL;
2877 }
2878
mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev * dev,int count,int * qpn)2879 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2880 {
2881 int offset;
2882
2883 WARN_ON(!dev->ib_uc_qpns_bitmap);
2884
2885 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2886 dev->steer_qpn_count,
2887 get_count_order(count));
2888 if (offset < 0)
2889 return offset;
2890
2891 *qpn = dev->steer_qpn_base + offset;
2892 return 0;
2893 }
2894
mlx4_ib_steer_qp_free(struct mlx4_ib_dev * dev,u32 qpn,int count)2895 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2896 {
2897 if (!qpn ||
2898 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2899 return;
2900
2901 BUG_ON(qpn < dev->steer_qpn_base);
2902
2903 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2904 qpn - dev->steer_qpn_base,
2905 get_count_order(count));
2906 }
2907
mlx4_ib_steer_qp_reg(struct mlx4_ib_dev * mdev,struct mlx4_ib_qp * mqp,int is_attach)2908 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2909 int is_attach)
2910 {
2911 int err;
2912 size_t flow_size;
2913 struct ib_flow_attr *flow = NULL;
2914 struct ib_flow_spec_ib *ib_spec;
2915
2916 if (is_attach) {
2917 flow_size = sizeof(struct ib_flow_attr) +
2918 sizeof(struct ib_flow_spec_ib);
2919 flow = kzalloc(flow_size, GFP_KERNEL);
2920 if (!flow)
2921 return -ENOMEM;
2922 flow->port = mqp->port;
2923 flow->num_of_specs = 1;
2924 flow->size = flow_size;
2925 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2926 ib_spec->type = IB_FLOW_SPEC_IB;
2927 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2928 /* Add an empty rule for IB L2 */
2929 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2930
2931 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2932 IB_FLOW_DOMAIN_NIC,
2933 MLX4_FS_REGULAR,
2934 &mqp->reg_id);
2935 } else {
2936 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2937 }
2938 kfree(flow);
2939 return err;
2940 }
2941
mlx4_ib_remove(struct mlx4_dev * dev,void * ibdev_ptr)2942 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2943 {
2944 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2945 int p;
2946
2947 ibdev->ib_active = false;
2948 flush_workqueue(wq);
2949
2950 mlx4_ib_close_sriov(ibdev);
2951 mlx4_ib_mad_cleanup(ibdev);
2952 ib_unregister_device(&ibdev->ib_dev);
2953 mlx4_ib_diag_cleanup(ibdev);
2954 if (ibdev->iboe.nb.notifier_call) {
2955 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2956 pr_warn("failure unregistering notifier\n");
2957 ibdev->iboe.nb.notifier_call = NULL;
2958 }
2959
2960 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2961 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2962 ibdev->steer_qpn_count);
2963 kfree(ibdev->ib_uc_qpns_bitmap);
2964 }
2965
2966 iounmap(ibdev->uar_map);
2967 for (p = 0; p < ibdev->num_ports; ++p)
2968 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
2969
2970 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
2971 mlx4_CLOSE_PORT(dev, p);
2972
2973 mlx4_ib_free_eqs(dev, ibdev);
2974
2975 mlx4_uar_free(dev, &ibdev->priv_uar);
2976 mlx4_pd_free(dev, ibdev->priv_pdn);
2977 ib_dealloc_device(&ibdev->ib_dev);
2978 }
2979
do_slave_init(struct mlx4_ib_dev * ibdev,int slave,int do_init)2980 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2981 {
2982 struct mlx4_ib_demux_work **dm = NULL;
2983 struct mlx4_dev *dev = ibdev->dev;
2984 int i;
2985 unsigned long flags;
2986 struct mlx4_active_ports actv_ports;
2987 unsigned int ports;
2988 unsigned int first_port;
2989
2990 if (!mlx4_is_master(dev))
2991 return;
2992
2993 actv_ports = mlx4_get_active_ports(dev, slave);
2994 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2995 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2996
2997 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
2998 if (!dm) {
2999 pr_err("failed to allocate memory for tunneling qp update\n");
3000 return;
3001 }
3002
3003 for (i = 0; i < ports; i++) {
3004 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
3005 if (!dm[i]) {
3006 pr_err("failed to allocate memory for tunneling qp update work struct\n");
3007 while (--i >= 0)
3008 kfree(dm[i]);
3009 goto out;
3010 }
3011 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
3012 dm[i]->port = first_port + i + 1;
3013 dm[i]->slave = slave;
3014 dm[i]->do_init = do_init;
3015 dm[i]->dev = ibdev;
3016 }
3017 /* initialize or tear down tunnel QPs for the slave */
3018 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
3019 if (!ibdev->sriov.is_going_down) {
3020 for (i = 0; i < ports; i++)
3021 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
3022 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3023 } else {
3024 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3025 for (i = 0; i < ports; i++)
3026 kfree(dm[i]);
3027 }
3028 out:
3029 kfree(dm);
3030 return;
3031 }
3032
mlx4_ib_handle_catas_error(struct mlx4_ib_dev * ibdev)3033 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
3034 {
3035 struct mlx4_ib_qp *mqp;
3036 unsigned long flags_qp;
3037 unsigned long flags_cq;
3038 struct mlx4_ib_cq *send_mcq, *recv_mcq;
3039 struct list_head cq_notify_list;
3040 struct mlx4_cq *mcq;
3041 unsigned long flags;
3042
3043 pr_warn("mlx4_ib_handle_catas_error was started\n");
3044 INIT_LIST_HEAD(&cq_notify_list);
3045
3046 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
3047 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
3048
3049 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
3050 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
3051 if (mqp->sq.tail != mqp->sq.head) {
3052 send_mcq = to_mcq(mqp->ibqp.send_cq);
3053 spin_lock_irqsave(&send_mcq->lock, flags_cq);
3054 if (send_mcq->mcq.comp &&
3055 mqp->ibqp.send_cq->comp_handler) {
3056 if (!send_mcq->mcq.reset_notify_added) {
3057 send_mcq->mcq.reset_notify_added = 1;
3058 list_add_tail(&send_mcq->mcq.reset_notify,
3059 &cq_notify_list);
3060 }
3061 }
3062 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
3063 }
3064 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
3065 /* Now, handle the QP's receive queue */
3066 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
3067 /* no handling is needed for SRQ */
3068 if (!mqp->ibqp.srq) {
3069 if (mqp->rq.tail != mqp->rq.head) {
3070 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
3071 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
3072 if (recv_mcq->mcq.comp &&
3073 mqp->ibqp.recv_cq->comp_handler) {
3074 if (!recv_mcq->mcq.reset_notify_added) {
3075 recv_mcq->mcq.reset_notify_added = 1;
3076 list_add_tail(&recv_mcq->mcq.reset_notify,
3077 &cq_notify_list);
3078 }
3079 }
3080 spin_unlock_irqrestore(&recv_mcq->lock,
3081 flags_cq);
3082 }
3083 }
3084 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
3085 }
3086
3087 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
3088 mcq->comp(mcq);
3089 }
3090 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
3091 pr_warn("mlx4_ib_handle_catas_error ended\n");
3092 }
3093
handle_bonded_port_state_event(struct work_struct * work)3094 static void handle_bonded_port_state_event(struct work_struct *work)
3095 {
3096 struct ib_event_work *ew =
3097 container_of(work, struct ib_event_work, work);
3098 struct mlx4_ib_dev *ibdev = ew->ib_dev;
3099 enum ib_port_state bonded_port_state = IB_PORT_NOP;
3100 int i;
3101 struct ib_event ibev;
3102
3103 kfree(ew);
3104 spin_lock_bh(&ibdev->iboe.lock);
3105 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
3106 struct ifnet *curr_netdev = ibdev->iboe.netdevs[i];
3107 enum ib_port_state curr_port_state;
3108
3109 if (!curr_netdev)
3110 continue;
3111
3112 curr_port_state =
3113 ((curr_netdev->if_drv_flags & IFF_DRV_RUNNING) != 0 &&
3114 curr_netdev->if_link_state == LINK_STATE_UP) ?
3115 IB_PORT_ACTIVE : IB_PORT_DOWN;
3116
3117 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
3118 curr_port_state : IB_PORT_ACTIVE;
3119 }
3120 spin_unlock_bh(&ibdev->iboe.lock);
3121
3122 ibev.device = &ibdev->ib_dev;
3123 ibev.element.port_num = 1;
3124 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
3125 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3126
3127 ib_dispatch_event(&ibev);
3128 }
3129
mlx4_ib_sl2vl_update(struct mlx4_ib_dev * mdev,int port)3130 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port)
3131 {
3132 u64 sl2vl;
3133 int err;
3134
3135 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl);
3136 if (err) {
3137 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n",
3138 port, err);
3139 sl2vl = 0;
3140 }
3141 atomic64_set(&mdev->sl2vl[port - 1], sl2vl);
3142 }
3143
ib_sl2vl_update_work(struct work_struct * work)3144 static void ib_sl2vl_update_work(struct work_struct *work)
3145 {
3146 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
3147 struct mlx4_ib_dev *mdev = ew->ib_dev;
3148 int port = ew->port;
3149
3150 mlx4_ib_sl2vl_update(mdev, port);
3151
3152 kfree(ew);
3153 }
3154
mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev * ibdev,int port)3155 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
3156 int port)
3157 {
3158 struct ib_event_work *ew;
3159
3160 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3161 if (ew) {
3162 INIT_WORK(&ew->work, ib_sl2vl_update_work);
3163 ew->port = port;
3164 ew->ib_dev = ibdev;
3165 queue_work(wq, &ew->work);
3166 } else {
3167 pr_err("failed to allocate memory for sl2vl update work\n");
3168 }
3169 }
3170
mlx4_ib_event(struct mlx4_dev * dev,void * ibdev_ptr,enum mlx4_dev_event event,unsigned long param)3171 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
3172 enum mlx4_dev_event event, unsigned long param)
3173 {
3174 struct ib_event ibev;
3175 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
3176 struct mlx4_eqe *eqe = NULL;
3177 struct ib_event_work *ew;
3178 int p = 0;
3179
3180 if (mlx4_is_bonded(dev) &&
3181 ((event == MLX4_DEV_EVENT_PORT_UP) ||
3182 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
3183 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3184 if (!ew)
3185 return;
3186 INIT_WORK(&ew->work, handle_bonded_port_state_event);
3187 ew->ib_dev = ibdev;
3188 queue_work(wq, &ew->work);
3189 return;
3190 }
3191
3192 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
3193 eqe = (struct mlx4_eqe *)param;
3194 else
3195 p = (int) param;
3196
3197 switch (event) {
3198 case MLX4_DEV_EVENT_PORT_UP:
3199 if (p > ibdev->num_ports)
3200 return;
3201 if (!mlx4_is_slave(dev) &&
3202 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
3203 IB_LINK_LAYER_INFINIBAND) {
3204 if (mlx4_is_master(dev))
3205 mlx4_ib_invalidate_all_guid_record(ibdev, p);
3206 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST &&
3207 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT))
3208 mlx4_sched_ib_sl2vl_update_work(ibdev, p);
3209 }
3210 ibev.event = IB_EVENT_PORT_ACTIVE;
3211 break;
3212
3213 case MLX4_DEV_EVENT_PORT_DOWN:
3214 if (p > ibdev->num_ports)
3215 return;
3216 ibev.event = IB_EVENT_PORT_ERR;
3217 break;
3218
3219 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3220 ibdev->ib_active = false;
3221 ibev.event = IB_EVENT_DEVICE_FATAL;
3222 mlx4_ib_handle_catas_error(ibdev);
3223 break;
3224
3225 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3226 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3227 if (!ew) {
3228 pr_err("failed to allocate memory for events work\n");
3229 break;
3230 }
3231
3232 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3233 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
3234 ew->ib_dev = ibdev;
3235 /* need to queue only for port owner, which uses GEN_EQE */
3236 if (mlx4_is_master(dev))
3237 queue_work(wq, &ew->work);
3238 else
3239 handle_port_mgmt_change_event(&ew->work);
3240 return;
3241
3242 case MLX4_DEV_EVENT_SLAVE_INIT:
3243 /* here, p is the slave id */
3244 do_slave_init(ibdev, p, 1);
3245 if (mlx4_is_master(dev)) {
3246 int i;
3247
3248 for (i = 1; i <= ibdev->num_ports; i++) {
3249 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3250 == IB_LINK_LAYER_INFINIBAND)
3251 mlx4_ib_slave_alias_guid_event(ibdev,
3252 p, i,
3253 1);
3254 }
3255 }
3256 return;
3257
3258 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
3259 if (mlx4_is_master(dev)) {
3260 int i;
3261
3262 for (i = 1; i <= ibdev->num_ports; i++) {
3263 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3264 == IB_LINK_LAYER_INFINIBAND)
3265 mlx4_ib_slave_alias_guid_event(ibdev,
3266 p, i,
3267 0);
3268 }
3269 }
3270 /* here, p is the slave id */
3271 do_slave_init(ibdev, p, 0);
3272 return;
3273
3274 default:
3275 return;
3276 }
3277
3278 ibev.device = ibdev_ptr;
3279 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
3280
3281 ib_dispatch_event(&ibev);
3282 }
3283
3284 static struct mlx4_interface mlx4_ib_interface = {
3285 .add = mlx4_ib_add,
3286 .remove = mlx4_ib_remove,
3287 .event = mlx4_ib_event,
3288 .protocol = MLX4_PROT_IB_IPV6,
3289 .flags = MLX4_INTFF_BONDING
3290 };
3291
mlx4_ib_init(void)3292 static int __init mlx4_ib_init(void)
3293 {
3294 int err;
3295
3296 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM);
3297 if (!wq)
3298 return -ENOMEM;
3299
3300 err = mlx4_ib_mcg_init();
3301 if (err)
3302 goto clean_wq;
3303
3304 err = mlx4_register_interface(&mlx4_ib_interface);
3305 if (err)
3306 goto clean_mcg;
3307
3308 return 0;
3309
3310 clean_mcg:
3311 mlx4_ib_mcg_destroy();
3312
3313 clean_wq:
3314 destroy_workqueue(wq);
3315 return err;
3316 }
3317
mlx4_ib_cleanup(void)3318 static void __exit mlx4_ib_cleanup(void)
3319 {
3320 mlx4_unregister_interface(&mlx4_ib_interface);
3321 mlx4_ib_mcg_destroy();
3322 destroy_workqueue(wq);
3323 }
3324
3325 module_init_order(mlx4_ib_init, SI_ORDER_SEVENTH);
3326 module_exit_order(mlx4_ib_cleanup, SI_ORDER_SEVENTH);
3327
3328 static int
mlx4ib_evhand(module_t mod,int event,void * arg)3329 mlx4ib_evhand(module_t mod, int event, void *arg)
3330 {
3331 return (0);
3332 }
3333
3334 static moduledata_t mlx4ib_mod = {
3335 .name = "mlx4ib",
3336 .evhand = mlx4ib_evhand,
3337 };
3338
3339 DECLARE_MODULE(mlx4ib, mlx4ib_mod, SI_SUB_LAST, SI_ORDER_ANY);
3340 MODULE_DEPEND(mlx4ib, mlx4, 1, 1, 1);
3341 MODULE_DEPEND(mlx4ib, ibcore, 1, 1, 1);
3342 MODULE_DEPEND(mlx4ib, linuxkpi, 1, 1, 1);
3343