1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 * THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31
32 #ifndef ECORE_SP_H
33 #define ECORE_SP_H
34
35
36 #include <sys/types.h>
37 #include <sys/endian.h>
38 #include <sys/param.h>
39 #include <sys/lock.h>
40 #include <sys/mutex.h>
41 #include <sys/malloc.h>
42 #include <sys/kernel.h>
43 #include <machine/bus.h>
44 #include <net/ethernet.h>
45
46 #if _BYTE_ORDER == _LITTLE_ENDIAN
47 #ifndef LITTLE_ENDIAN
48 #define LITTLE_ENDIAN
49 #endif
50 #ifndef __LITTLE_ENDIAN
51 #define __LITTLE_ENDIAN
52 #endif
53 #undef BIG_ENDIAN
54 #undef __BIG_ENDIAN
55 #else /* _BIG_ENDIAN */
56 #ifndef BIG_ENDIAN
57 #define BIG_ENDIAN
58 #endif
59 #ifndef __BIG_ENDIAN
60 #define __BIG_ENDIAN
61 #endif
62 #undef LITTLE_ENDIAN
63 #undef __LITTLE_ENDIAN
64 #endif
65
66 #include "ecore_mfw_req.h"
67 #include "ecore_fw_defs.h"
68 #include "ecore_hsi.h"
69 #include "ecore_reg.h"
70
71 struct bxe_softc;
72 typedef bus_addr_t ecore_dma_addr_t; /* expected to be 64 bit wide */
73 typedef volatile int ecore_atomic_t;
74
75 #ifndef __bool_true_false_are_defined
76 #ifndef __cplusplus
77 #define bool _Bool
78 #if __STDC_VERSION__ < 199901L && __GNUC__ < 3 && !defined(__INTEL_COMPILER)
79 typedef _Bool bool;
80 #endif
81 #endif /* !__cplusplus */
82 #endif /* !__bool_true_false_are_defined$ */
83
84 #define ETH_ALEN ETHER_ADDR_LEN /* 6 */
85
86 #define ECORE_SWCID_SHIFT 17
87 #define ECORE_SWCID_MASK ((0x1 << ECORE_SWCID_SHIFT) - 1)
88
89 #define ECORE_MC_HASH_SIZE 8
90 #define ECORE_MC_HASH_OFFSET(sc, i) \
91 (BAR_TSTRORM_INTMEM + \
92 TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(FUNC_ID(sc)) + i*4)
93
94 #define ECORE_MAX_MULTICAST 64
95 #define ECORE_MAX_EMUL_MULTI 1
96
97 #define IRO sc->iro_array
98
99 typedef struct mtx ECORE_MUTEX;
100 #define ECORE_MUTEX_INIT(_mutex) \
101 mtx_init(_mutex, "ecore_lock", "ECORE Lock", MTX_DEF)
102 #define ECORE_MUTEX_LOCK(_mutex) mtx_lock(_mutex)
103 #define ECORE_MUTEX_UNLOCK(_mutex) mtx_unlock(_mutex)
104
105 typedef struct mtx ECORE_MUTEX_SPIN;
106 #define ECORE_SPIN_LOCK_INIT(_spin, _sc) \
107 mtx_init(_spin, "ecore_lock", "ECORE Lock", MTX_DEF)
108 #define ECORE_SPIN_LOCK_BH(_spin) mtx_lock(_spin) /* bh = bottom-half */
109 #define ECORE_SPIN_UNLOCK_BH(_spin) mtx_unlock(_spin) /* bh = bottom-half */
110
111 #define ECORE_SMP_MB_AFTER_CLEAR_BIT() mb()
112 #define ECORE_SMP_MB_BEFORE_CLEAR_BIT() mb()
113 #define ECORE_SMP_MB() mb()
114 #define ECORE_SMP_RMB() rmb()
115 #define ECORE_SMP_WMB() wmb()
116 #define ECORE_MMIOWB() wmb()
117
118 #define ECORE_SET_BIT_NA(bit, var) bit_set(var, bit) /* non-atomic */
119 #define ECORE_CLEAR_BIT_NA(bit, var) bit_clear(var, bit) /* non-atomic */
120 #define ECORE_TEST_BIT(bit, var) bxe_test_bit(bit, var)
121 #define ECORE_SET_BIT(bit, var) bxe_set_bit(bit, var)
122 #define ECORE_CLEAR_BIT(bit, var) bxe_clear_bit(bit, var)
123 #define ECORE_TEST_AND_CLEAR_BIT(bit, var) bxe_test_and_clear_bit(bit, var)
124
125 #define ECORE_ATOMIC_READ(a) atomic_load_acq_int((volatile int *)a)
126 #define ECORE_ATOMIC_SET(a, v) atomic_store_rel_int((volatile int *)a, v)
127 #define ECORE_ATOMIC_CMPXCHG(a, o, n) bxe_cmpxchg((volatile int *)a, o, n)
128
129 #define ECORE_RET_PENDING(pending_bit, pending) \
130 (ECORE_TEST_BIT(pending_bit, pending) ? ECORE_PENDING : ECORE_SUCCESS)
131
132 #define ECORE_SET_FLAG(value, mask, flag) \
133 do { \
134 (value) &= ~(mask); \
135 (value) |= ((flag) << (mask##_SHIFT)); \
136 } while (0)
137
138 #define ECORE_GET_FLAG(value, mask) \
139 (((value) &= (mask)) >> (mask##_SHIFT))
140
141 #define ECORE_MIGHT_SLEEP()
142
143 #define ECORE_FCOE_CID(sc) ((sc)->fp[FCOE_IDX(sc)].cl_id)
144
145 #define ECORE_MEMCMP(_a, _b, _s) memcmp(_a, _b, _s)
146 #define ECORE_MEMCPY(_a, _b, _s) memcpy(_a, _b, _s)
147 #define ECORE_MEMSET(_a, _c, _s) memset(_a, _c, _s)
148
149 #define ECORE_CPU_TO_LE16(x) htole16(x)
150 #define ECORE_CPU_TO_LE32(x) htole32(x)
151
152 #define ECORE_WAIT(_s, _t) DELAY(1000)
153 #define ECORE_MSLEEP(_t) DELAY((_t) * 1000)
154
155 #define ECORE_LIKELY(x) __predict_true(x)
156 #define ECORE_UNLIKELY(x) __predict_false(x)
157
158 #define ECORE_ZALLOC(_size, _flags, _sc) \
159 malloc(_size, M_TEMP, (M_NOWAIT | M_ZERO))
160
161 #define ECORE_CALLOC(_len, _size, _flags, _sc) \
162 mallocarray(_len, _size, M_TEMP, (M_NOWAIT | M_ZERO))
163
164 #define ECORE_FREE(_s, _buf, _size) free(_buf, M_TEMP)
165
166 #define SC_ILT(sc) ((sc)->ilt)
167 #define ILOG2(x) bxe_ilog2(x)
168
169 #define ECORE_ILT_ZALLOC(x, y, size) \
170 do { \
171 x = malloc(sizeof(struct bxe_dma), M_DEVBUF, (M_NOWAIT | M_ZERO)); \
172 if (x) { \
173 if (bxe_dma_alloc((struct bxe_softc *)sc, \
174 size, (struct bxe_dma *)x, \
175 "ECORE_ILT") != 0) { \
176 free(x, M_DEVBUF); \
177 x = NULL; \
178 *y = 0; \
179 } else { \
180 *y = ((struct bxe_dma *)x)->paddr; \
181 } \
182 } \
183 } while (0)
184
185 #define ECORE_ILT_FREE(x, y, size) \
186 do { \
187 if (x) { \
188 bxe_dma_free((struct bxe_softc *)sc, x); \
189 free(x, M_DEVBUF); \
190 x = NULL; \
191 y = 0; \
192 } \
193 } while (0)
194
195 #define ECORE_IS_VALID_ETHER_ADDR(_mac) TRUE
196
197 #define ECORE_IS_MF_SD_MODE IS_MF_SD_MODE
198 #define ECORE_IS_MF_SI_MODE IS_MF_SI_MODE
199 #define ECORE_IS_MF_AFEX_MODE IS_MF_AFEX_MODE
200
201 #define ECORE_SET_CTX_VALIDATION bxe_set_ctx_validation
202
203 #define ECORE_UPDATE_COALESCE_SB_INDEX bxe_update_coalesce_sb_index
204
205 #define ECORE_ALIGN(x, a) ((((x) + (a) - 1) / (a)) * (a))
206
207 #define ECORE_REG_WR_DMAE_LEN REG_WR_DMAE_LEN
208
209 #define ECORE_PATH_ID SC_PATH
210 #define ECORE_PORT_ID SC_PORT
211 #define ECORE_FUNC_ID SC_FUNC
212 #define ECORE_ABS_FUNC_ID SC_ABS_FUNC
213
214 uint32_t calc_crc32(uint8_t *crc32_packet, uint32_t crc32_length,
215 uint32_t crc32_seed, uint8_t complement);
216 static inline uint32_t
ECORE_CRC32_LE(uint32_t seed,uint8_t * mac,uint32_t len)217 ECORE_CRC32_LE(uint32_t seed, uint8_t *mac, uint32_t len)
218 {
219 uint32_t packet_buf[2] = {0};
220 memcpy(((uint8_t *)(&packet_buf[0]))+2, &mac[0], 2);
221 memcpy(&packet_buf[1], &mac[2], 4);
222 return bswap32(calc_crc32((uint8_t *)packet_buf, 8, seed, 0));
223 }
224
225 #define ecore_sp_post(_sc, _a, _b, _c, _d) \
226 bxe_sp_post(_sc, _a, _b, U64_HI(_c), U64_LO(_c), _d)
227
228 #ifdef ECORE_STOP_ON_ERROR
229
230 #define ECORE_DBG_BREAK_IF(exp) \
231 do { \
232 if (__predict_false(exp)) { \
233 panic("ECORE"); \
234 } \
235 } while (0)
236
237 #define ECORE_BUG() \
238 do { \
239 panic("BUG (%s:%d)", __FILE__, __LINE__); \
240 } while(0);
241
242 #define ECORE_BUG_ON(exp) \
243 do { \
244 if (__predict_true(exp)) { \
245 panic("BUG_ON (%s:%d)", __FILE__, __LINE__); \
246 } \
247 } while (0)
248
249 #else
250
251
252 extern unsigned long bxe_debug;
253 #define BXE_DEBUG_ECORE_DBG_BREAK_IF 0x01
254 #define BXE_DEBUG_ECORE_BUG 0x02
255 #define BXE_DEBUG_ECORE_BUG_ON 0x04
256
257 #define ECORE_DBG_BREAK_IF(exp) \
258 if (bxe_debug & BXE_DEBUG_ECORE_DBG_BREAK_IF) \
259 printf("%s (%s,%d)\n", __FUNCTION__, __FILE__, __LINE__);
260
261 #define ECORE_BUG(exp) \
262 if (bxe_debug & BXE_DEBUG_ECORE_BUG) \
263 printf("%s (%s,%d)\n", __FUNCTION__, __FILE__, __LINE__);
264
265 #define ECORE_BUG_ON(exp) \
266 if (bxe_debug & BXE_DEBUG_ECORE_BUG_ON) \
267 printf("%s (%s,%d)\n", __FUNCTION__, __FILE__, __LINE__);
268
269
270 #endif /* #ifdef ECORE_STOP_ON_ERROR */
271
272 #define ECORE_ERR(str, ...) \
273 BLOGE(sc, "ECORE: " str, ##__VA_ARGS__)
274
275 #define DBG_SP 0x00000004 /* defined in bxe.h */
276
277 #define ECORE_MSG(sc, m, ...) \
278 BLOGD(sc, DBG_SP, "ECORE: " m, ##__VA_ARGS__)
279
280 typedef struct _ecore_list_entry_t
281 {
282 struct _ecore_list_entry_t *next, *prev;
283 } ecore_list_entry_t;
284
285 typedef struct ecore_list_t
286 {
287 ecore_list_entry_t *head, *tail;
288 unsigned long cnt;
289 } ecore_list_t;
290
291 /* initialize the list */
292 #define ECORE_LIST_INIT(_list) \
293 do { \
294 (_list)->head = NULL; \
295 (_list)->tail = NULL; \
296 (_list)->cnt = 0; \
297 } while (0)
298
299 /* return TRUE if the element is the last on the list */
300 #define ECORE_LIST_IS_LAST(_elem, _list) \
301 (_elem == (_list)->tail)
302
303 /* return TRUE if the list is empty */
304 #define ECORE_LIST_IS_EMPTY(_list) \
305 ((_list)->cnt == 0)
306
307 /* return the first element */
308 #define ECORE_LIST_FIRST_ENTRY(_list, cast, _link) \
309 (cast *)((_list)->head)
310
311 /* return the next element */
312 #define ECORE_LIST_NEXT(_elem, _link, cast) \
313 (cast *)((&((_elem)->_link))->next)
314
315 /* push an element on the head of the list */
316 #define ECORE_LIST_PUSH_HEAD(_elem, _list) \
317 do { \
318 (_elem)->prev = (ecore_list_entry_t *)0; \
319 (_elem)->next = (_list)->head; \
320 if ((_list)->tail == (ecore_list_entry_t *)0) { \
321 (_list)->tail = (_elem); \
322 } else { \
323 (_list)->head->prev = (_elem); \
324 } \
325 (_list)->head = (_elem); \
326 (_list)->cnt++; \
327 } while (0)
328
329 /* push an element on the tail of the list */
330 #define ECORE_LIST_PUSH_TAIL(_elem, _list) \
331 do { \
332 (_elem)->next = (ecore_list_entry_t *)0; \
333 (_elem)->prev = (_list)->tail; \
334 if ((_list)->tail) { \
335 (_list)->tail->next = (_elem); \
336 } else { \
337 (_list)->head = (_elem); \
338 } \
339 (_list)->tail = (_elem); \
340 (_list)->cnt++; \
341 } while (0)
342
343 /* push list1 on the head of list2 and return with list1 as empty */
344 #define ECORE_LIST_SPLICE_INIT(_list1, _list2) \
345 do { \
346 (_list1)->tail->next = (_list2)->head; \
347 if ((_list2)->head) { \
348 (_list2)->head->prev = (_list1)->tail; \
349 } else { \
350 (_list2)->tail = (_list1)->tail; \
351 } \
352 (_list2)->head = (_list1)->head; \
353 (_list2)->cnt += (_list1)->cnt; \
354 (_list1)->head = NULL; \
355 (_list1)->tail = NULL; \
356 (_list1)->cnt = 0; \
357 } while (0)
358
359 /* remove an element from the list */
360 #define ECORE_LIST_REMOVE_ENTRY(_elem, _list) \
361 do { \
362 if ((_list)->head == (_elem)) { \
363 if ((_list)->head) { \
364 (_list)->head = (_list)->head->next; \
365 if ((_list)->head) { \
366 (_list)->head->prev = (ecore_list_entry_t *)0; \
367 } else { \
368 (_list)->tail = (ecore_list_entry_t *)0; \
369 } \
370 (_list)->cnt--; \
371 } \
372 } else if ((_list)->tail == (_elem)) { \
373 if ((_list)->tail) { \
374 (_list)->tail = (_list)->tail->prev; \
375 if ((_list)->tail) { \
376 (_list)->tail->next = (ecore_list_entry_t *)0; \
377 } else { \
378 (_list)->head = (ecore_list_entry_t *)0; \
379 } \
380 (_list)->cnt--; \
381 } \
382 } else { \
383 (_elem)->prev->next = (_elem)->next; \
384 (_elem)->next->prev = (_elem)->prev; \
385 (_list)->cnt--; \
386 } \
387 } while (0)
388
389 /* walk the list */
390 #define ECORE_LIST_FOR_EACH_ENTRY(pos, _list, _link, cast) \
391 for (pos = ECORE_LIST_FIRST_ENTRY(_list, cast, _link); \
392 pos; \
393 pos = ECORE_LIST_NEXT(pos, _link, cast))
394
395 /* walk the list (safely) */
396 #define ECORE_LIST_FOR_EACH_ENTRY_SAFE(pos, n, _list, _link, cast) \
397 for (pos = ECORE_LIST_FIRST_ENTRY(_list, cast, _lint), \
398 n = (pos) ? ECORE_LIST_NEXT(pos, _link, cast) : NULL; \
399 pos != NULL; \
400 pos = (cast *)n, \
401 n = (pos) ? ECORE_LIST_NEXT(pos, _link, cast) : NULL)
402
403
404 /* Manipulate a bit vector defined as an array of uint64_t */
405
406 /* Number of bits in one sge_mask array element */
407 #define BIT_VEC64_ELEM_SZ 64
408 #define BIT_VEC64_ELEM_SHIFT 6
409 #define BIT_VEC64_ELEM_MASK ((uint64_t)BIT_VEC64_ELEM_SZ - 1)
410
411 #define __BIT_VEC64_SET_BIT(el, bit) \
412 do { \
413 el = ((el) | ((uint64_t)0x1 << (bit))); \
414 } while (0)
415
416 #define __BIT_VEC64_CLEAR_BIT(el, bit) \
417 do { \
418 el = ((el) & (~((uint64_t)0x1 << (bit)))); \
419 } while (0)
420
421 #define BIT_VEC64_SET_BIT(vec64, idx) \
422 __BIT_VEC64_SET_BIT((vec64)[(idx) >> BIT_VEC64_ELEM_SHIFT], \
423 (idx) & BIT_VEC64_ELEM_MASK)
424
425 #define BIT_VEC64_CLEAR_BIT(vec64, idx) \
426 __BIT_VEC64_CLEAR_BIT((vec64)[(idx) >> BIT_VEC64_ELEM_SHIFT], \
427 (idx) & BIT_VEC64_ELEM_MASK)
428
429 #define BIT_VEC64_TEST_BIT(vec64, idx) \
430 (((vec64)[(idx) >> BIT_VEC64_ELEM_SHIFT] >> \
431 ((idx) & BIT_VEC64_ELEM_MASK)) & 0x1)
432
433 /*
434 * Creates a bitmask of all ones in less significant bits.
435 * idx - index of the most significant bit in the created mask
436 */
437 #define BIT_VEC64_ONES_MASK(idx) \
438 (((uint64_t)0x1 << (((idx) & BIT_VEC64_ELEM_MASK) + 1)) - 1)
439 #define BIT_VEC64_ELEM_ONE_MASK ((uint64_t)(~0))
440
441 /* fill in a MAC address the way the FW likes it */
442 static inline void
ecore_set_fw_mac_addr(uint16_t * fw_hi,uint16_t * fw_mid,uint16_t * fw_lo,uint8_t * mac)443 ecore_set_fw_mac_addr(uint16_t *fw_hi,
444 uint16_t *fw_mid,
445 uint16_t *fw_lo,
446 uint8_t *mac)
447 {
448 ((uint8_t *)fw_hi)[0] = mac[1];
449 ((uint8_t *)fw_hi)[1] = mac[0];
450 ((uint8_t *)fw_mid)[0] = mac[3];
451 ((uint8_t *)fw_mid)[1] = mac[2];
452 ((uint8_t *)fw_lo)[0] = mac[5];
453 ((uint8_t *)fw_lo)[1] = mac[4];
454 }
455
456
457 enum ecore_status_t {
458 ECORE_EXISTS = -6,
459 ECORE_IO = -5,
460 ECORE_TIMEOUT = -4,
461 ECORE_INVAL = -3,
462 ECORE_BUSY = -2,
463 ECORE_NOMEM = -1,
464 ECORE_SUCCESS = 0,
465 /* PENDING is not an error and should be positive */
466 ECORE_PENDING = 1,
467 };
468
469 enum {
470 SWITCH_UPDATE,
471 AFEX_UPDATE,
472 };
473
474
475
476
477 struct bxe_softc;
478 struct eth_context;
479
480 /* Bits representing general command's configuration */
481 enum {
482 RAMROD_TX,
483 RAMROD_RX,
484 /* Wait until all pending commands complete */
485 RAMROD_COMP_WAIT,
486 /* Don't send a ramrod, only update a registry */
487 RAMROD_DRV_CLR_ONLY,
488 /* Configure HW according to the current object state */
489 RAMROD_RESTORE,
490 /* Execute the next command now */
491 RAMROD_EXEC,
492 /* Don't add a new command and continue execution of posponed
493 * commands. If not set a new command will be added to the
494 * pending commands list.
495 */
496 RAMROD_CONT,
497 /* If there is another pending ramrod, wait until it finishes and
498 * re-try to submit this one. This flag can be set only in sleepable
499 * context, and should not be set from the context that completes the
500 * ramrods as deadlock will occur.
501 */
502 RAMROD_RETRY,
503 };
504
505 typedef enum {
506 ECORE_OBJ_TYPE_RX,
507 ECORE_OBJ_TYPE_TX,
508 ECORE_OBJ_TYPE_RX_TX,
509 } ecore_obj_type;
510
511 /* Public slow path states */
512 enum {
513 ECORE_FILTER_MAC_PENDING,
514 ECORE_FILTER_VLAN_PENDING,
515 ECORE_FILTER_VLAN_MAC_PENDING,
516 ECORE_FILTER_RX_MODE_PENDING,
517 ECORE_FILTER_RX_MODE_SCHED,
518 ECORE_FILTER_ISCSI_ETH_START_SCHED,
519 ECORE_FILTER_ISCSI_ETH_STOP_SCHED,
520 ECORE_FILTER_FCOE_ETH_START_SCHED,
521 ECORE_FILTER_FCOE_ETH_STOP_SCHED,
522 ECORE_FILTER_BYPASS_RX_MODE_PENDING,
523 ECORE_FILTER_BYPASS_MAC_PENDING,
524 ECORE_FILTER_BYPASS_RSS_CONF_PENDING,
525 ECORE_FILTER_MCAST_PENDING,
526 ECORE_FILTER_MCAST_SCHED,
527 ECORE_FILTER_RSS_CONF_PENDING,
528 ECORE_AFEX_FCOE_Q_UPDATE_PENDING,
529 ECORE_AFEX_PENDING_VIFSET_MCP_ACK,
530 ECORE_FILTER_VXLAN_PENDING
531 };
532
533 struct ecore_raw_obj {
534 uint8_t func_id;
535
536 /* Queue params */
537 uint8_t cl_id;
538 uint32_t cid;
539
540 /* Ramrod data buffer params */
541 void *rdata;
542 ecore_dma_addr_t rdata_mapping;
543
544 /* Ramrod state params */
545 int state; /* "ramrod is pending" state bit */
546 unsigned long *pstate; /* pointer to state buffer */
547
548 ecore_obj_type obj_type;
549
550 int (*wait_comp)(struct bxe_softc *sc,
551 struct ecore_raw_obj *o);
552
553 bool (*check_pending)(struct ecore_raw_obj *o);
554 void (*clear_pending)(struct ecore_raw_obj *o);
555 void (*set_pending)(struct ecore_raw_obj *o);
556 };
557
558 /************************* VLAN-MAC commands related parameters ***************/
559 struct ecore_mac_ramrod_data {
560 uint8_t mac[ETH_ALEN];
561 uint8_t is_inner_mac;
562 };
563
564 struct ecore_vlan_ramrod_data {
565 uint16_t vlan;
566 };
567
568 struct ecore_vlan_mac_ramrod_data {
569 uint8_t mac[ETH_ALEN];
570 uint8_t is_inner_mac;
571 uint16_t vlan;
572 };
573
574 struct ecore_vxlan_fltr_ramrod_data {
575 uint8_t innermac[ETH_ALEN];
576 uint32_t vni;
577 };
578
579 union ecore_classification_ramrod_data {
580 struct ecore_mac_ramrod_data mac;
581 struct ecore_vlan_ramrod_data vlan;
582 struct ecore_vlan_mac_ramrod_data vlan_mac;
583 struct ecore_vxlan_fltr_ramrod_data vxlan_fltr;
584 };
585
586 /* VLAN_MAC commands */
587 enum ecore_vlan_mac_cmd {
588 ECORE_VLAN_MAC_ADD,
589 ECORE_VLAN_MAC_DEL,
590 ECORE_VLAN_MAC_MOVE,
591 };
592
593 struct ecore_vlan_mac_data {
594 /* Requested command: ECORE_VLAN_MAC_XX */
595 enum ecore_vlan_mac_cmd cmd;
596 /* used to contain the data related vlan_mac_flags bits from
597 * ramrod parameters.
598 */
599 unsigned long vlan_mac_flags;
600
601 /* Needed for MOVE command */
602 struct ecore_vlan_mac_obj *target_obj;
603
604 union ecore_classification_ramrod_data u;
605 };
606
607 /*************************** Exe Queue obj ************************************/
608 union ecore_exe_queue_cmd_data {
609 struct ecore_vlan_mac_data vlan_mac;
610
611 struct {
612 /* TODO */
613 } mcast;
614 };
615
616 struct ecore_exeq_elem {
617 ecore_list_entry_t link;
618
619 /* Length of this element in the exe_chunk. */
620 int cmd_len;
621
622 union ecore_exe_queue_cmd_data cmd_data;
623 };
624
625 union ecore_qable_obj;
626
627 union ecore_exeq_comp_elem {
628 union event_ring_elem *elem;
629 };
630
631 struct ecore_exe_queue_obj;
632
633 typedef int (*exe_q_validate)(struct bxe_softc *sc,
634 union ecore_qable_obj *o,
635 struct ecore_exeq_elem *elem);
636
637 typedef int (*exe_q_remove)(struct bxe_softc *sc,
638 union ecore_qable_obj *o,
639 struct ecore_exeq_elem *elem);
640
641 /* Return positive if entry was optimized, 0 - if not, negative
642 * in case of an error.
643 */
644 typedef int (*exe_q_optimize)(struct bxe_softc *sc,
645 union ecore_qable_obj *o,
646 struct ecore_exeq_elem *elem);
647 typedef int (*exe_q_execute)(struct bxe_softc *sc,
648 union ecore_qable_obj *o,
649 ecore_list_t *exe_chunk,
650 unsigned long *ramrod_flags);
651 typedef struct ecore_exeq_elem *
652 (*exe_q_get)(struct ecore_exe_queue_obj *o,
653 struct ecore_exeq_elem *elem);
654
655 struct ecore_exe_queue_obj {
656 /* Commands pending for an execution. */
657 ecore_list_t exe_queue;
658
659 /* Commands pending for an completion. */
660 ecore_list_t pending_comp;
661
662 ECORE_MUTEX_SPIN lock;
663
664 /* Maximum length of commands' list for one execution */
665 int exe_chunk_len;
666
667 union ecore_qable_obj *owner;
668
669 /****** Virtual functions ******/
670 /**
671 * Called before commands execution for commands that are really
672 * going to be executed (after 'optimize').
673 *
674 * Must run under exe_queue->lock
675 */
676 exe_q_validate validate;
677
678 /**
679 * Called before removing pending commands, cleaning allocated
680 * resources (e.g., credits from validate)
681 */
682 exe_q_remove remove;
683
684 /**
685 * This will try to cancel the current pending commands list
686 * considering the new command.
687 *
688 * Returns the number of optimized commands or a negative error code
689 *
690 * Must run under exe_queue->lock
691 */
692 exe_q_optimize optimize;
693
694 /**
695 * Run the next commands chunk (owner specific).
696 */
697 exe_q_execute execute;
698
699 /**
700 * Return the exe_queue element containing the specific command
701 * if any. Otherwise return NULL.
702 */
703 exe_q_get get;
704 };
705 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
706 /*
707 * Element in the VLAN_MAC registry list having all current configured
708 * rules.
709 */
710 struct ecore_vlan_mac_registry_elem {
711 ecore_list_entry_t link;
712
713 /* Used to store the cam offset used for the mac/vlan/vlan-mac.
714 * Relevant for 57710 and 57711 only. VLANs and MACs share the
715 * same CAM for these chips.
716 */
717 int cam_offset;
718
719 /* Needed for DEL and RESTORE flows */
720 unsigned long vlan_mac_flags;
721
722 union ecore_classification_ramrod_data u;
723 };
724
725 /* Bits representing VLAN_MAC commands specific flags */
726 enum {
727 ECORE_UC_LIST_MAC,
728 ECORE_ETH_MAC,
729 ECORE_ISCSI_ETH_MAC,
730 ECORE_NETQ_ETH_MAC,
731 ECORE_DONT_CONSUME_CAM_CREDIT,
732 ECORE_DONT_CONSUME_CAM_CREDIT_DEST,
733 };
734 /* When looking for matching filters, some flags are not interesting */
735 #define ECORE_VLAN_MAC_CMP_MASK (1 << ECORE_UC_LIST_MAC | \
736 1 << ECORE_ETH_MAC | \
737 1 << ECORE_ISCSI_ETH_MAC | \
738 1 << ECORE_NETQ_ETH_MAC)
739 #define ECORE_VLAN_MAC_CMP_FLAGS(flags) \
740 ((flags) & ECORE_VLAN_MAC_CMP_MASK)
741
742 struct ecore_vlan_mac_ramrod_params {
743 /* Object to run the command from */
744 struct ecore_vlan_mac_obj *vlan_mac_obj;
745
746 /* General command flags: COMP_WAIT, etc. */
747 unsigned long ramrod_flags;
748
749 /* Command specific configuration request */
750 struct ecore_vlan_mac_data user_req;
751 };
752
753 struct ecore_vlan_mac_obj {
754 struct ecore_raw_obj raw;
755
756 /* Bookkeeping list: will prevent the addition of already existing
757 * entries.
758 */
759 ecore_list_t head;
760 /* Implement a simple reader/writer lock on the head list.
761 * all these fields should only be accessed under the exe_queue lock
762 */
763 uint8_t head_reader; /* Num. of readers accessing head list */
764 bool head_exe_request; /* Pending execution request. */
765 unsigned long saved_ramrod_flags; /* Ramrods of pending execution */
766
767 /* Execution queue interface instance */
768 struct ecore_exe_queue_obj exe_queue;
769
770 /* MACs credit pool */
771 struct ecore_credit_pool_obj *macs_pool;
772
773 /* VLANs credit pool */
774 struct ecore_credit_pool_obj *vlans_pool;
775
776 /* RAMROD command to be used */
777 int ramrod_cmd;
778
779 /* copy first n elements onto preallocated buffer
780 *
781 * @param n number of elements to get
782 * @param buf buffer preallocated by caller into which elements
783 * will be copied. Note elements are 4-byte aligned
784 * so buffer size must be able to accommodate the
785 * aligned elements.
786 *
787 * @return number of copied bytes
788 */
789
790 int (*get_n_elements)(struct bxe_softc *sc,
791 struct ecore_vlan_mac_obj *o, int n, uint8_t *base,
792 uint8_t stride, uint8_t size);
793
794 /**
795 * Checks if ADD-ramrod with the given params may be performed.
796 *
797 * @return zero if the element may be added
798 */
799
800 int (*check_add)(struct bxe_softc *sc,
801 struct ecore_vlan_mac_obj *o,
802 union ecore_classification_ramrod_data *data);
803
804 /**
805 * Checks if DEL-ramrod with the given params may be performed.
806 *
807 * @return TRUE if the element may be deleted
808 */
809 struct ecore_vlan_mac_registry_elem *
810 (*check_del)(struct bxe_softc *sc,
811 struct ecore_vlan_mac_obj *o,
812 union ecore_classification_ramrod_data *data);
813
814 /**
815 * Checks if DEL-ramrod with the given params may be performed.
816 *
817 * @return TRUE if the element may be deleted
818 */
819 bool (*check_move)(struct bxe_softc *sc,
820 struct ecore_vlan_mac_obj *src_o,
821 struct ecore_vlan_mac_obj *dst_o,
822 union ecore_classification_ramrod_data *data);
823
824 /**
825 * Update the relevant credit object(s) (consume/return
826 * correspondingly).
827 */
828 bool (*get_credit)(struct ecore_vlan_mac_obj *o);
829 bool (*put_credit)(struct ecore_vlan_mac_obj *o);
830 bool (*get_cam_offset)(struct ecore_vlan_mac_obj *o, int *offset);
831 bool (*put_cam_offset)(struct ecore_vlan_mac_obj *o, int offset);
832
833 /**
834 * Configures one rule in the ramrod data buffer.
835 */
836 void (*set_one_rule)(struct bxe_softc *sc,
837 struct ecore_vlan_mac_obj *o,
838 struct ecore_exeq_elem *elem, int rule_idx,
839 int cam_offset);
840
841 /**
842 * Delete all configured elements having the given
843 * vlan_mac_flags specification. Assumes no pending for
844 * execution commands. Will schedule all all currently
845 * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
846 * specification for deletion and will use the given
847 * ramrod_flags for the last DEL operation.
848 *
849 * @param sc
850 * @param o
851 * @param ramrod_flags RAMROD_XX flags
852 *
853 * @return 0 if the last operation has completed successfully
854 * and there are no more elements left, positive value
855 * if there are pending for completion commands,
856 * negative value in case of failure.
857 */
858 int (*delete_all)(struct bxe_softc *sc,
859 struct ecore_vlan_mac_obj *o,
860 unsigned long *vlan_mac_flags,
861 unsigned long *ramrod_flags);
862
863 /**
864 * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
865 * configured elements list.
866 *
867 * @param sc
868 * @param p Command parameters (RAMROD_COMP_WAIT bit in
869 * ramrod_flags is only taken into an account)
870 * @param ppos a pointer to the cookie that should be given back in the
871 * next call to make function handle the next element. If
872 * *ppos is set to NULL it will restart the iterator.
873 * If returned *ppos == NULL this means that the last
874 * element has been handled.
875 *
876 * @return int
877 */
878 int (*restore)(struct bxe_softc *sc,
879 struct ecore_vlan_mac_ramrod_params *p,
880 struct ecore_vlan_mac_registry_elem **ppos);
881
882 /**
883 * Should be called on a completion arrival.
884 *
885 * @param sc
886 * @param o
887 * @param cqe Completion element we are handling
888 * @param ramrod_flags if RAMROD_CONT is set the next bulk of
889 * pending commands will be executed.
890 * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
891 * may also be set if needed.
892 *
893 * @return 0 if there are neither pending nor waiting for
894 * completion commands. Positive value if there are
895 * pending for execution or for completion commands.
896 * Negative value in case of an error (including an
897 * error in the cqe).
898 */
899 int (*complete)(struct bxe_softc *sc, struct ecore_vlan_mac_obj *o,
900 union event_ring_elem *cqe,
901 unsigned long *ramrod_flags);
902
903 /**
904 * Wait for completion of all commands. Don't schedule new ones,
905 * just wait. It assumes that the completion code will schedule
906 * for new commands.
907 */
908 int (*wait)(struct bxe_softc *sc, struct ecore_vlan_mac_obj *o);
909 };
910
911 enum {
912 ECORE_LLH_CAM_ISCSI_ETH_LINE = 0,
913 ECORE_LLH_CAM_ETH_LINE,
914 ECORE_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
915 };
916
917 void ecore_set_mac_in_nig(struct bxe_softc *sc,
918 bool add, unsigned char *dev_addr, int index);
919
920 /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
921
922 /* RX_MODE ramrod special flags: set in rx_mode_flags field in
923 * a ecore_rx_mode_ramrod_params.
924 */
925 enum {
926 ECORE_RX_MODE_FCOE_ETH,
927 ECORE_RX_MODE_ISCSI_ETH,
928 };
929
930 enum {
931 ECORE_ACCEPT_UNICAST,
932 ECORE_ACCEPT_MULTICAST,
933 ECORE_ACCEPT_ALL_UNICAST,
934 ECORE_ACCEPT_ALL_MULTICAST,
935 ECORE_ACCEPT_BROADCAST,
936 ECORE_ACCEPT_UNMATCHED,
937 ECORE_ACCEPT_ANY_VLAN
938 };
939
940 struct ecore_rx_mode_ramrod_params {
941 struct ecore_rx_mode_obj *rx_mode_obj;
942 unsigned long *pstate;
943 int state;
944 uint8_t cl_id;
945 uint32_t cid;
946 uint8_t func_id;
947 unsigned long ramrod_flags;
948 unsigned long rx_mode_flags;
949
950 /* rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
951 * a tstorm_eth_mac_filter_config (e1x).
952 */
953 void *rdata;
954 ecore_dma_addr_t rdata_mapping;
955
956 /* Rx mode settings */
957 unsigned long rx_accept_flags;
958
959 /* internal switching settings */
960 unsigned long tx_accept_flags;
961 };
962
963 struct ecore_rx_mode_obj {
964 int (*config_rx_mode)(struct bxe_softc *sc,
965 struct ecore_rx_mode_ramrod_params *p);
966
967 int (*wait_comp)(struct bxe_softc *sc,
968 struct ecore_rx_mode_ramrod_params *p);
969 };
970
971 /********************** Set multicast group ***********************************/
972
973 struct ecore_mcast_list_elem {
974 ecore_list_entry_t link;
975 uint8_t *mac;
976 };
977
978 union ecore_mcast_config_data {
979 uint8_t *mac;
980 uint8_t bin; /* used in a RESTORE flow */
981 };
982
983 struct ecore_mcast_ramrod_params {
984 struct ecore_mcast_obj *mcast_obj;
985
986 /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
987 unsigned long ramrod_flags;
988
989 ecore_list_t mcast_list; /* list of struct ecore_mcast_list_elem */
990 /** TODO:
991 * - rename it to macs_num.
992 * - Add a new command type for handling pending commands
993 * (remove "zero semantics").
994 *
995 * Length of mcast_list. If zero and ADD_CONT command - post
996 * pending commands.
997 */
998 int mcast_list_len;
999 };
1000
1001 enum ecore_mcast_cmd {
1002 ECORE_MCAST_CMD_ADD,
1003 ECORE_MCAST_CMD_CONT,
1004 ECORE_MCAST_CMD_DEL,
1005 ECORE_MCAST_CMD_RESTORE,
1006 };
1007
1008 struct ecore_mcast_obj {
1009 struct ecore_raw_obj raw;
1010
1011 union {
1012 struct {
1013 #define ECORE_MCAST_BINS_NUM 256
1014 #define ECORE_MCAST_VEC_SZ (ECORE_MCAST_BINS_NUM / 64)
1015 uint64_t vec[ECORE_MCAST_VEC_SZ];
1016
1017 /** Number of BINs to clear. Should be updated
1018 * immediately when a command arrives in order to
1019 * properly create DEL commands.
1020 */
1021 int num_bins_set;
1022 } aprox_match;
1023
1024 struct {
1025 ecore_list_t macs;
1026 int num_macs_set;
1027 } exact_match;
1028 } registry;
1029
1030 /* Pending commands */
1031 ecore_list_t pending_cmds_head;
1032
1033 /* A state that is set in raw.pstate, when there are pending commands */
1034 int sched_state;
1035
1036 /* Maximal number of mcast MACs configured in one command */
1037 int max_cmd_len;
1038
1039 /* Total number of currently pending MACs to configure: both
1040 * in the pending commands list and in the current command.
1041 */
1042 int total_pending_num;
1043
1044 uint8_t engine_id;
1045
1046 /**
1047 * @param cmd command to execute (ECORE_MCAST_CMD_X, see above)
1048 */
1049 int (*config_mcast)(struct bxe_softc *sc,
1050 struct ecore_mcast_ramrod_params *p,
1051 enum ecore_mcast_cmd cmd);
1052
1053 /**
1054 * Fills the ramrod data during the RESTORE flow.
1055 *
1056 * @param sc
1057 * @param o
1058 * @param start_idx Registry index to start from
1059 * @param rdata_idx Index in the ramrod data to start from
1060 *
1061 * @return -1 if we handled the whole registry or index of the last
1062 * handled registry element.
1063 */
1064 int (*hdl_restore)(struct bxe_softc *sc, struct ecore_mcast_obj *o,
1065 int start_bin, int *rdata_idx);
1066
1067 int (*enqueue_cmd)(struct bxe_softc *sc, struct ecore_mcast_obj *o,
1068 struct ecore_mcast_ramrod_params *p,
1069 enum ecore_mcast_cmd cmd);
1070
1071 void (*set_one_rule)(struct bxe_softc *sc,
1072 struct ecore_mcast_obj *o, int idx,
1073 union ecore_mcast_config_data *cfg_data,
1074 enum ecore_mcast_cmd cmd);
1075
1076 /** Checks if there are more mcast MACs to be set or a previous
1077 * command is still pending.
1078 */
1079 bool (*check_pending)(struct ecore_mcast_obj *o);
1080
1081 /**
1082 * Set/Clear/Check SCHEDULED state of the object
1083 */
1084 void (*set_sched)(struct ecore_mcast_obj *o);
1085 void (*clear_sched)(struct ecore_mcast_obj *o);
1086 bool (*check_sched)(struct ecore_mcast_obj *o);
1087
1088 /* Wait until all pending commands complete */
1089 int (*wait_comp)(struct bxe_softc *sc, struct ecore_mcast_obj *o);
1090
1091 /**
1092 * Handle the internal object counters needed for proper
1093 * commands handling. Checks that the provided parameters are
1094 * feasible.
1095 */
1096 int (*validate)(struct bxe_softc *sc,
1097 struct ecore_mcast_ramrod_params *p,
1098 enum ecore_mcast_cmd cmd);
1099
1100 /**
1101 * Restore the values of internal counters in case of a failure.
1102 */
1103 void (*revert)(struct bxe_softc *sc,
1104 struct ecore_mcast_ramrod_params *p,
1105 int old_num_bins);
1106
1107 int (*get_registry_size)(struct ecore_mcast_obj *o);
1108 void (*set_registry_size)(struct ecore_mcast_obj *o, int n);
1109 };
1110
1111 /*************************** Credit handling **********************************/
1112 struct ecore_credit_pool_obj {
1113
1114 /* Current amount of credit in the pool */
1115 ecore_atomic_t credit;
1116
1117 /* Maximum allowed credit. put() will check against it. */
1118 int pool_sz;
1119
1120 /* Allocate a pool table statically.
1121 *
1122 * Currently the maximum allowed size is MAX_MAC_CREDIT_E2(272)
1123 *
1124 * The set bit in the table will mean that the entry is available.
1125 */
1126 #define ECORE_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
1127 uint64_t pool_mirror[ECORE_POOL_VEC_SIZE];
1128
1129 /* Base pool offset (initialized differently */
1130 int base_pool_offset;
1131
1132 /**
1133 * Get the next free pool entry.
1134 *
1135 * @return TRUE if there was a free entry in the pool
1136 */
1137 bool (*get_entry)(struct ecore_credit_pool_obj *o, int *entry);
1138
1139 /**
1140 * Return the entry back to the pool.
1141 *
1142 * @return TRUE if entry is legal and has been successfully
1143 * returned to the pool.
1144 */
1145 bool (*put_entry)(struct ecore_credit_pool_obj *o, int entry);
1146
1147 /**
1148 * Get the requested amount of credit from the pool.
1149 *
1150 * @param cnt Amount of requested credit
1151 * @return TRUE if the operation is successful
1152 */
1153 bool (*get)(struct ecore_credit_pool_obj *o, int cnt);
1154
1155 /**
1156 * Returns the credit to the pool.
1157 *
1158 * @param cnt Amount of credit to return
1159 * @return TRUE if the operation is successful
1160 */
1161 bool (*put)(struct ecore_credit_pool_obj *o, int cnt);
1162
1163 /**
1164 * Reads the current amount of credit.
1165 */
1166 int (*check)(struct ecore_credit_pool_obj *o);
1167 };
1168
1169 /*************************** RSS configuration ********************************/
1170 enum {
1171 /* RSS_MODE bits are mutually exclusive */
1172 ECORE_RSS_MODE_DISABLED,
1173 ECORE_RSS_MODE_REGULAR,
1174
1175 ECORE_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
1176
1177 ECORE_RSS_IPV4,
1178 ECORE_RSS_IPV4_TCP,
1179 ECORE_RSS_IPV4_UDP,
1180 ECORE_RSS_IPV6,
1181 ECORE_RSS_IPV6_TCP,
1182 ECORE_RSS_IPV6_UDP,
1183
1184 ECORE_RSS_IPV4_VXLAN,
1185 ECORE_RSS_IPV6_VXLAN,
1186 ECORE_RSS_TUNN_INNER_HDRS,
1187 };
1188
1189 struct ecore_config_rss_params {
1190 struct ecore_rss_config_obj *rss_obj;
1191
1192 /* may have RAMROD_COMP_WAIT set only */
1193 unsigned long ramrod_flags;
1194
1195 /* ECORE_RSS_X bits */
1196 unsigned long rss_flags;
1197
1198 /* Number hash bits to take into an account */
1199 uint8_t rss_result_mask;
1200
1201 /* Indirection table */
1202 uint8_t ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
1203
1204 /* RSS hash values */
1205 uint32_t rss_key[10];
1206
1207 /* valid only iff ECORE_RSS_UPDATE_TOE is set */
1208 uint16_t toe_rss_bitmap;
1209 };
1210
1211 struct ecore_rss_config_obj {
1212 struct ecore_raw_obj raw;
1213
1214 /* RSS engine to use */
1215 uint8_t engine_id;
1216
1217 /* Last configured indirection table */
1218 uint8_t ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
1219
1220 /* flags for enabling 4-tupple hash on UDP */
1221 uint8_t udp_rss_v4;
1222 uint8_t udp_rss_v6;
1223
1224 int (*config_rss)(struct bxe_softc *sc,
1225 struct ecore_config_rss_params *p);
1226 };
1227
1228 /*********************** Queue state update ***********************************/
1229
1230 /* UPDATE command options */
1231 enum {
1232 ECORE_Q_UPDATE_IN_VLAN_REM,
1233 ECORE_Q_UPDATE_IN_VLAN_REM_CHNG,
1234 ECORE_Q_UPDATE_OUT_VLAN_REM,
1235 ECORE_Q_UPDATE_OUT_VLAN_REM_CHNG,
1236 ECORE_Q_UPDATE_ANTI_SPOOF,
1237 ECORE_Q_UPDATE_ANTI_SPOOF_CHNG,
1238 ECORE_Q_UPDATE_ACTIVATE,
1239 ECORE_Q_UPDATE_ACTIVATE_CHNG,
1240 ECORE_Q_UPDATE_DEF_VLAN_EN,
1241 ECORE_Q_UPDATE_DEF_VLAN_EN_CHNG,
1242 ECORE_Q_UPDATE_SILENT_VLAN_REM_CHNG,
1243 ECORE_Q_UPDATE_SILENT_VLAN_REM,
1244 ECORE_Q_UPDATE_TX_SWITCHING_CHNG,
1245 ECORE_Q_UPDATE_TX_SWITCHING,
1246 ECORE_Q_UPDATE_PTP_PKTS_CHNG,
1247 ECORE_Q_UPDATE_PTP_PKTS,
1248 };
1249
1250 /* Allowed Queue states */
1251 enum ecore_q_state {
1252 ECORE_Q_STATE_RESET,
1253 ECORE_Q_STATE_INITIALIZED,
1254 ECORE_Q_STATE_ACTIVE,
1255 ECORE_Q_STATE_MULTI_COS,
1256 ECORE_Q_STATE_MCOS_TERMINATED,
1257 ECORE_Q_STATE_INACTIVE,
1258 ECORE_Q_STATE_STOPPED,
1259 ECORE_Q_STATE_TERMINATED,
1260 ECORE_Q_STATE_FLRED,
1261 ECORE_Q_STATE_MAX,
1262 };
1263
1264 /* Allowed Queue states */
1265 enum ecore_q_logical_state {
1266 ECORE_Q_LOGICAL_STATE_ACTIVE,
1267 ECORE_Q_LOGICAL_STATE_STOPPED,
1268 };
1269
1270 /* Allowed commands */
1271 enum ecore_queue_cmd {
1272 ECORE_Q_CMD_INIT,
1273 ECORE_Q_CMD_SETUP,
1274 ECORE_Q_CMD_SETUP_TX_ONLY,
1275 ECORE_Q_CMD_DEACTIVATE,
1276 ECORE_Q_CMD_ACTIVATE,
1277 ECORE_Q_CMD_UPDATE,
1278 ECORE_Q_CMD_UPDATE_TPA,
1279 ECORE_Q_CMD_HALT,
1280 ECORE_Q_CMD_CFC_DEL,
1281 ECORE_Q_CMD_TERMINATE,
1282 ECORE_Q_CMD_EMPTY,
1283 ECORE_Q_CMD_MAX,
1284 };
1285
1286 /* queue SETUP + INIT flags */
1287 enum {
1288 ECORE_Q_FLG_TPA,
1289 ECORE_Q_FLG_TPA_IPV6,
1290 ECORE_Q_FLG_TPA_GRO,
1291 ECORE_Q_FLG_STATS,
1292 ECORE_Q_FLG_ZERO_STATS,
1293 ECORE_Q_FLG_ACTIVE,
1294 ECORE_Q_FLG_OV,
1295 ECORE_Q_FLG_VLAN,
1296 ECORE_Q_FLG_COS,
1297 ECORE_Q_FLG_HC,
1298 ECORE_Q_FLG_HC_EN,
1299 ECORE_Q_FLG_DHC,
1300 ECORE_Q_FLG_OOO,
1301 ECORE_Q_FLG_FCOE,
1302 ECORE_Q_FLG_LEADING_RSS,
1303 ECORE_Q_FLG_MCAST,
1304 ECORE_Q_FLG_DEF_VLAN,
1305 ECORE_Q_FLG_TX_SWITCH,
1306 ECORE_Q_FLG_TX_SEC,
1307 ECORE_Q_FLG_ANTI_SPOOF,
1308 ECORE_Q_FLG_SILENT_VLAN_REM,
1309 ECORE_Q_FLG_FORCE_DEFAULT_PRI,
1310 ECORE_Q_FLG_REFUSE_OUTBAND_VLAN,
1311 ECORE_Q_FLG_PCSUM_ON_PKT,
1312 ECORE_Q_FLG_TUN_INC_INNER_IP_ID
1313 };
1314
1315 /* Queue type options: queue type may be a combination of below. */
1316 enum ecore_q_type {
1317 ECORE_Q_TYPE_FWD,
1318 /** TODO: Consider moving both these flags into the init()
1319 * ramrod params.
1320 */
1321 ECORE_Q_TYPE_HAS_RX,
1322 ECORE_Q_TYPE_HAS_TX,
1323 };
1324
1325 #define ECORE_PRIMARY_CID_INDEX 0
1326 #define ECORE_MULTI_TX_COS_E1X 3 /* QM only */
1327 #define ECORE_MULTI_TX_COS_E2_E3A0 2
1328 #define ECORE_MULTI_TX_COS_E3B0 3
1329 #define ECORE_MULTI_TX_COS 3 /* Maximum possible */
1330 #define MAC_PAD (ECORE_ALIGN(ETH_ALEN, sizeof(uint32_t)) - ETH_ALEN)
1331 /* DMAE channel to be used by FW for timesync workaroun. A driver that sends
1332 * timesync-related ramrods must not use this DMAE command ID.
1333 */
1334 #define FW_DMAE_CMD_ID 6
1335
1336 struct ecore_queue_init_params {
1337 struct {
1338 unsigned long flags;
1339 uint16_t hc_rate;
1340 uint8_t fw_sb_id;
1341 uint8_t sb_cq_index;
1342 } tx;
1343
1344 struct {
1345 unsigned long flags;
1346 uint16_t hc_rate;
1347 uint8_t fw_sb_id;
1348 uint8_t sb_cq_index;
1349 } rx;
1350
1351 /* CID context in the host memory */
1352 struct eth_context *cxts[ECORE_MULTI_TX_COS];
1353
1354 /* maximum number of cos supported by hardware */
1355 uint8_t max_cos;
1356 };
1357
1358 struct ecore_queue_terminate_params {
1359 /* index within the tx_only cids of this queue object */
1360 uint8_t cid_index;
1361 };
1362
1363 struct ecore_queue_cfc_del_params {
1364 /* index within the tx_only cids of this queue object */
1365 uint8_t cid_index;
1366 };
1367
1368 struct ecore_queue_update_params {
1369 unsigned long update_flags; /* ECORE_Q_UPDATE_XX bits */
1370 uint16_t def_vlan;
1371 uint16_t silent_removal_value;
1372 uint16_t silent_removal_mask;
1373 /* index within the tx_only cids of this queue object */
1374 uint8_t cid_index;
1375 };
1376
1377 struct ecore_queue_update_tpa_params {
1378 ecore_dma_addr_t sge_map;
1379 uint8_t update_ipv4;
1380 uint8_t update_ipv6;
1381 uint8_t max_tpa_queues;
1382 uint8_t max_sges_pkt;
1383 uint8_t complete_on_both_clients;
1384 uint8_t dont_verify_thr;
1385 uint8_t tpa_mode;
1386 uint8_t _pad;
1387
1388 uint16_t sge_buff_sz;
1389 uint16_t max_agg_sz;
1390
1391 uint16_t sge_pause_thr_low;
1392 uint16_t sge_pause_thr_high;
1393 };
1394
1395 struct rxq_pause_params {
1396 uint16_t bd_th_lo;
1397 uint16_t bd_th_hi;
1398 uint16_t rcq_th_lo;
1399 uint16_t rcq_th_hi;
1400 uint16_t sge_th_lo; /* valid iff ECORE_Q_FLG_TPA */
1401 uint16_t sge_th_hi; /* valid iff ECORE_Q_FLG_TPA */
1402 uint16_t pri_map;
1403 };
1404
1405 /* general */
1406 struct ecore_general_setup_params {
1407 /* valid iff ECORE_Q_FLG_STATS */
1408 uint8_t stat_id;
1409
1410 uint8_t spcl_id;
1411 uint16_t mtu;
1412 uint8_t cos;
1413
1414 uint8_t fp_hsi;
1415 };
1416
1417 struct ecore_rxq_setup_params {
1418 /* dma */
1419 ecore_dma_addr_t dscr_map;
1420 ecore_dma_addr_t sge_map;
1421 ecore_dma_addr_t rcq_map;
1422 ecore_dma_addr_t rcq_np_map;
1423
1424 uint16_t drop_flags;
1425 uint16_t buf_sz;
1426 uint8_t fw_sb_id;
1427 uint8_t cl_qzone_id;
1428
1429 /* valid iff ECORE_Q_FLG_TPA */
1430 uint16_t tpa_agg_sz;
1431 uint16_t sge_buf_sz;
1432 uint8_t max_sges_pkt;
1433 uint8_t max_tpa_queues;
1434 uint8_t rss_engine_id;
1435
1436 /* valid iff ECORE_Q_FLG_MCAST */
1437 uint8_t mcast_engine_id;
1438
1439 uint8_t cache_line_log;
1440
1441 uint8_t sb_cq_index;
1442
1443 /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
1444 uint16_t silent_removal_value;
1445 uint16_t silent_removal_mask;
1446 };
1447
1448 struct ecore_txq_setup_params {
1449 /* dma */
1450 ecore_dma_addr_t dscr_map;
1451
1452 uint8_t fw_sb_id;
1453 uint8_t sb_cq_index;
1454 uint8_t cos; /* valid iff ECORE_Q_FLG_COS */
1455 uint16_t traffic_type;
1456 /* equals to the leading rss client id, used for TX classification*/
1457 uint8_t tss_leading_cl_id;
1458
1459 /* valid iff ECORE_Q_FLG_DEF_VLAN */
1460 uint16_t default_vlan;
1461 };
1462
1463 struct ecore_queue_setup_params {
1464 struct ecore_general_setup_params gen_params;
1465 struct ecore_txq_setup_params txq_params;
1466 struct ecore_rxq_setup_params rxq_params;
1467 struct rxq_pause_params pause_params;
1468 unsigned long flags;
1469 };
1470
1471 struct ecore_queue_setup_tx_only_params {
1472 struct ecore_general_setup_params gen_params;
1473 struct ecore_txq_setup_params txq_params;
1474 unsigned long flags;
1475 /* index within the tx_only cids of this queue object */
1476 uint8_t cid_index;
1477 };
1478
1479 struct ecore_queue_state_params {
1480 struct ecore_queue_sp_obj *q_obj;
1481
1482 /* Current command */
1483 enum ecore_queue_cmd cmd;
1484
1485 /* may have RAMROD_COMP_WAIT set only */
1486 unsigned long ramrod_flags;
1487
1488 /* Params according to the current command */
1489 union {
1490 struct ecore_queue_update_params update;
1491 struct ecore_queue_update_tpa_params update_tpa;
1492 struct ecore_queue_setup_params setup;
1493 struct ecore_queue_init_params init;
1494 struct ecore_queue_setup_tx_only_params tx_only;
1495 struct ecore_queue_terminate_params terminate;
1496 struct ecore_queue_cfc_del_params cfc_del;
1497 } params;
1498 };
1499
1500 struct ecore_viflist_params {
1501 uint8_t echo_res;
1502 uint8_t func_bit_map_res;
1503 };
1504
1505 struct ecore_queue_sp_obj {
1506 uint32_t cids[ECORE_MULTI_TX_COS];
1507 uint8_t cl_id;
1508 uint8_t func_id;
1509
1510 /* number of traffic classes supported by queue.
1511 * The primary connection of the queue supports the first traffic
1512 * class. Any further traffic class is supported by a tx-only
1513 * connection.
1514 *
1515 * Therefore max_cos is also a number of valid entries in the cids
1516 * array.
1517 */
1518 uint8_t max_cos;
1519 uint8_t num_tx_only, next_tx_only;
1520
1521 enum ecore_q_state state, next_state;
1522
1523 /* bits from enum ecore_q_type */
1524 unsigned long type;
1525
1526 /* ECORE_Q_CMD_XX bits. This object implements "one
1527 * pending" paradigm but for debug and tracing purposes it's
1528 * more convenient to have different bits for different
1529 * commands.
1530 */
1531 unsigned long pending;
1532
1533 /* Buffer to use as a ramrod data and its mapping */
1534 void *rdata;
1535 ecore_dma_addr_t rdata_mapping;
1536
1537 /**
1538 * Performs one state change according to the given parameters.
1539 *
1540 * @return 0 in case of success and negative value otherwise.
1541 */
1542 int (*send_cmd)(struct bxe_softc *sc,
1543 struct ecore_queue_state_params *params);
1544
1545 /**
1546 * Sets the pending bit according to the requested transition.
1547 */
1548 int (*set_pending)(struct ecore_queue_sp_obj *o,
1549 struct ecore_queue_state_params *params);
1550
1551 /**
1552 * Checks that the requested state transition is legal.
1553 */
1554 int (*check_transition)(struct bxe_softc *sc,
1555 struct ecore_queue_sp_obj *o,
1556 struct ecore_queue_state_params *params);
1557
1558 /**
1559 * Completes the pending command.
1560 */
1561 int (*complete_cmd)(struct bxe_softc *sc,
1562 struct ecore_queue_sp_obj *o,
1563 enum ecore_queue_cmd);
1564
1565 int (*wait_comp)(struct bxe_softc *sc,
1566 struct ecore_queue_sp_obj *o,
1567 enum ecore_queue_cmd cmd);
1568 };
1569
1570 /********************** Function state update *********************************/
1571
1572 /* UPDATE command options */
1573 enum {
1574 ECORE_F_UPDATE_TX_SWITCH_SUSPEND_CHNG,
1575 ECORE_F_UPDATE_TX_SWITCH_SUSPEND,
1576 ECORE_F_UPDATE_SD_VLAN_TAG_CHNG,
1577 ECORE_F_UPDATE_SD_VLAN_ETH_TYPE_CHNG,
1578 ECORE_F_UPDATE_VLAN_FORCE_PRIO_CHNG,
1579 ECORE_F_UPDATE_VLAN_FORCE_PRIO_FLAG,
1580 ECORE_F_UPDATE_TUNNEL_CFG_CHNG,
1581 ECORE_F_UPDATE_TUNNEL_INNER_CLSS_L2GRE,
1582 ECORE_F_UPDATE_TUNNEL_INNER_CLSS_VXLAN,
1583 ECORE_F_UPDATE_TUNNEL_INNER_CLSS_L2GENEVE,
1584 ECORE_F_UPDATE_TUNNEL_INNER_RSS,
1585 };
1586
1587 /* Allowed Function states */
1588 enum ecore_func_state {
1589 ECORE_F_STATE_RESET,
1590 ECORE_F_STATE_INITIALIZED,
1591 ECORE_F_STATE_STARTED,
1592 ECORE_F_STATE_TX_STOPPED,
1593 ECORE_F_STATE_MAX,
1594 };
1595
1596 /* Allowed Function commands */
1597 enum ecore_func_cmd {
1598 ECORE_F_CMD_HW_INIT,
1599 ECORE_F_CMD_START,
1600 ECORE_F_CMD_STOP,
1601 ECORE_F_CMD_HW_RESET,
1602 ECORE_F_CMD_AFEX_UPDATE,
1603 ECORE_F_CMD_AFEX_VIFLISTS,
1604 ECORE_F_CMD_TX_STOP,
1605 ECORE_F_CMD_TX_START,
1606 ECORE_F_CMD_SWITCH_UPDATE,
1607 ECORE_F_CMD_SET_TIMESYNC,
1608 ECORE_F_CMD_MAX,
1609 };
1610
1611 struct ecore_func_hw_init_params {
1612 /* A load phase returned by MCP.
1613 *
1614 * May be:
1615 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1616 * FW_MSG_CODE_DRV_LOAD_COMMON
1617 * FW_MSG_CODE_DRV_LOAD_PORT
1618 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1619 */
1620 uint32_t load_phase;
1621 };
1622
1623 struct ecore_func_hw_reset_params {
1624 /* A load phase returned by MCP.
1625 *
1626 * May be:
1627 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1628 * FW_MSG_CODE_DRV_LOAD_COMMON
1629 * FW_MSG_CODE_DRV_LOAD_PORT
1630 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1631 */
1632 uint32_t reset_phase;
1633 };
1634
1635 struct ecore_func_start_params {
1636 /* Multi Function mode:
1637 * - Single Function
1638 * - Switch Dependent
1639 * - Switch Independent
1640 */
1641 uint16_t mf_mode;
1642
1643 /* Switch Dependent mode outer VLAN tag */
1644 uint16_t sd_vlan_tag;
1645
1646 /* Function cos mode */
1647 uint8_t network_cos_mode;
1648
1649 /* UDP dest port for VXLAN */
1650 uint16_t vxlan_dst_port;
1651
1652 /* UDP dest port for Geneve */
1653 uint16_t geneve_dst_port;
1654
1655 /* Enable inner Rx classifications for L2GRE packets */
1656 uint8_t inner_clss_l2gre;
1657
1658 /* Enable inner Rx classifications for L2-Geneve packets */
1659 uint8_t inner_clss_l2geneve;
1660
1661 /* Enable inner Rx classification for vxlan packets */
1662 uint8_t inner_clss_vxlan;
1663
1664 /* Enable RSS according to inner header */
1665 uint8_t inner_rss;
1666
1667 /** Allows accepting of packets failing MF classification, possibly
1668 * only matching a given ethertype
1669 */
1670 uint8_t class_fail;
1671 uint16_t class_fail_ethtype;
1672
1673 /* Override priority of output packets */
1674 uint8_t sd_vlan_force_pri;
1675 uint8_t sd_vlan_force_pri_val;
1676
1677 /* Replace vlan's ethertype */
1678 uint16_t sd_vlan_eth_type;
1679
1680 /* Prevent inner vlans from being added by FW */
1681 uint8_t no_added_tags;
1682
1683 /* Inner-to-Outer vlan priority mapping */
1684 uint8_t c2s_pri[MAX_VLAN_PRIORITIES];
1685 uint8_t c2s_pri_default;
1686 uint8_t c2s_pri_valid;
1687 };
1688
1689 struct ecore_func_switch_update_params {
1690 unsigned long changes; /* ECORE_F_UPDATE_XX bits */
1691 uint16_t vlan;
1692 uint16_t vlan_eth_type;
1693 uint8_t vlan_force_prio;
1694 uint16_t vxlan_dst_port;
1695 uint16_t geneve_dst_port;
1696 };
1697
1698 struct ecore_func_afex_update_params {
1699 uint16_t vif_id;
1700 uint16_t afex_default_vlan;
1701 uint8_t allowed_priorities;
1702 };
1703
1704 struct ecore_func_afex_viflists_params {
1705 uint16_t vif_list_index;
1706 uint8_t func_bit_map;
1707 uint8_t afex_vif_list_command;
1708 uint8_t func_to_clear;
1709 };
1710
1711 struct ecore_func_tx_start_params {
1712 struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
1713 uint8_t dcb_enabled;
1714 uint8_t dcb_version;
1715 uint8_t dont_add_pri_0;
1716 uint8_t dcb_outer_pri[MAX_TRAFFIC_TYPES];
1717 };
1718
1719 struct ecore_func_set_timesync_params {
1720 /* Reset, set or keep the current drift value */
1721 uint8_t drift_adjust_cmd;
1722 /* Dec, inc or keep the current offset */
1723 uint8_t offset_cmd;
1724 /* Drift value direction */
1725 uint8_t add_sub_drift_adjust_value;
1726 /* Drift, period and offset values to be used according to the commands
1727 * above.
1728 */
1729 uint8_t drift_adjust_value;
1730 uint32_t drift_adjust_period;
1731 uint64_t offset_delta;
1732 };
1733
1734 struct ecore_func_state_params {
1735 struct ecore_func_sp_obj *f_obj;
1736
1737 /* Current command */
1738 enum ecore_func_cmd cmd;
1739
1740 /* may have RAMROD_COMP_WAIT set only */
1741 unsigned long ramrod_flags;
1742
1743 /* Params according to the current command */
1744 union {
1745 struct ecore_func_hw_init_params hw_init;
1746 struct ecore_func_hw_reset_params hw_reset;
1747 struct ecore_func_start_params start;
1748 struct ecore_func_switch_update_params switch_update;
1749 struct ecore_func_afex_update_params afex_update;
1750 struct ecore_func_afex_viflists_params afex_viflists;
1751 struct ecore_func_tx_start_params tx_start;
1752 struct ecore_func_set_timesync_params set_timesync;
1753 } params;
1754 };
1755
1756 struct ecore_func_sp_drv_ops {
1757 /* Init tool + runtime initialization:
1758 * - Common Chip
1759 * - Common (per Path)
1760 * - Port
1761 * - Function phases
1762 */
1763 int (*init_hw_cmn_chip)(struct bxe_softc *sc);
1764 int (*init_hw_cmn)(struct bxe_softc *sc);
1765 int (*init_hw_port)(struct bxe_softc *sc);
1766 int (*init_hw_func)(struct bxe_softc *sc);
1767
1768 /* Reset Function HW: Common, Port, Function phases. */
1769 void (*reset_hw_cmn)(struct bxe_softc *sc);
1770 void (*reset_hw_port)(struct bxe_softc *sc);
1771 void (*reset_hw_func)(struct bxe_softc *sc);
1772
1773 /* Init/Free GUNZIP resources */
1774 int (*gunzip_init)(struct bxe_softc *sc);
1775 void (*gunzip_end)(struct bxe_softc *sc);
1776
1777 /* Prepare/Release FW resources */
1778 int (*init_fw)(struct bxe_softc *sc);
1779 void (*release_fw)(struct bxe_softc *sc);
1780 };
1781
1782 struct ecore_func_sp_obj {
1783 enum ecore_func_state state, next_state;
1784
1785 /* ECORE_FUNC_CMD_XX bits. This object implements "one
1786 * pending" paradigm but for debug and tracing purposes it's
1787 * more convenient to have different bits for different
1788 * commands.
1789 */
1790 unsigned long pending;
1791
1792 /* Buffer to use as a ramrod data and its mapping */
1793 void *rdata;
1794 ecore_dma_addr_t rdata_mapping;
1795
1796 /* Buffer to use as a afex ramrod data and its mapping.
1797 * This can't be same rdata as above because afex ramrod requests
1798 * can arrive to the object in parallel to other ramrod requests.
1799 */
1800 void *afex_rdata;
1801 ecore_dma_addr_t afex_rdata_mapping;
1802
1803 /* this mutex validates that when pending flag is taken, the next
1804 * ramrod to be sent will be the one set the pending bit
1805 */
1806 ECORE_MUTEX one_pending_mutex;
1807
1808 /* Driver interface */
1809 struct ecore_func_sp_drv_ops *drv;
1810
1811 /**
1812 * Performs one state change according to the given parameters.
1813 *
1814 * @return 0 in case of success and negative value otherwise.
1815 */
1816 int (*send_cmd)(struct bxe_softc *sc,
1817 struct ecore_func_state_params *params);
1818
1819 /**
1820 * Checks that the requested state transition is legal.
1821 */
1822 int (*check_transition)(struct bxe_softc *sc,
1823 struct ecore_func_sp_obj *o,
1824 struct ecore_func_state_params *params);
1825
1826 /**
1827 * Completes the pending command.
1828 */
1829 int (*complete_cmd)(struct bxe_softc *sc,
1830 struct ecore_func_sp_obj *o,
1831 enum ecore_func_cmd cmd);
1832
1833 int (*wait_comp)(struct bxe_softc *sc, struct ecore_func_sp_obj *o,
1834 enum ecore_func_cmd cmd);
1835 };
1836
1837 /********************** Interfaces ********************************************/
1838 /* Queueable objects set */
1839 union ecore_qable_obj {
1840 struct ecore_vlan_mac_obj vlan_mac;
1841 };
1842 /************** Function state update *********/
1843 void ecore_init_func_obj(struct bxe_softc *sc,
1844 struct ecore_func_sp_obj *obj,
1845 void *rdata, ecore_dma_addr_t rdata_mapping,
1846 void *afex_rdata, ecore_dma_addr_t afex_rdata_mapping,
1847 struct ecore_func_sp_drv_ops *drv_iface);
1848
1849 int ecore_func_state_change(struct bxe_softc *sc,
1850 struct ecore_func_state_params *params);
1851
1852 enum ecore_func_state ecore_func_get_state(struct bxe_softc *sc,
1853 struct ecore_func_sp_obj *o);
1854 /******************* Queue State **************/
1855 void ecore_init_queue_obj(struct bxe_softc *sc,
1856 struct ecore_queue_sp_obj *obj, uint8_t cl_id, uint32_t *cids,
1857 uint8_t cid_cnt, uint8_t func_id, void *rdata,
1858 ecore_dma_addr_t rdata_mapping, unsigned long type);
1859
1860 int ecore_queue_state_change(struct bxe_softc *sc,
1861 struct ecore_queue_state_params *params);
1862
1863 int ecore_get_q_logical_state(struct bxe_softc *sc,
1864 struct ecore_queue_sp_obj *obj);
1865
1866 /********************* VLAN-MAC ****************/
1867 void ecore_init_mac_obj(struct bxe_softc *sc,
1868 struct ecore_vlan_mac_obj *mac_obj,
1869 uint8_t cl_id, uint32_t cid, uint8_t func_id, void *rdata,
1870 ecore_dma_addr_t rdata_mapping, int state,
1871 unsigned long *pstate, ecore_obj_type type,
1872 struct ecore_credit_pool_obj *macs_pool);
1873
1874 void ecore_init_vlan_obj(struct bxe_softc *sc,
1875 struct ecore_vlan_mac_obj *vlan_obj,
1876 uint8_t cl_id, uint32_t cid, uint8_t func_id, void *rdata,
1877 ecore_dma_addr_t rdata_mapping, int state,
1878 unsigned long *pstate, ecore_obj_type type,
1879 struct ecore_credit_pool_obj *vlans_pool);
1880
1881 void ecore_init_vlan_mac_obj(struct bxe_softc *sc,
1882 struct ecore_vlan_mac_obj *vlan_mac_obj,
1883 uint8_t cl_id, uint32_t cid, uint8_t func_id, void *rdata,
1884 ecore_dma_addr_t rdata_mapping, int state,
1885 unsigned long *pstate, ecore_obj_type type,
1886 struct ecore_credit_pool_obj *macs_pool,
1887 struct ecore_credit_pool_obj *vlans_pool);
1888
1889 void ecore_init_vxlan_fltr_obj(struct bxe_softc *sc,
1890 struct ecore_vlan_mac_obj *vlan_mac_obj,
1891 uint8_t cl_id, uint32_t cid, uint8_t func_id, void *rdata,
1892 ecore_dma_addr_t rdata_mapping, int state,
1893 unsigned long *pstate, ecore_obj_type type,
1894 struct ecore_credit_pool_obj *macs_pool,
1895 struct ecore_credit_pool_obj *vlans_pool);
1896
1897 int ecore_vlan_mac_h_read_lock(struct bxe_softc *sc,
1898 struct ecore_vlan_mac_obj *o);
1899 void ecore_vlan_mac_h_read_unlock(struct bxe_softc *sc,
1900 struct ecore_vlan_mac_obj *o);
1901 int ecore_vlan_mac_h_write_lock(struct bxe_softc *sc,
1902 struct ecore_vlan_mac_obj *o);
1903 void ecore_vlan_mac_h_write_unlock(struct bxe_softc *sc,
1904 struct ecore_vlan_mac_obj *o);
1905 int ecore_config_vlan_mac(struct bxe_softc *sc,
1906 struct ecore_vlan_mac_ramrod_params *p);
1907
1908 int ecore_vlan_mac_move(struct bxe_softc *sc,
1909 struct ecore_vlan_mac_ramrod_params *p,
1910 struct ecore_vlan_mac_obj *dest_o);
1911
1912 /********************* RX MODE ****************/
1913
1914 void ecore_init_rx_mode_obj(struct bxe_softc *sc,
1915 struct ecore_rx_mode_obj *o);
1916
1917 /**
1918 * ecore_config_rx_mode - Send and RX_MODE ramrod according to the provided parameters.
1919 *
1920 * @p: Command parameters
1921 *
1922 * Return: 0 - if operation was successful and there is no pending completions,
1923 * positive number - if there are pending completions,
1924 * negative - if there were errors
1925 */
1926 int ecore_config_rx_mode(struct bxe_softc *sc,
1927 struct ecore_rx_mode_ramrod_params *p);
1928
1929 /****************** MULTICASTS ****************/
1930
1931 void ecore_init_mcast_obj(struct bxe_softc *sc,
1932 struct ecore_mcast_obj *mcast_obj,
1933 uint8_t mcast_cl_id, uint32_t mcast_cid, uint8_t func_id,
1934 uint8_t engine_id, void *rdata, ecore_dma_addr_t rdata_mapping,
1935 int state, unsigned long *pstate,
1936 ecore_obj_type type);
1937
1938 /**
1939 * ecore_config_mcast - Configure multicast MACs list.
1940 *
1941 * @cmd: command to execute: BNX2X_MCAST_CMD_X
1942 *
1943 * May configure a new list
1944 * provided in p->mcast_list (ECORE_MCAST_CMD_ADD), clean up
1945 * (ECORE_MCAST_CMD_DEL) or restore (ECORE_MCAST_CMD_RESTORE) a current
1946 * configuration, continue to execute the pending commands
1947 * (ECORE_MCAST_CMD_CONT).
1948 *
1949 * If previous command is still pending or if number of MACs to
1950 * configure is more that maximum number of MACs in one command,
1951 * the current command will be enqueued to the tail of the
1952 * pending commands list.
1953 *
1954 * Return: 0 is operation was successful and there are no pending completions,
1955 * negative if there were errors, positive if there are pending
1956 * completions.
1957 */
1958 int ecore_config_mcast(struct bxe_softc *sc,
1959 struct ecore_mcast_ramrod_params *p,
1960 enum ecore_mcast_cmd cmd);
1961
1962 /****************** CREDIT POOL ****************/
1963 void ecore_init_mac_credit_pool(struct bxe_softc *sc,
1964 struct ecore_credit_pool_obj *p, uint8_t func_id,
1965 uint8_t func_num);
1966 void ecore_init_vlan_credit_pool(struct bxe_softc *sc,
1967 struct ecore_credit_pool_obj *p, uint8_t func_id,
1968 uint8_t func_num);
1969 void ecore_init_credit_pool(struct ecore_credit_pool_obj *p,
1970 int base, int credit);
1971
1972 /****************** RSS CONFIGURATION ****************/
1973 void ecore_init_rss_config_obj(struct bxe_softc *sc,
1974 struct ecore_rss_config_obj *rss_obj,
1975 uint8_t cl_id, uint32_t cid, uint8_t func_id, uint8_t engine_id,
1976 void *rdata, ecore_dma_addr_t rdata_mapping,
1977 int state, unsigned long *pstate,
1978 ecore_obj_type type);
1979
1980 /**
1981 * ecore_config_rss - Updates RSS configuration according to provided parameters
1982 *
1983 * Return: 0 in case of success
1984 */
1985 int ecore_config_rss(struct bxe_softc *sc,
1986 struct ecore_config_rss_params *p);
1987
1988 /**
1989 * ecore_get_rss_ind_table - Return the current ind_table configuration.
1990 *
1991 * @ind_table: buffer to fill with the current indirection
1992 * table content. Should be at least
1993 * T_ETH_INDIRECTION_TABLE_SIZE bytes long.
1994 */
1995 void ecore_get_rss_ind_table(struct ecore_rss_config_obj *rss_obj,
1996 uint8_t *ind_table);
1997
1998 #define PF_MAC_CREDIT_E2(sc, func_num) \
1999 ((MAX_MAC_CREDIT_E2 - GET_NUM_VFS_PER_PATH(sc) * VF_MAC_CREDIT_CNT) / \
2000 func_num + GET_NUM_VFS_PER_PF(sc) * VF_MAC_CREDIT_CNT)
2001
2002 #define PF_VLAN_CREDIT_E2(sc, func_num) \
2003 ((MAX_MAC_CREDIT_E2 - GET_NUM_VFS_PER_PATH(sc) * VF_VLAN_CREDIT_CNT) / \
2004 func_num + GET_NUM_VFS_PER_PF(sc) * VF_VLAN_CREDIT_CNT)
2005
2006
2007 #endif /* ECORE_SP_H */
2008
2009