1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
5 * Copyright (c) 2000 Michael Smith <[email protected]>
6 * Copyright (c) 2000 BSDi
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 #include <sys/param.h>
35 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/systm.h>
39 #include <sys/bus.h>
40
41 #include <dev/pci/pcivar.h>
42 #include <dev/pci/pcireg.h>
43
44 /*
45 * Chipset fixups.
46 *
47 * These routines are invoked during the probe phase for devices which
48 * typically don't have specific device drivers, but which require
49 * some cleaning up.
50 */
51
52 static int fixup_pci_probe(device_t dev);
53 static void fixwsc_natoma(device_t dev);
54 static void fixc1_nforce2(device_t dev);
55
56 static device_method_t fixup_pci_methods[] = {
57 /* Device interface */
58 DEVMETHOD(device_probe, fixup_pci_probe),
59 DEVMETHOD(device_attach, bus_generic_attach),
60 { 0, 0 }
61 };
62
63 static driver_t fixup_pci_driver = {
64 "fixup_pci",
65 fixup_pci_methods,
66 0,
67 };
68
69 DRIVER_MODULE(fixup_pci, pci, fixup_pci_driver, 0, 0);
70
71 static int
fixup_pci_probe(device_t dev)72 fixup_pci_probe(device_t dev)
73 {
74 switch (pci_get_devid(dev)) {
75 case 0x12378086: /* Intel 82440FX (Natoma) */
76 fixwsc_natoma(dev);
77 break;
78 case 0x01e010de: /* nVidia nForce2 */
79 fixc1_nforce2(dev);
80 break;
81 }
82 return(ENXIO);
83 }
84
85 static void
fixwsc_natoma(device_t dev)86 fixwsc_natoma(device_t dev)
87 {
88 int pmccfg;
89
90 pmccfg = pci_read_config(dev, 0x50, 2);
91 #if defined(SMP)
92 if (pmccfg & 0x8000) {
93 device_printf(dev, "correcting Natoma config for SMP\n");
94 pmccfg &= ~0x8000;
95 pci_write_config(dev, 0x50, pmccfg, 2);
96 }
97 #else
98 if ((pmccfg & 0x8000) == 0) {
99 device_printf(dev, "correcting Natoma config for non-SMP\n");
100 pmccfg |= 0x8000;
101 pci_write_config(dev, 0x50, pmccfg, 2);
102 }
103 #endif
104 }
105
106 /*
107 * Set the SYSTEM_IDLE_TIMEOUT to 80 ns on nForce2 systems to work
108 * around a hang that is triggered when the CPU generates a very fast
109 * CONNECT/HALT cycle sequence. Specifically, the hang can result in
110 * the lapic timer being stopped.
111 *
112 * This requires changing the value for config register at offset 0x6c
113 * for the Host-PCI bridge at bus/dev/function 0/0/0:
114 *
115 * Chip Current Value New Value
116 * ---- ---------- ----------
117 * C17 0x1F0FFF01 0x1F01FF01
118 * C18D 0x9F0FFF01 0x9F01FF01
119 *
120 * We do this by always clearing the bits in 0x000e0000.
121 *
122 * See also: http://lkml.org/lkml/2004/5/3/157
123 */
124 static void
fixc1_nforce2(device_t dev)125 fixc1_nforce2(device_t dev)
126 {
127 uint32_t val;
128
129 if (pci_get_bus(dev) == 0 && pci_get_slot(dev) == 0 &&
130 pci_get_function(dev) == 0) {
131 val = pci_read_config(dev, 0x6c, 4);
132 if (val & 0x000e0000) {
133 device_printf(dev,
134 "correcting nForce2 C1 CPU disconnect hangs\n");
135 val &= ~0x000e0000;
136 pci_write_config(dev, 0x6c, val, 4);
137 }
138 }
139 }
140